dt-bindings: clock: tegra124-dfll: add Tegra210 support
Add Tegra210 support for DFLL clock. Cc: devicetree@vger.kernel.org Signed-off-by: Joseph Lo <josephl@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
parent
93caec0042
commit
7e9d109858
|
@ -10,7 +10,9 @@ control module that will automatically adjust the VDD_CPU voltage by
|
|||
communicating with an off-chip PMIC either via an I2C bus or via PWM signals.
|
||||
|
||||
Required properties:
|
||||
- compatible : should be "nvidia,tegra124-dfll"
|
||||
- compatible : should be one of:
|
||||
- "nvidia,tegra124-dfll": for Tegra124
|
||||
- "nvidia,tegra210-dfll": for Tegra210
|
||||
- reg : Defines the following set of registers, in the order listed:
|
||||
- registers for the DFLL control logic.
|
||||
- registers for the I2C output logic.
|
||||
|
|
Loading…
Reference in New Issue