net: lantiq_xrx200: Hardcode the burst length value
All SoCs with this IP core support 8 burst length. Hauke suggested to hardcode this value and simplify the driver. Link: https://lkml.org/lkml/2021/9/14/1533 Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -25,6 +25,7 @@
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#define XRX200_DMA_DATA_LEN (SZ_64K - 1)
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#define XRX200_DMA_RX 0
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#define XRX200_DMA_TX 1
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#define XRX200_DMA_BURST_LEN 8
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/* cpu port mac */
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#define PMAC_RX_IPG 0x0024
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@ -73,9 +74,6 @@ struct xrx200_priv {
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struct net_device *net_dev;
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struct device *dev;
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int tx_burst_len;
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int rx_burst_len;
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__iomem void *pmac_reg;
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};
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@ -323,7 +321,7 @@ static netdev_tx_t xrx200_start_xmit(struct sk_buff *skb,
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goto err_drop;
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/* dma needs to start on a burst length value aligned address */
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byte_offset = mapping % (priv->tx_burst_len * 4);
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byte_offset = mapping % (XRX200_DMA_BURST_LEN * 4);
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desc->addr = mapping - byte_offset;
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/* Make sure the address is written before we give it to HW */
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@ -422,7 +420,8 @@ static int xrx200_dma_init(struct xrx200_priv *priv)
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int ret = 0;
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int i;
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ltq_dma_init_port(DMA_PORT_ETOP, priv->tx_burst_len, rx_burst_len);
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ltq_dma_init_port(DMA_PORT_ETOP, XRX200_DMA_BURST_LEN,
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XRX200_DMA_BURST_LEN);
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ch_rx->dma.nr = XRX200_DMA_RX;
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ch_rx->dma.dev = priv->dev;
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@ -531,18 +530,6 @@ static int xrx200_probe(struct platform_device *pdev)
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if (err)
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eth_hw_addr_random(net_dev);
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err = device_property_read_u32(dev, "lantiq,tx-burst-length", &priv->tx_burst_len);
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if (err < 0) {
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dev_err(dev, "unable to read tx-burst-length property\n");
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return err;
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}
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err = device_property_read_u32(dev, "lantiq,rx-burst-length", &priv->rx_burst_len);
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if (err < 0) {
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dev_err(dev, "unable to read rx-burst-length property\n");
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return err;
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}
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/* bring up the dma engine and IP core */
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err = xrx200_dma_init(priv);
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if (err)
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