net: dsa: mv88e6xxx: fix Serdes link changes
phylink_mac_change() is supposed to be called with a 'false' argument if the link has gone down since it was last reported up; this is to ensure that link events along with renegotiation events are always correctly reported to userspace. Read the BMSR once when we have an interrupt, and report the link latched status to phylink via phylink_mac_change(). phylink will deal automatically with re-reading the link state once it has processed the link-down event. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -340,26 +340,17 @@ int mv88e6352_serdes_get_stats(struct mv88e6xxx_chip *chip, int port,
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static void mv88e6352_serdes_irq_link(struct mv88e6xxx_chip *chip, int port)
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{
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struct dsa_switch *ds = chip->ds;
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u16 status;
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bool up;
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u16 bmsr;
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int err;
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err = mv88e6352_serdes_read(chip, MII_BMSR, &status);
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if (err)
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/* If the link has dropped, we want to know about it. */
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err = mv88e6352_serdes_read(chip, MII_BMSR, &bmsr);
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if (err) {
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dev_err(chip->dev, "can't read Serdes BMSR: %d\n", err);
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return;
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}
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/* Status must be read twice in order to give the current link
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* status. Otherwise the change in link status since the last
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* read of the register is returned.
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*/
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err = mv88e6352_serdes_read(chip, MII_BMSR, &status);
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if (err)
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return;
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up = status & BMSR_LSTATUS;
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dsa_port_phylink_mac_change(ds, port, up);
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dsa_port_phylink_mac_change(chip->ds, port, !!(bmsr & BMSR_LSTATUS));
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}
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irqreturn_t mv88e6352_serdes_irq_status(struct mv88e6xxx_chip *chip, int port,
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@ -833,18 +824,18 @@ int mv88e6390_serdes_pcs_link_up(struct mv88e6xxx_chip *chip, int port,
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static void mv88e6390_serdes_irq_link_sgmii(struct mv88e6xxx_chip *chip,
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int port, u8 lane)
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{
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u16 status;
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u16 bmsr;
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int err;
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/* If the link has dropped, we want to know about it. */
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err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
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MV88E6390_SGMII_PHY_STATUS, &status);
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MV88E6390_SGMII_BMSR, &bmsr);
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if (err) {
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dev_err(chip->dev, "can't read SGMII PHY status: %d\n", err);
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dev_err(chip->dev, "can't read Serdes BMSR: %d\n", err);
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return;
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}
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dsa_port_phylink_mac_change(chip->ds, port,
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!!(status & MV88E6390_SGMII_PHY_STATUS_LINK));
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dsa_port_phylink_mac_change(chip->ds, port, !!(bmsr & BMSR_LSTATUS));
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}
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static int mv88e6390_serdes_irq_enable_sgmii(struct mv88e6xxx_chip *chip,
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@ -48,6 +48,7 @@
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/* 1000BASE-X and SGMII */
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#define MV88E6390_SGMII_BMCR (0x2000 + MII_BMCR)
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#define MV88E6390_SGMII_BMSR (0x2000 + MII_BMSR)
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#define MV88E6390_SGMII_ADVERTISE (0x2000 + MII_ADVERTISE)
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#define MV88E6390_SGMII_LPA (0x2000 + MII_LPA)
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#define MV88E6390_SGMII_INT_ENABLE 0xa001
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