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drm/msm/disp/mdp5: mdp5_cfg: Fix msm8974v2 max_clk 

The maximum mdp clock rate on msm8974v2 is 320MHz. Fix it.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
This commit is contained in:
Konrad Dybcio 2021-02-04 00:15:36 +01:00 committed by Rob Clark
parent 5ca6d0268d
commit 7df222c359
1 changed files with 1 additions and 1 deletions
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drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c
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@ -177,7 +177,7 @@ static const struct mdp5_cfg_hw msm8x74v2_config = {
[3] = INTF_HDMI,
},
},
.max_clk = 200000000,
.max_clk = 320000000,
};
static const struct mdp5_cfg_hw apq8084_config = {