[ARM] S3C: Move common GPIO code from plat-s3c24xx
Move the common parts of the GPIO code into plat-s3c for use with both the s3c24xx and s3c64xx systems. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This commit is contained in:
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efd3a8eb15
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7db6c82a37
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@ -86,6 +86,10 @@ enum s3c_gpio_number {
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#define S3C64XX_GPP(_nr) (S3C64XX_GPIO_P_START + (_nr))
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#define S3C64XX_GPQ(_nr) (S3C64XX_GPIO_Q_START + (_nr))
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/* the end of the S3C64XX specific gpios */
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#define S3C64XX_GPIO_END (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1)
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#define S3C_GPIO_END S3C64XX_GPIO_END
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/* define the number of gpios we need to the one after the GPQ() range */
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#define ARCH_NR_GPIOS (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1)
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@ -15,6 +15,7 @@ obj-y += init.o
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obj-y += time.o
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obj-y += clock.o
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obj-y += pwm-clock.o
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obj-y += gpio.o
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# devices
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@ -0,0 +1,128 @@
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/* linux/arch/arm/plat-s3c/gpio.c
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*
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* Copyright 2008 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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* S3C series GPIO core
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/gpio.h>
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#include <plat/gpio-core.h>
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/* Default routines for controlling GPIO, based on the original S3C24XX
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* GPIO functions which deal with the case where each gpio bank of the
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* chip is as following:
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*
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* base + 0x00: Control register, 2 bits per gpio
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* gpio n: 2 bits starting at (2*n)
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* 00 = input, 01 = output, others mean special-function
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* base + 0x04: Data register, 1 bit per gpio
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* bit n: data bit n
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*/
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static int s3c_gpiolib_input(struct gpio_chip *chip, unsigned offset)
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{
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struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
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void __iomem *base = ourchip->base;
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unsigned long flags;
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unsigned long con;
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local_irq_save(flags);
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con = __raw_readl(base + 0x00);
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con &= ~(3 << (offset * 2));
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__raw_writel(con, base + 0x00);
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local_irq_restore(flags);
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return 0;
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}
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static int s3c_gpiolib_output(struct gpio_chip *chip,
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unsigned offset, int value)
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{
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struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
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void __iomem *base = ourchip->base;
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unsigned long flags;
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unsigned long dat;
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unsigned long con;
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local_irq_save(flags);
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dat = __raw_readl(base + 0x04);
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dat &= ~(1 << offset);
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if (value)
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dat |= 1 << offset;
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__raw_writel(dat, base + 0x04);
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con = __raw_readl(base + 0x00);
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con &= ~(3 << (offset * 2));
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con |= 1 << (offset * 2);
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__raw_writel(con, base + 0x00);
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__raw_writel(dat, base + 0x04);
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local_irq_restore(flags);
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return 0;
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}
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static void s3c_gpiolib_set(struct gpio_chip *chip,
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unsigned offset, int value)
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{
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struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
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void __iomem *base = ourchip->base;
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unsigned long flags;
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unsigned long dat;
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local_irq_save(flags);
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dat = __raw_readl(base + 0x04);
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dat &= ~(1 << offset);
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if (value)
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dat |= 1 << offset;
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__raw_writel(dat, base + 0x04);
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local_irq_restore(flags);
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}
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static int s3c_gpiolib_get(struct gpio_chip *chip, unsigned offset)
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{
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struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
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unsigned long val;
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val = __raw_readl(ourchip->base + 0x04);
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val >>= offset;
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val &= 1;
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return val;
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}
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__init void s3c_gpiolib_add(struct s3c_gpio_chip *chip)
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{
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struct gpio_chip *gc = &chip->chip;
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BUG_ON(!chip->base);
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BUG_ON(!gc->label);
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BUG_ON(!gc->ngpio);
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if (!gc->direction_input)
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gc->direction_input = s3c_gpiolib_input;
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if (!gc->direction_output)
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gc->direction_output = s3c_gpiolib_output;
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if (!gc->set)
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gc->set = s3c_gpiolib_set;
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if (!gc->get)
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gc->get = s3c_gpiolib_get;
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/* gpiochip_add() prints own failure message on error. */
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gpiochip_add(gc);
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}
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@ -0,0 +1,49 @@
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/* linux/arch/arm/plat-s3c/include/plat/gpio-core.h
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*
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* Copyright 2008 Simtec Electronics
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* http://armlinux.simtec.co.uk/
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C Platform - GPIO core
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/* Define the core gpiolib support functions that the s3c platforms may
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* need to extend or change depending on the hardware and the s3c chip
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* selected at build or found at run time.
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*
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* These definitions are not intended for driver inclusion, there is
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* nothing here that should not live outside the platform and core
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* specific code.
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*/
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/**
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* struct s3c_gpio_chip - wrapper for specific implementation of gpio
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* @chip: The chip structure to be exported via gpiolib.
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* @base: The base pointer to the gpio configuration registers.
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*
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* This wrapper provides the necessary information for the Samsung
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* specific gpios being registered with gpiolib.
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*/
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struct s3c_gpio_chip {
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struct gpio_chip chip;
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void __iomem *base;
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};
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static inline struct s3c_gpio_chip *to_s3c_gpio(struct gpio_chip *gpc)
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{
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return container_of(gpc, struct s3c_gpio_chip, chip);
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}
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/** s3c_gpiolib_add() - add the s3c specific version of a gpio_chip.
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* @chip: The chip to register
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*
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* This is a wrapper to gpiochip_add() that takes our specific gpio chip
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* information and makes the necessary alterations for the platform and
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* notes the information for use with the configuration systems and any
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* other parts of the system.
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*/
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extern void s3c_gpiolib_add(struct s3c_gpio_chip *chip);
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@ -19,104 +19,12 @@
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#include <linux/io.h>
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#include <linux/gpio.h>
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#include <plat/gpio-core.h>
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#include <mach/hardware.h>
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#include <asm/irq.h>
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#include <mach/regs-gpio.h>
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struct s3c24xx_gpio_chip {
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struct gpio_chip chip;
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void __iomem *base;
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};
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static inline struct s3c24xx_gpio_chip *to_s3c_chip(struct gpio_chip *gpc)
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{
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return container_of(gpc, struct s3c24xx_gpio_chip, chip);
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}
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/* these routines are exported for use by other parts of the platform
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* and system support, but are not intended to be used directly by the
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* drivers themsevles.
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*/
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static int s3c24xx_gpiolib_input(struct gpio_chip *chip, unsigned offset)
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{
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struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip);
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void __iomem *base = ourchip->base;
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unsigned long flags;
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unsigned long con;
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local_irq_save(flags);
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con = __raw_readl(base + 0x00);
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con &= ~(3 << (offset * 2));
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con |= (S3C2410_GPIO_OUTPUT & 0xf) << (offset * 2);
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__raw_writel(con, base + 0x00);
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local_irq_restore(flags);
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return 0;
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}
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static int s3c24xx_gpiolib_output(struct gpio_chip *chip,
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unsigned offset, int value)
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{
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struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip);
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void __iomem *base = ourchip->base;
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unsigned long flags;
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unsigned long dat;
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unsigned long con;
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local_irq_save(flags);
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dat = __raw_readl(base + 0x04);
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dat &= ~(1 << offset);
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if (value)
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dat |= 1 << offset;
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__raw_writel(dat, base + 0x04);
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con = __raw_readl(base + 0x00);
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con &= ~(3 << (offset * 2));
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con |= (S3C2410_GPIO_OUTPUT & 0xf) << (offset * 2);
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__raw_writel(con, base + 0x00);
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__raw_writel(dat, base + 0x04);
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local_irq_restore(flags);
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return 0;
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}
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static void s3c24xx_gpiolib_set(struct gpio_chip *chip,
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unsigned offset, int value)
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{
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struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip);
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void __iomem *base = ourchip->base;
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unsigned long flags;
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unsigned long dat;
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local_irq_save(flags);
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dat = __raw_readl(base + 0x04);
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dat &= ~(1 << offset);
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if (value)
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dat |= 1 << offset;
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__raw_writel(dat, base + 0x04);
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local_irq_restore(flags);
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}
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static int s3c24xx_gpiolib_get(struct gpio_chip *chip, unsigned offset)
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{
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struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip);
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unsigned long val;
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val = __raw_readl(ourchip->base + 0x04);
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val >>= offset;
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val &= 1;
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return val;
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}
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static int s3c24xx_gpiolib_banka_input(struct gpio_chip *chip, unsigned offset)
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{
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return -EINVAL;
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@ -125,7 +33,7 @@ static int s3c24xx_gpiolib_banka_input(struct gpio_chip *chip, unsigned offset)
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static int s3c24xx_gpiolib_banka_output(struct gpio_chip *chip,
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unsigned offset, int value)
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{
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struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip);
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struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
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void __iomem *base = ourchip->base;
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unsigned long flags;
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unsigned long dat;
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@ -151,7 +59,7 @@ static int s3c24xx_gpiolib_banka_output(struct gpio_chip *chip,
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return 0;
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}
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static struct s3c24xx_gpio_chip gpios[] = {
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static struct s3c_gpio_chip gpios[] = {
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[0] = {
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.base = S3C24XX_GPIO_BASE(S3C2410_GPA0),
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.chip = {
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@ -219,34 +127,13 @@ static struct s3c24xx_gpio_chip gpios[] = {
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},
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};
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static __init void s3c24xx_gpiolib_add(struct s3c24xx_gpio_chip *chip)
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{
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struct gpio_chip *gc = &chip->chip;
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BUG_ON(!chip->base);
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BUG_ON(!gc->label);
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BUG_ON(!gc->ngpio);
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if (!gc->direction_input)
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gc->direction_input = s3c24xx_gpiolib_input;
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if (!gc->direction_output)
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gc->direction_output = s3c24xx_gpiolib_output;
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if (!gc->set)
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gc->set = s3c24xx_gpiolib_set;
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if (!gc->get)
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gc->get = s3c24xx_gpiolib_get;
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/* gpiochip_add() prints own failure message on error. */
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gpiochip_add(gc);
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}
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static __init int s3c24xx_gpiolib_init(void)
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{
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struct s3c24xx_gpio_chip *chip = gpios;
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struct s3c_gpio_chip *chip = gpios;
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int gpn;
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for (gpn = 0; gpn < ARRAY_SIZE(gpios); gpn++, chip++)
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s3c24xx_gpiolib_add(chip);
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s3c_gpiolib_add(chip);
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return 0;
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}
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