IB/hfi1: Add functions to parse BTH/IB headers
Improve code readablity by adding inline functions to read specific BTH/IB fields without knowledge of byte offsets. Reviewed-by: Brian Welty <brian.welty@intel.com> Reviewed-by: Dasaratharaman Chandramouli <dasaratharaman.chandramouli@intel.com> Reviewed-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Don Hiatt <don.hiatt@intel.com> Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
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@ -286,7 +286,7 @@ static void rcv_hdrerr(struct hfi1_ctxtdata *rcd, struct hfi1_pportdata *ppd,
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goto drop;
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}
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/* Get the destination QP number. */
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qp_num = be32_to_cpu(ohdr->bth[1]) & RVT_QPN_MASK;
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qp_num = ib_bth_get_qpn(ohdr);
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if (lid < be16_to_cpu(IB_MULTICAST_LID_BASE)) {
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struct rvt_qp *qp;
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unsigned long flags;
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@ -438,7 +438,7 @@ void hfi1_process_ecn_slowpath(struct rvt_qp *qp, struct hfi1_packet *pkt,
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case IB_QPT_GSI:
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case IB_QPT_UD:
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rlid = ib_get_slid(hdr);
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rqpn = be32_to_cpu(ohdr->u.ud.deth[1]) & RVT_QPN_MASK;
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rqpn = ib_get_sqpn(ohdr);
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svc_type = IB_CC_SVCTYPE_UD;
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is_mcast = (dlid > be16_to_cpu(IB_MULTICAST_LID_BASE)) &&
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(dlid != be16_to_cpu(IB_LID_PERMISSIVE));
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@ -461,7 +461,7 @@ void hfi1_process_ecn_slowpath(struct rvt_qp *qp, struct hfi1_packet *pkt,
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bth1 = be32_to_cpu(ohdr->bth[1]);
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if (do_cnp && (bth1 & IB_FECN_SMASK)) {
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u16 pkey = (u16)be32_to_cpu(ohdr->bth[0]);
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u16 pkey = ib_bth_get_pkey(ohdr);
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return_cnp(ibp, qp, rqpn, pkey, dlid, rlid, sc, grh);
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}
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@ -765,7 +765,7 @@ void hfi1_send_rc_ack(struct hfi1_ctxtdata *rcd, struct rvt_qp *qp,
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ohdr->u.aeth = rvt_compute_aeth(qp);
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sc5 = ibp->sl_to_sc[rdma_ah_get_sl(&qp->remote_ah_attr)];
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/* set PBC_DC_INFO bit (aka SC[4]) in pbc_flags */
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pbc_flags |= ((!!(sc5 & 0x10)) << PBC_DC_INFO_SHIFT);
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pbc_flags |= (ib_is_sc5(sc5) << PBC_DC_INFO_SHIFT);
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lrh0 |= (sc5 & 0xf) << 12 | (rdma_ah_get_sl(&qp->remote_ah_attr)
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& 0xf) << 4;
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hdr.lrh[0] = cpu_to_be16(lrh0);
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@ -1009,7 +1009,7 @@ void hfi1_rc_send_complete(struct rvt_qp *qp, struct ib_header *hdr)
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return;
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}
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psn = be32_to_cpu(ohdr->bth[2]);
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psn = ib_bth_get_psn(ohdr);
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reset_sending_psn(qp, psn);
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/*
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@ -1943,7 +1943,7 @@ void hfi1_rc_rcv(struct hfi1_packet *packet)
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is_fecn = process_ecn(qp, packet, false);
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psn = be32_to_cpu(ohdr->bth[2]);
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psn = ib_bth_get_psn(ohdr);
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opcode = ib_bth_get_opcode(ohdr);
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/*
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@ -2388,7 +2388,7 @@ void hfi1_rc_hdrerr(
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if (hfi1_ruc_check_hdr(ibp, hdr, has_grh, qp, bth0))
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return;
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psn = be32_to_cpu(ohdr->bth[2]);
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psn = ib_bth_get_psn(ohdr);
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opcode = ib_bth_get_opcode(ohdr);
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/* Only deal with RDMA Writes for now */
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@ -319,7 +319,7 @@ void hfi1_uc_rcv(struct hfi1_packet *packet)
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process_ecn(qp, packet, true);
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psn = be32_to_cpu(ohdr->bth[2]);
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psn = ib_bth_get_psn(ohdr);
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opcode = ib_bth_get_opcode(ohdr);
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/* Compare the PSN verses the expected PSN. */
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@ -549,7 +549,7 @@ void return_cnp(struct hfi1_ibport *ibp, struct rvt_qp *qp, u32 remote_qpn,
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hdr.lrh[3] = cpu_to_be16(slid);
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plen = 2 /* PBC */ + hwords;
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pbc_flags |= (!!(sc5 & 0x10)) << PBC_DC_INFO_SHIFT;
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pbc_flags |= (ib_is_sc5(sc5) << PBC_DC_INFO_SHIFT);
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vl = sc_to_vlt(ppd->dd, sc5);
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pbc = create_pbc(ppd, pbc_flags, qp->srate_mbps, vl, plen);
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if (ctxt) {
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@ -689,8 +689,8 @@ void hfi1_ud_rcv(struct hfi1_packet *packet)
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u16 slid;
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u8 extra_bytes;
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qkey = be32_to_cpu(ohdr->u.ud.deth[0]);
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src_qp = be32_to_cpu(ohdr->u.ud.deth[1]) & RVT_QPN_MASK;
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qkey = ib_get_qkey(ohdr);
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src_qp = ib_get_sqpn(ohdr);
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dlid = ib_get_dlid(hdr);
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bth1 = be32_to_cpu(ohdr->bth[1]);
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slid = ib_get_slid(hdr);
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@ -595,7 +595,7 @@ void hfi1_ib_rcv(struct hfi1_packet *packet)
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inc_opstats(tlen, &rcd->opstats->stats[opcode]);
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/* Get the destination QP number. */
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qp_num = be32_to_cpu(packet->ohdr->bth[1]) & RVT_QPN_MASK;
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qp_num = ib_bth_get_qpn(packet->ohdr);
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lid = ib_get_dlid(hdr);
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if (unlikely((lid >= be16_to_cpu(IB_MULTICAST_LID_BASE)) &&
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(lid != be16_to_cpu(IB_LID_PERMISSIVE)))) {
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@ -863,7 +863,7 @@ int hfi1_verbs_send_dma(struct rvt_qp *qp, struct hfi1_pkt_state *ps,
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/* No vl15 here */
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/* set PBC_DC_INFO bit (aka SC[4]) in pbc_flags */
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pbc |= (!!(sc5 & 0x10)) << PBC_DC_INFO_SHIFT;
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pbc |= (ib_is_sc5(sc5) << PBC_DC_INFO_SHIFT);
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if (unlikely(hfi1_dbg_fault_opcode(qp, opcode, false)))
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pbc = hfi1_fault_tx(qp, opcode, pbc);
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@ -999,7 +999,7 @@ int hfi1_verbs_send_pio(struct rvt_qp *qp, struct hfi1_pkt_state *ps,
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u8 opcode = get_opcode(&tx->phdr.hdr);
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/* set PBC_DC_INFO bit (aka SC[4]) in pbc_flags */
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pbc |= (!!(sc5 & 0x10)) << PBC_DC_INFO_SHIFT;
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pbc |= (ib_is_sc5(sc5) << PBC_DC_INFO_SHIFT);
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if (unlikely(hfi1_dbg_fault_opcode(qp, opcode, false)))
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pbc = hfi1_fault_tx(qp, opcode, pbc);
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pbc = create_pbc(ppd, pbc, qp->srate_mbps, vl, plen);
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@ -193,8 +193,12 @@ static inline void put_ib_ateth_compare(u64 val, struct ib_atomic_eth *ateth)
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#define IB_LNH_MASK 3
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#define IB_SC_MASK 0xf
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#define IB_SC_SHIFT 12
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#define IB_SC5_MASK 0x10
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#define IB_SL_MASK 0xf
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#define IB_SL_SHIFT 4
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#define IB_SL_SHIFT 4
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#define IB_LVER_MASK 0xf
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#define IB_LVER_SHIFT 8
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static inline u8 ib_get_lnh(struct ib_header *hdr)
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{
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@ -206,6 +210,11 @@ static inline u8 ib_get_sc(struct ib_header *hdr)
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return ((be16_to_cpu(hdr->lrh[0]) >> IB_SC_SHIFT) & IB_SC_MASK);
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}
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static inline bool ib_is_sc5(u16 sc5)
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{
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return !!(sc5 & IB_SC5_MASK);
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}
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static inline u8 ib_get_sl(struct ib_header *hdr)
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{
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return ((be16_to_cpu(hdr->lrh[0]) >> IB_SL_SHIFT) & IB_SL_MASK);
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@ -221,6 +230,27 @@ static inline u16 ib_get_slid(struct ib_header *hdr)
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return (be16_to_cpu(hdr->lrh[3]));
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}
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static inline u8 ib_get_lver(struct ib_header *hdr)
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{
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return (u8)((be16_to_cpu(hdr->lrh[0]) >> IB_LVER_SHIFT) &
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IB_LVER_MASK);
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}
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static inline u16 ib_get_len(struct ib_header *hdr)
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{
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return (u16)(be16_to_cpu(hdr->lrh[2]));
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}
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static inline u32 ib_get_qkey(struct ib_other_headers *ohdr)
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{
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return be32_to_cpu(ohdr->u.ud.deth[0]);
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}
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static inline u32 ib_get_sqpn(struct ib_other_headers *ohdr)
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{
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return ((be32_to_cpu(ohdr->u.ud.deth[1])) & IB_QPN_MASK);
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}
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/*
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* BTH
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*/
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@ -229,6 +259,14 @@ static inline u16 ib_get_slid(struct ib_header *hdr)
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#define IB_BTH_PAD_MASK 3
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#define IB_BTH_PKEY_MASK 0xffff
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#define IB_BTH_PAD_SHIFT 20
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#define IB_BTH_A_MASK 1
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#define IB_BTH_A_SHIFT 31
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#define IB_BTH_M_MASK 1
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#define IB_BTH_M_SHIFT 22
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#define IB_BTH_SE_MASK 1
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#define IB_BTH_SE_SHIFT 23
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#define IB_BTH_TVER_MASK 0xf
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#define IB_BTH_TVER_SHIFT 16
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static inline u8 ib_bth_get_pad(struct ib_other_headers *ohdr)
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{
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IB_BTH_OPCODE_MASK);
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}
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static inline u8 ib_bth_get_ackreq(struct ib_other_headers *ohdr)
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{
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return (u8)((be32_to_cpu(ohdr->bth[2]) >> IB_BTH_A_SHIFT) &
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IB_BTH_A_MASK);
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}
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static inline u8 ib_bth_get_migreq(struct ib_other_headers *ohdr)
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{
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return (u8)((be32_to_cpu(ohdr->bth[0]) >> IB_BTH_M_SHIFT) &
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IB_BTH_M_MASK);
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}
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static inline u8 ib_bth_get_se(struct ib_other_headers *ohdr)
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{
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return (u8)((be32_to_cpu(ohdr->bth[0]) >> IB_BTH_SE_SHIFT) &
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IB_BTH_SE_MASK);
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}
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static inline u32 ib_bth_get_psn(struct ib_other_headers *ohdr)
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{
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return (u32)(be32_to_cpu(ohdr->bth[2]));
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}
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static inline u32 ib_bth_get_qpn(struct ib_other_headers *ohdr)
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{
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return (u32)((be32_to_cpu(ohdr->bth[1])) & IB_QPN_MASK);
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}
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static inline u8 ib_bth_get_becn(struct ib_other_headers *ohdr)
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{
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return (u8)((be32_to_cpu(ohdr->bth[1]) >> IB_BECN_SHIFT) &
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IB_BECN_MASK);
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}
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static inline u8 ib_bth_get_fecn(struct ib_other_headers *ohdr)
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{
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return (u8)((be32_to_cpu(ohdr->bth[1]) >> IB_FECN_SHIFT) &
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IB_FECN_MASK);
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}
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static inline u8 ib_bth_get_tver(struct ib_other_headers *ohdr)
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{
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return (u8)((be32_to_cpu(ohdr->bth[0]) >> IB_BTH_TVER_SHIFT) &
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IB_BTH_TVER_MASK);
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}
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#endif /* IB_HDRS_H */
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@ -664,6 +664,8 @@ union rdma_network_hdr {
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};
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};
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#define IB_QPN_MASK 0xFFFFFF
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enum {
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IB_MULTICAST_QPN = 0xffffff
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};
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@ -396,7 +396,7 @@ struct rvt_srq {
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#define RVT_QPNMAP_ENTRIES (RVT_QPN_MAX / PAGE_SIZE / BITS_PER_BYTE)
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#define RVT_BITS_PER_PAGE (PAGE_SIZE * BITS_PER_BYTE)
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#define RVT_BITS_PER_PAGE_MASK (RVT_BITS_PER_PAGE - 1)
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#define RVT_QPN_MASK 0xFFFFFF
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#define RVT_QPN_MASK IB_QPN_MASK
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/*
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* QPN-map pages start out as NULL, they get allocated upon
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