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x86/tsr: Fix tsc frequency enumeration bug on Lightning Mountain SoC 

Frequency descriptor of Lightning Mountain SoC doesn't have all the
frequency entries so resulting in the below failure causing a kernel hang:

    Error MSR_FSB_FREQ index 15 is unknown
    tsc: Fast TSC calibration failed

So, add all the frequency entries in the Lightning Mountain SoC frequency
descriptor.

Fixes: 0cc5359d8f ("x86/cpu: Update init data for new Airmont CPU model")
Fixes: 812c2d7506 ("x86/tsc_msr: Use named struct initializers")
Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/211c643ae217604b46cbec43a2c0423946dc7d2d.1596440057.git.eswara.kota@linux.intel.com
This commit is contained in:
Dilip Kota 2020-08-03 15:56:36 +08:00 committed by Ingo Molnar
parent 475f63ae63
commit 7d98585860
1 changed files with 7 additions and 2 deletions
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9
arch/x86/kernel/tsc_msr.c
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@ -133,10 +133,15 @@ static const struct freq_desc freq_desc_ann = {
.mask = 0x0f,
};
/* 24 MHz crystal? : 24 * 13 / 4 = 78 MHz */
/*
* 24 MHz crystal? : 24 * 13 / 4 = 78 MHz
* Frequency step for Lightning Mountain SoC is fixed to 78 MHz,
* so all the frequency entries are 78000.
*/
static const struct freq_desc freq_desc_lgm = {
.use_msr_plat = true,
.freqs = { 78000, 78000, 78000, 78000, 78000, 78000, 78000, 78000 },
.freqs = { 78000, 78000, 78000, 78000, 78000, 78000, 78000, 78000,
78000, 78000, 78000, 78000, 78000, 78000, 78000, 78000 },
.mask = 0x0f,
};