irqchip/gic-v3-its: Add VPE irq domain allocation/teardown
When creating a VM, the low level GICv4 code is responsible for: - allocating each VPE a unique VPEID - allocating a doorbell interrupt for each VPE - allocating the pending tables for each VPE - allocating the property table for the VM This of course has to be reversed when the VM is brought down. All of this is wired into the irq domain alloc/free methods. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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@ -148,6 +148,7 @@ static struct irq_domain *its_parent;
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#define ITS_LIST_MAX 16
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static unsigned long its_list_map;
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static DEFINE_IDA(its_vpeid_ida);
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#define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist))
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#define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base)
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@ -1255,6 +1256,11 @@ static struct page *its_allocate_prop_table(gfp_t gfp_flags)
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return prop_page;
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}
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static void its_free_prop_table(struct page *prop_page)
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{
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free_pages((unsigned long)page_address(prop_page),
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get_order(LPI_PROPBASE_SZ));
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}
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static int __init its_alloc_lpi_tables(void)
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{
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@ -1557,6 +1563,12 @@ static struct page *its_allocate_pending_table(gfp_t gfp_flags)
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return pend_page;
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}
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static void its_free_pending_table(struct page *pt)
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{
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free_pages((unsigned long)page_address(pt),
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get_order(max_t(u32, LPI_PENDBASE_SZ, SZ_64K)));
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}
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static void its_cpu_init_lpis(void)
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{
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void __iomem *rbase = gic_data_rdist_rd_base();
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@ -1779,6 +1791,34 @@ static bool its_alloc_device_table(struct its_node *its, u32 dev_id)
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return its_alloc_table_entry(baser, dev_id);
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}
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static bool its_alloc_vpe_table(u32 vpe_id)
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{
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struct its_node *its;
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/*
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* Make sure the L2 tables are allocated on *all* v4 ITSs. We
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* could try and only do it on ITSs corresponding to devices
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* that have interrupts targeted at this VPE, but the
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* complexity becomes crazy (and you have tons of memory
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* anyway, right?).
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*/
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list_for_each_entry(its, &its_nodes, entry) {
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struct its_baser *baser;
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if (!its->is_v4)
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continue;
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baser = its_get_baser(its, GITS_BASER_TYPE_VCPU);
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if (!baser)
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return false;
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if (!its_alloc_table_entry(baser, vpe_id))
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return false;
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}
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return true;
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}
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static struct its_device *its_create_device(struct its_node *its, u32 dev_id,
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int nvecs)
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{
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@ -2036,7 +2076,136 @@ static struct irq_chip its_vpe_irq_chip = {
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.name = "GICv4-vpe",
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};
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static int its_vpe_id_alloc(void)
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{
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return ida_simple_get(&its_vpeid_ida, 0, 1 << 16, GFP_KERNEL);
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}
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static void its_vpe_id_free(u16 id)
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{
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ida_simple_remove(&its_vpeid_ida, id);
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}
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static int its_vpe_init(struct its_vpe *vpe)
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{
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struct page *vpt_page;
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int vpe_id;
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/* Allocate vpe_id */
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vpe_id = its_vpe_id_alloc();
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if (vpe_id < 0)
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return vpe_id;
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/* Allocate VPT */
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vpt_page = its_allocate_pending_table(GFP_KERNEL);
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if (!vpt_page) {
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its_vpe_id_free(vpe_id);
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return -ENOMEM;
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}
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if (!its_alloc_vpe_table(vpe_id)) {
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its_vpe_id_free(vpe_id);
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its_free_pending_table(vpe->vpt_page);
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return -ENOMEM;
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}
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vpe->vpe_id = vpe_id;
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vpe->vpt_page = vpt_page;
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return 0;
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}
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static void its_vpe_teardown(struct its_vpe *vpe)
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{
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its_vpe_id_free(vpe->vpe_id);
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its_free_pending_table(vpe->vpt_page);
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}
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static void its_vpe_irq_domain_free(struct irq_domain *domain,
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unsigned int virq,
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unsigned int nr_irqs)
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{
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struct its_vm *vm = domain->host_data;
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int i;
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irq_domain_free_irqs_parent(domain, virq, nr_irqs);
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for (i = 0; i < nr_irqs; i++) {
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struct irq_data *data = irq_domain_get_irq_data(domain,
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virq + i);
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struct its_vpe *vpe = irq_data_get_irq_chip_data(data);
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BUG_ON(vm != vpe->its_vm);
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clear_bit(data->hwirq, vm->db_bitmap);
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its_vpe_teardown(vpe);
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irq_domain_reset_irq_data(data);
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}
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if (bitmap_empty(vm->db_bitmap, vm->nr_db_lpis)) {
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its_lpi_free_chunks(vm->db_bitmap, vm->db_lpi_base, vm->nr_db_lpis);
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its_free_prop_table(vm->vprop_page);
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}
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}
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static int its_vpe_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
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unsigned int nr_irqs, void *args)
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{
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struct its_vm *vm = args;
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unsigned long *bitmap;
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struct page *vprop_page;
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int base, nr_ids, i, err = 0;
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BUG_ON(!vm);
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bitmap = its_lpi_alloc_chunks(nr_irqs, &base, &nr_ids);
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if (!bitmap)
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return -ENOMEM;
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if (nr_ids < nr_irqs) {
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its_lpi_free_chunks(bitmap, base, nr_ids);
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return -ENOMEM;
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}
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vprop_page = its_allocate_prop_table(GFP_KERNEL);
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if (!vprop_page) {
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its_lpi_free_chunks(bitmap, base, nr_ids);
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return -ENOMEM;
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}
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vm->db_bitmap = bitmap;
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vm->db_lpi_base = base;
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vm->nr_db_lpis = nr_ids;
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vm->vprop_page = vprop_page;
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for (i = 0; i < nr_irqs; i++) {
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vm->vpes[i]->vpe_db_lpi = base + i;
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err = its_vpe_init(vm->vpes[i]);
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if (err)
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break;
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err = its_irq_gic_domain_alloc(domain, virq + i,
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vm->vpes[i]->vpe_db_lpi);
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if (err)
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break;
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irq_domain_set_hwirq_and_chip(domain, virq + i, i,
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&its_vpe_irq_chip, vm->vpes[i]);
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set_bit(i, bitmap);
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}
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if (err) {
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if (i > 0)
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its_vpe_irq_domain_free(domain, virq, i - 1);
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its_lpi_free_chunks(bitmap, base, nr_ids);
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its_free_prop_table(vprop_page);
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}
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return err;
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}
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static const struct irq_domain_ops its_vpe_domain_ops = {
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.alloc = its_vpe_irq_domain_alloc,
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.free = its_vpe_irq_domain_free,
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};
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static int its_force_quiescent(void __iomem *base)
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