ARM: shmobile: r8a7740: add HDMI interrupt support
It is required from sh_mobile_hdmi driver. This patch is based on v1.0 manual Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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@ -71,10 +71,12 @@ enum {
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DMAC3_1_DEI0, DMAC3_1_DEI1, DMAC3_1_DEI2, DMAC3_1_DEI3,
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DMAC3_2_DEI4, DMAC3_2_DEI5, DMAC3_2_DADERR,
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SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM,
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HDMI,
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USBH_INT, USBH_OHCI, USBH_EHCI, USBH_PME, USBH_BIND,
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RSPI_OVRF, RSPI_SPTEF, RSPI_SPRF,
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SPU2_0, SPU2_1,
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FSI, FMSI,
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HDMI_SSS, HDMI_KEY,
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IPMMU,
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AP_ARM_CTIIRQ, AP_ARM_PMURQ,
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MFIS2,
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@ -182,6 +184,7 @@ static struct intc_vect intca_vectors[] __initdata = {
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INTC_VECT(USBH_EHCI, 0x1580),
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INTC_VECT(USBH_PME, 0x15A0),
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INTC_VECT(USBH_BIND, 0x15C0),
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INTC_VECT(HDMI, 0x1700),
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INTC_VECT(RSPI_OVRF, 0x1780),
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INTC_VECT(RSPI_SPTEF, 0x17A0),
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INTC_VECT(RSPI_SPRF, 0x17C0),
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@ -189,6 +192,8 @@ static struct intc_vect intca_vectors[] __initdata = {
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INTC_VECT(SPU2_1, 0x1820),
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INTC_VECT(FSI, 0x1840),
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INTC_VECT(FMSI, 0x1860),
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INTC_VECT(HDMI_SSS, 0x18A0),
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INTC_VECT(HDMI_KEY, 0x18C0),
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INTC_VECT(IPMMU, 0x1920),
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INTC_VECT(AP_ARM_CTIIRQ, 0x1980),
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INTC_VECT(AP_ARM_PMURQ, 0x19A0),
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@ -304,11 +309,11 @@ static struct intc_mask_reg intca_mask_registers[] __initdata = {
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USBH_EHCI, USBH_PME, USBH_BIND, 0 } },
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/* IMR3A3 / IMCR3A3 */
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{ /* IMR4A3 / IMCR4A3 */ 0xe6950090, 0xe69500d0, 8,
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{ 0, 0, 0, 0,
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{ HDMI, 0, 0, 0,
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RSPI_OVRF, RSPI_SPTEF, RSPI_SPRF, 0 } },
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{ /* IMR5A3 / IMCR5A3 */ 0xe6950094, 0xe69500d4, 8,
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{ SPU2_0, SPU2_1, FSI, FMSI,
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0, 0, 0, 0 } },
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0, HDMI_SSS, HDMI_KEY, 0 } },
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{ /* IMR6A3 / IMCR6A3 */ 0xe6950098, 0xe69500d8, 8,
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{ 0, IPMMU, 0, 0,
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AP_ARM_CTIIRQ, AP_ARM_PMURQ, 0, 0 } },
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@ -353,10 +358,10 @@ static struct intc_prio_reg intca_prio_registers[] __initdata = {
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{ 0xe6950014, 0, 16, 4, /* IPRFA3 */ { USBH2, 0, 0, 0 } },
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/* IPRGA3 */
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/* IPRHA3 */
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/* IPRIA3 */
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{ 0xe6950020, 0, 16, 4, /* IPRIA3 */ { HDMI, 0, 0, 0 } },
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{ 0xe6950024, 0, 16, 4, /* IPRJA3 */ { RSPI, 0, 0, 0 } },
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{ 0xe6950028, 0, 16, 4, /* IPRKA3 */ { SPU2, 0, FSI, FMSI } },
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/* IPRLA3 */
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{ 0xe695002c, 0, 16, 4, /* IPRLA3 */ { 0, HDMI_SSS, HDMI_KEY, 0 } },
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{ 0xe6950030, 0, 16, 4, /* IPRMA3 */ { IPMMU, 0, 0, 0 } },
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{ 0xe6950034, 0, 16, 4, /* IPRNA3 */ { AP_ARM2, 0, 0, 0 } },
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{ 0xe6950038, 0, 16, 4, /* IPROA3 */ { MFIS2, CPORTR2S,
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