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arm64: dts: bitmain: Add reset controller support for BM1880 SoC 

Add reset controller support for Bitmain BM1880 SoC. This commit also
adds reset support to UART peripherals.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
This commit is contained in:
Manivannan Sadhasivam 2019-08-03 17:50:13 +05:30
parent 609488bc97
commit 7d545e779a
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GPG Key ID: 559F11E6FE91CEF5
1 changed files with 11 additions and 0 deletions
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11
arch/arm64/boot/dts/bitmain/bm1880.dtsi
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@ -5,6 +5,7 @@
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/reset/bitmain,bm1880-reset.h>
/ {
compatible = "bitmain,bm1880";
@ -92,6 +93,12 @@
compatible = "bitmain,bm1880-pinctrl";
reg = <0x50 0x4B0>;
};
rst: reset-controller@c00 {
compatible = "bitmain,bm1880-reset";
reg = <0xc00 0x8>;
#reset-cells = <1>;
};
};
gpio0: gpio@50027000 {
@ -154,6 +161,7 @@
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
resets = <&rst BM1880_RST_UART0_1_CLK>;
status = "disabled";
};
@ -163,6 +171,7 @@
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
resets = <&rst BM1880_RST_UART0_1_ACLK>;
status = "disabled";
};
@ -172,6 +181,7 @@
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
resets = <&rst BM1880_RST_UART2_3_CLK>;
status = "disabled";
};
@ -181,6 +191,7 @@
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
resets = <&rst BM1880_RST_UART2_3_ACLK>;
status = "disabled";
};
};