- add trivial bindings for MT8195
- fix dtbs_check warnings - add pinmux for build-in Wifi on MT7622 evaluation borad MT8183: - fix USB wakeup register - add regulator for EVB board - add registers to mailbox consumers - add thermal zone and trip points for CPU cooling - Add new boards: * ASUS Chromebook Flip CM3 * ASUS Chromebook Detachable CM3 * Acer Chromebook Spin 311 * Lenovo 10e Chromebook Tablet MT8173: - fix PHY property in DSI - fix power-domain for PMIC wrapper Pumkin: - add MT8516 based board - add MT8183 based board - fix reset pin for MT8167 and MT8516 based boards -----BEGIN PGP SIGNATURE----- iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAmBlzocXHG1hdHRoaWFz LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH6VNQ/7BUBXC23J+NJV1dZmyxtxBJC9 e37AbYb+BiMfQdGcKP/De8gSPh5HEp1r/6yGxoeJmKMjlVtghQNNC5RXyfAo/Irk czSwIEmGAzgbmQCdI2zknlobW+BNjbL2Ys8nZAjdI8hzW1J0auUO2+fQFJTDw5gH uaD5IFrOXgDs7rXv3fmAZSw1WHKPPyjuMxePD8EfTGUnZ77IPTEwaNxPHblTZBl7 MPKkc05swqrB1N2+IH0IA8Aad9HTi2vYloW0OWE7X6p1uD1Jp+AexNPDYXoLZe6s uUXezEoy/juMbtSCUndJj1yE5xtUMPlhFaUzjf+L9Qhz3KB0DN6pvvJRUhy7Kbhe EZCf28jM8LCRYD5Y8/wAPsDXZCxLkci4SIO2kAUP52URgTsKjoL57xJE4hvsEnXf W3/r8tA4Vv93xtWNi0UYrDqj7yYo/ufpb6z78pOrpwjri5/Guy3lV4eZp6t/Fx8Z sNFqhEiW04C3kmGHhcovwTTg+7RrGHxDOdwHNRL83kSw3fva2H78ehVydq10WE+m miSRFGos0bG48UFEMrLFQtABr2kqcpIgm4/TmgCiG6LPcEIbJkeVakyQfumfZrfG VKuch9lKWU4pIyt27rYPW8ipgVcMzzZ4BSzqG6ZomvsTnP59zGcI2KAVlew1q++0 +UeWZhgVGlT3C8hG06s= =RMBh -----END PGP SIGNATURE----- Merge tag 'v5.12-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt - add trivial bindings for MT8195 - fix dtbs_check warnings - add pinmux for build-in Wifi on MT7622 evaluation borad MT8183: - fix USB wakeup register - add regulator for EVB board - add registers to mailbox consumers - add thermal zone and trip points for CPU cooling - Add new boards: * ASUS Chromebook Flip CM3 * ASUS Chromebook Detachable CM3 * Acer Chromebook Spin 311 * Lenovo 10e Chromebook Tablet MT8173: - fix PHY property in DSI - fix power-domain for PMIC wrapper Pumkin: - add MT8516 based board - add MT8183 based board - fix reset pin for MT8167 and MT8516 based boards * tag 'v5.12-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: (29 commits) arm64: dts: mediatek: fix reset GPIO level on pumpkin arm64: dts: mt8183: add mt8183 pumpkin board dt-bindings: arm64: dts: mediatek: Add mt8183-pumpkin board arm64: dts: mt8183: Add kukui kodama board arm64: dts: mt8183: Add kukui kakadu board dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-kodama dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-kakadu dt-bindings: arm64: dts: mediatek: Add mt8516-pumpkin board arm64: dts: mt7622: add ePA/eLNA pinmux for built-in WiFi dt-bindings: nvmem: mediatek: add support for MediaTek mt8192 SoC arm64: dts: mt8173: fix wrong power-domain phandle of pmic arm64: dts: mt8183: Configure CPU cooling arm64: dts: mt8183: add thermal zone node arm64: dts: mt8183: Add gce client reg for display subcomponents arm64: dts: mediatek: mt8183: fix dtbs_check warning arm64: dts: mediatek: mt7622: harmonize node names and compatibles arm64: dts: mediatek: mt8516: harmonize node names and compatibles arm64: dts: mediatek: mt2712: harmonize node names arm64: dts: mediatek: mt8173: fix dtbs_check warning arm64: dts: mt8173: fix property typo of 'phys' in dsi node ... Link: https://lore.kernel.org/r/d1121630-5778-0955-fac7-f921174defe7@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
7d534c3a5e
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@ -118,6 +118,10 @@ properties:
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||||||
- enum:
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- enum:
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||||||
- mediatek,mt8183-evb
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- mediatek,mt8183-evb
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- const: mediatek,mt8183
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- const: mediatek,mt8183
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- items:
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- enum:
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- mediatek,mt8195-evb
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- const: mediatek,mt8195
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- description: Google Krane (Lenovo IdeaPad Duet, 10e,...)
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- description: Google Krane (Lenovo IdeaPad Duet, 10e,...)
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items:
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items:
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- enum:
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- enum:
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@ -125,6 +129,38 @@ properties:
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- google,krane-sku176
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- google,krane-sku176
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- const: google,krane
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- const: google,krane
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- const: mediatek,mt8183
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- const: mediatek,mt8183
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- description: Google Damu (ASUS Chromebook Flip CM3)
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items:
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- const: google,damu
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- const: mediatek,mt8183
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- description: Google Juniper (Acer Chromebook Spin 311)
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items:
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- const: google,juniper-sku16
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- const: google,juniper
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- const: mediatek,mt8183
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- description: Google Kakadu (ASUS Chromebook Detachable CM3)
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items:
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- const: google,kakadu-rev3
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- const: google,kakadu-rev2
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- const: google,kakadu
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- const: mediatek,mt8183
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- description: Google Kodama (Lenovo 10e Chromebook Tablet)
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items:
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- enum:
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- google,kodama-sku16
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- google,kodama-sku272
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- google,kodama-sku288
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- google,kodama-sku32
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- const: google,kodama
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- const: mediatek,mt8183
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- items:
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- enum:
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- mediatek,mt8183-pumpkin
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- const: mediatek,mt8183
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- items:
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- enum:
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- mediatek,mt8516-pumpkin
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- const: mediatek,mt8516
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additionalProperties: true
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additionalProperties: true
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@ -7,6 +7,7 @@ Required properties:
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"mediatek,mt7622-efuse", "mediatek,efuse": for MT7622
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"mediatek,mt7622-efuse", "mediatek,efuse": for MT7622
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"mediatek,mt7623-efuse", "mediatek,efuse": for MT7623
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"mediatek,mt7623-efuse", "mediatek,efuse": for MT7623
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"mediatek,mt8173-efuse" or "mediatek,efuse": for MT8173
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"mediatek,mt8173-efuse" or "mediatek,efuse": for MT8173
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"mediatek,mt8192-efuse", "mediatek,efuse": for MT8192
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"mediatek,mt8516-efuse", "mediatek,efuse": for MT8516
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"mediatek,mt8516-efuse", "mediatek,efuse": for MT8516
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- reg: Should contain registers location and length
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- reg: Should contain registers location and length
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@ -20,6 +20,7 @@ Required properties:
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* "mediatek,mt8173-uart" for MT8173 compatible UARTS
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* "mediatek,mt8173-uart" for MT8173 compatible UARTS
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* "mediatek,mt8183-uart", "mediatek,mt6577-uart" for MT8183 compatible UARTS
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* "mediatek,mt8183-uart", "mediatek,mt6577-uart" for MT8183 compatible UARTS
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* "mediatek,mt8192-uart", "mediatek,mt6577-uart" for MT8192 compatible UARTS
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* "mediatek,mt8192-uart", "mediatek,mt6577-uart" for MT8192 compatible UARTS
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* "mediatek,mt8195-uart", "mediatek,mt6577-uart" for MT8195 compatible UARTS
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* "mediatek,mt8516-uart" for MT8516 compatible UARTS
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* "mediatek,mt8516-uart" for MT8516 compatible UARTS
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* "mediatek,mt6577-uart" for MT6577 and all of the above
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* "mediatek,mt6577-uart" for MT6577 and all of the above
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@ -23,6 +23,7 @@ Required properties:
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For those SoCs that use SYST
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For those SoCs that use SYST
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* "mediatek,mt8183-timer" for MT8183 compatible timers (SYST)
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* "mediatek,mt8183-timer" for MT8183 compatible timers (SYST)
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* "mediatek,mt8192-timer" for MT8192 compatible timers (SYST)
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* "mediatek,mt8192-timer" for MT8192 compatible timers (SYST)
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* "mediatek,mt8195-timer" for MT8195 compatible timers (SYST)
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* "mediatek,mt7629-timer" for MT7629 compatible timers (SYST)
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* "mediatek,mt7629-timer" for MT7629 compatible timers (SYST)
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* "mediatek,mt6765-timer" for MT6765 and all above compatible timers (SYST)
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* "mediatek,mt6765-timer" for MT6765 and all above compatible timers (SYST)
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@ -13,7 +13,15 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana-rev7.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana-rev7.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-damu.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-juniper-sku16.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kakadu.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku16.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku272.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku288.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku32.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku0.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku0.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku176.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku176.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-pumpkin.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-evb.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-evb.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8516-pumpkin.dtb
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dtb-$(CONFIG_ARCH_MEDIATEK) += mt8516-pumpkin.dtb
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@ -805,7 +805,7 @@
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ranges;
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ranges;
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status = "disabled";
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status = "disabled";
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usb_host0: xhci@11270000 {
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usb_host0: usb@11270000 {
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compatible = "mediatek,mt2712-xhci",
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compatible = "mediatek,mt2712-xhci",
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"mediatek,mtk-xhci";
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"mediatek,mtk-xhci";
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reg = <0 0x11270000 0 0x1000>;
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reg = <0 0x11270000 0 0x1000>;
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@ -818,7 +818,7 @@
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};
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};
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};
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};
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u3phy0: usb-phy@11290000 {
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u3phy0: t-phy@11290000 {
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compatible = "mediatek,mt2712-tphy",
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compatible = "mediatek,mt2712-tphy",
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"mediatek,generic-tphy-v2";
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"mediatek,generic-tphy-v2";
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#address-cells = <1>;
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#address-cells = <1>;
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@ -869,7 +869,7 @@
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ranges;
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ranges;
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status = "disabled";
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status = "disabled";
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usb_host1: xhci@112c0000 {
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usb_host1: usb@112c0000 {
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compatible = "mediatek,mt2712-xhci",
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compatible = "mediatek,mt2712-xhci",
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"mediatek,mtk-xhci";
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"mediatek,mtk-xhci";
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reg = <0 0x112c0000 0 0x1000>;
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reg = <0 0x112c0000 0 0x1000>;
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@ -882,7 +882,7 @@
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};
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};
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};
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};
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u3phy1: usb-phy@112e0000 {
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u3phy1: t-phy@112e0000 {
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compatible = "mediatek,mt2712-tphy",
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compatible = "mediatek,mt2712-tphy",
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"mediatek,generic-tphy-v2";
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"mediatek,generic-tphy-v2";
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#address-cells = <1>;
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#address-cells = <1>;
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@ -495,6 +495,16 @@
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groups = "watchdog";
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groups = "watchdog";
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};
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};
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};
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};
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wmac_pins: wmac-pins {
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mux {
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function = "antsel";
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groups = "antsel0", "antsel1", "antsel2", "antsel3",
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"antsel4", "antsel5", "antsel6", "antsel7",
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"antsel8", "antsel9", "antsel12", "antsel13",
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"antsel14", "antsel15", "antsel16", "antsel17";
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};
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};
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};
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};
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&pwm {
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&pwm {
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@ -559,5 +569,7 @@
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};
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};
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&wmac {
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&wmac {
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pinctrl-names = "default";
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pinctrl-0 = <&wmac_pins>;
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status = "okay";
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status = "okay";
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};
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};
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@ -742,8 +742,8 @@
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status = "disabled";
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status = "disabled";
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};
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};
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u3phy: usb-phy@1a0c4000 {
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u3phy: t-phy@1a0c4000 {
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compatible = "mediatek,mt7622-u3phy",
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compatible = "mediatek,mt7622-tphy",
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"mediatek,generic-tphy-v1";
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"mediatek,generic-tphy-v1";
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reg = <0 0x1a0c4000 0 0x700>;
|
reg = <0 0x1a0c4000 0 0x700>;
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#address-cells = <2>;
|
#address-cells = <2>;
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|
@ -877,8 +877,9 @@
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status = "disabled";
|
status = "disabled";
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};
|
};
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|
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sata_phy: sata-phy@1a243000 {
|
sata_phy: t-phy@1a243000 {
|
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compatible = "mediatek,generic-tphy-v1";
|
compatible = "mediatek,mt7622-tphy",
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"mediatek,generic-tphy-v1";
|
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#address-cells = <2>;
|
#address-cells = <2>;
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#size-cells = <2>;
|
#size-cells = <2>;
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ranges;
|
ranges;
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|
|
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|
|
@ -294,7 +294,7 @@
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|
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&pwrap {
|
&pwrap {
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/* Only MT8173 E1 needs USB power domain */
|
/* Only MT8173 E1 needs USB power domain */
|
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power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
|
power-domains = <&spm MT8173_POWER_DOMAIN_USB>;
|
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|
|
||||||
pmic: mt6397 {
|
pmic: mt6397 {
|
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compatible = "mediatek,mt6397";
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compatible = "mediatek,mt6397";
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|
|
@ -516,10 +516,8 @@
|
||||||
extcon = <&extcon_usb>;
|
extcon = <&extcon_usb>;
|
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dr_mode = "otg";
|
dr_mode = "otg";
|
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wakeup-source;
|
wakeup-source;
|
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pinctrl-names = "default", "id_float", "id_ground";
|
pinctrl-names = "default";
|
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pinctrl-0 = <&usb_id_pins_float>;
|
pinctrl-0 = <&usb_id_pins_float>;
|
||||||
pinctrl-1 = <&usb_id_pins_float>;
|
|
||||||
pinctrl-2 = <&usb_id_pins_ground>;
|
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -631,7 +631,7 @@
|
||||||
#mbox-cells = <2>;
|
#mbox-cells = <2>;
|
||||||
};
|
};
|
||||||
|
|
||||||
mipi_tx0: mipi-dphy@10215000 {
|
mipi_tx0: dsi-phy@10215000 {
|
||||||
compatible = "mediatek,mt8173-mipi-tx";
|
compatible = "mediatek,mt8173-mipi-tx";
|
||||||
reg = <0 0x10215000 0 0x1000>;
|
reg = <0 0x10215000 0 0x1000>;
|
||||||
clocks = <&clk26m>;
|
clocks = <&clk26m>;
|
||||||
|
|
@ -641,7 +641,7 @@
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
mipi_tx1: mipi-dphy@10216000 {
|
mipi_tx1: dsi-phy@10216000 {
|
||||||
compatible = "mediatek,mt8173-mipi-tx";
|
compatible = "mediatek,mt8173-mipi-tx";
|
||||||
reg = <0 0x10216000 0 0x1000>;
|
reg = <0 0x10216000 0 0x1000>;
|
||||||
clocks = <&clk26m>;
|
clocks = <&clk26m>;
|
||||||
|
|
@ -926,7 +926,7 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
ssusb: usb@11271000 {
|
ssusb: usb@11271000 {
|
||||||
compatible = "mediatek,mt8173-mtu3";
|
compatible = "mediatek,mt8173-mtu3", "mediatek,mtu3";
|
||||||
reg = <0 0x11271000 0 0x3000>,
|
reg = <0 0x11271000 0 0x3000>,
|
||||||
<0 0x11280700 0 0x0100>;
|
<0 0x11280700 0 0x0100>;
|
||||||
reg-names = "mac", "ippc";
|
reg-names = "mac", "ippc";
|
||||||
|
|
@ -943,8 +943,9 @@
|
||||||
ranges;
|
ranges;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
|
|
||||||
usb_host: xhci@11270000 {
|
usb_host: usb@11270000 {
|
||||||
compatible = "mediatek,mt8173-xhci";
|
compatible = "mediatek,mt8173-xhci",
|
||||||
|
"mediatek,mtk-xhci";
|
||||||
reg = <0 0x11270000 0 0x1000>;
|
reg = <0 0x11270000 0 0x1000>;
|
||||||
reg-names = "mac";
|
reg-names = "mac";
|
||||||
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
|
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
|
||||||
|
|
@ -955,7 +956,7 @@
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
u3phy: usb-phy@11290000 {
|
u3phy: t-phy@11290000 {
|
||||||
compatible = "mediatek,mt8173-u3phy";
|
compatible = "mediatek,mt8173-u3phy";
|
||||||
reg = <0 0x11290000 0 0x800>;
|
reg = <0 0x11290000 0 0x800>;
|
||||||
#address-cells = <2>;
|
#address-cells = <2>;
|
||||||
|
|
@ -1235,7 +1236,7 @@
|
||||||
<&mmsys CLK_MM_DSI1_DIGITAL>,
|
<&mmsys CLK_MM_DSI1_DIGITAL>,
|
||||||
<&mipi_tx1>;
|
<&mipi_tx1>;
|
||||||
clock-names = "engine", "digital", "hs";
|
clock-names = "engine", "digital", "hs";
|
||||||
phy = <&mipi_tx1>;
|
phys = <&mipi_tx1>;
|
||||||
phy-names = "dphy";
|
phy-names = "dphy";
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
|
||||||
|
|
@ -352,6 +352,10 @@
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
&mfg {
|
||||||
|
domain-supply = <&mt6358_vgpu_reg>;
|
||||||
|
};
|
||||||
|
|
||||||
&spi0 {
|
&spi0 {
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&spi_pins_0>;
|
pinctrl-0 = <&spi_pins_0>;
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,31 @@
|
||||||
|
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
||||||
|
/*
|
||||||
|
* Copyright 2021 Google LLC
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
#include "mt8183-kukui-jacuzzi.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "Google damu board";
|
||||||
|
compatible = "google,damu", "mediatek,mt8183";
|
||||||
|
};
|
||||||
|
|
||||||
|
&touchscreen {
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
compatible = "hid-over-i2c";
|
||||||
|
reg = <0x10>;
|
||||||
|
interrupt-parent = <&pio>;
|
||||||
|
interrupts = <155 IRQ_TYPE_LEVEL_LOW>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&touchscreen_pins>;
|
||||||
|
|
||||||
|
post-power-on-delay-ms = <10>;
|
||||||
|
hid-descr-addr = <0x0001>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&qca_wifi {
|
||||||
|
qcom,ath10k-calibration-variant = "GO_DAMU";
|
||||||
|
};
|
||||||
|
|
||||||
|
|
@ -0,0 +1,13 @@
|
||||||
|
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
||||||
|
/*
|
||||||
|
* Copyright 2021 Google LLC
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
#include "mt8183-kukui-jacuzzi-juniper.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "Google juniper sku16 board";
|
||||||
|
compatible = "google,juniper-sku16", "google,juniper", "mediatek,mt8183";
|
||||||
|
};
|
||||||
|
|
||||||
|
|
@ -0,0 +1,27 @@
|
||||||
|
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
||||||
|
/*
|
||||||
|
* Copyright 2021 Google LLC
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
#include "mt8183-kukui-jacuzzi.dtsi"
|
||||||
|
|
||||||
|
&i2c2 {
|
||||||
|
trackpad@2c {
|
||||||
|
compatible = "hid-over-i2c";
|
||||||
|
reg = <0x2c>;
|
||||||
|
hid-descr-addr = <0x20>;
|
||||||
|
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&trackpad_pins>;
|
||||||
|
|
||||||
|
interrupts-extended = <&pio 7 IRQ_TYPE_LEVEL_LOW>;
|
||||||
|
|
||||||
|
wakeup-source;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&qca_wifi {
|
||||||
|
qcom,ath10k-calibration-variant = "GO_JUNIPER";
|
||||||
|
};
|
||||||
|
|
||||||
|
|
@ -0,0 +1,474 @@
|
||||||
|
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
||||||
|
/*
|
||||||
|
* Copyright 2021 Google LLC
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "mt8183-kukui.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
panel: panel {
|
||||||
|
compatible = "auo,b116xw03";
|
||||||
|
power-supply = <&pp3300_panel>;
|
||||||
|
ddc-i2c-bus = <&i2c4>;
|
||||||
|
backlight = <&backlight_lcd0>;
|
||||||
|
|
||||||
|
port {
|
||||||
|
panel_in: endpoint {
|
||||||
|
remote-endpoint = <&anx7625_out>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
pp1200_mipibrdg: pp1200-mipibrdg {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
regulator-name = "pp1200_mipibrdg";
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&pp1200_mipibrdg_en>;
|
||||||
|
|
||||||
|
enable-active-high;
|
||||||
|
regulator-boot-on;
|
||||||
|
|
||||||
|
gpio = <&pio 54 GPIO_ACTIVE_HIGH>;
|
||||||
|
};
|
||||||
|
|
||||||
|
pp1800_mipibrdg: pp1800-mipibrdg {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
regulator-name = "pp1800_mipibrdg";
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&pp1800_lcd_en>;
|
||||||
|
|
||||||
|
enable-active-high;
|
||||||
|
regulator-boot-on;
|
||||||
|
|
||||||
|
gpio = <&pio 36 GPIO_ACTIVE_HIGH>;
|
||||||
|
};
|
||||||
|
|
||||||
|
pp3300_panel: pp3300-panel {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
regulator-name = "pp3300_panel";
|
||||||
|
regulator-min-microvolt = <3300000>;
|
||||||
|
regulator-max-microvolt = <3300000>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&pp3300_panel_pins>;
|
||||||
|
|
||||||
|
enable-active-high;
|
||||||
|
regulator-boot-on;
|
||||||
|
|
||||||
|
gpio = <&pio 35 GPIO_ACTIVE_HIGH>;
|
||||||
|
};
|
||||||
|
|
||||||
|
vddio_mipibrdg: vddio-mipibrdg {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
regulator-name = "vddio_mipibrdg";
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&vddio_mipibrdg_en>;
|
||||||
|
|
||||||
|
enable-active-high;
|
||||||
|
regulator-boot-on;
|
||||||
|
|
||||||
|
gpio = <&pio 37 GPIO_ACTIVE_HIGH>;
|
||||||
|
};
|
||||||
|
|
||||||
|
volume_buttons: volume-buttons {
|
||||||
|
compatible = "gpio-keys";
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&volume_button_pins>;
|
||||||
|
|
||||||
|
volume_down {
|
||||||
|
label = "Volume Down";
|
||||||
|
linux,code = <KEY_VOLUMEDOWN>;
|
||||||
|
debounce-interval = <100>;
|
||||||
|
|
||||||
|
gpios = <&pio 6 GPIO_ACTIVE_LOW>;
|
||||||
|
};
|
||||||
|
|
||||||
|
volume_up {
|
||||||
|
label = "Volume Up";
|
||||||
|
linux,code = <KEY_VOLUMEUP>;
|
||||||
|
debounce-interval = <100>;
|
||||||
|
|
||||||
|
gpios = <&pio 5 GPIO_ACTIVE_LOW>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&dsi0 {
|
||||||
|
status = "okay";
|
||||||
|
/delete-node/panel@0;
|
||||||
|
ports {
|
||||||
|
port {
|
||||||
|
dsi_out: endpoint {
|
||||||
|
remote-endpoint = <&anx7625_in>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c0 {
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
touchscreen: touchscreen@10 {
|
||||||
|
compatible = "elan,ekth3500";
|
||||||
|
reg = <0x10>;
|
||||||
|
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&touchscreen_pins>;
|
||||||
|
|
||||||
|
interrupts-extended = <&pio 155 IRQ_TYPE_LEVEL_LOW>;
|
||||||
|
|
||||||
|
reset-gpios = <&pio 156 GPIO_ACTIVE_LOW>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c2 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&i2c2_pins>;
|
||||||
|
status = "okay";
|
||||||
|
clock-frequency = <400000>;
|
||||||
|
|
||||||
|
trackpad@15 {
|
||||||
|
compatible = "elan,ekth3000";
|
||||||
|
reg = <0x15>;
|
||||||
|
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&trackpad_pins>;
|
||||||
|
|
||||||
|
interrupts-extended = <&pio 7 IRQ_TYPE_LEVEL_LOW>;
|
||||||
|
|
||||||
|
wakeup-source;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c4 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&i2c4_pins>;
|
||||||
|
status = "okay";
|
||||||
|
clock-frequency = <100000>;
|
||||||
|
|
||||||
|
anx_bridge: anx7625@58 {
|
||||||
|
compatible = "analogix,anx7625";
|
||||||
|
reg = <0x58>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&anx7625_pins>;
|
||||||
|
panel_flags = <1>;
|
||||||
|
enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>;
|
||||||
|
reset-gpios = <&pio 73 GPIO_ACTIVE_HIGH>;
|
||||||
|
vdd10-supply = <&pp1200_mipibrdg>;
|
||||||
|
vdd18-supply = <&pp1800_mipibrdg>;
|
||||||
|
vdd33-supply = <&vddio_mipibrdg>;
|
||||||
|
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
port@0 {
|
||||||
|
reg = <0>;
|
||||||
|
|
||||||
|
anx7625_in: endpoint {
|
||||||
|
remote-endpoint = <&dsi_out>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
port@1 {
|
||||||
|
reg = <1>;
|
||||||
|
|
||||||
|
anx7625_out: endpoint {
|
||||||
|
remote-endpoint = <&panel_in>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c_tunnel {
|
||||||
|
google,remote-bus = <2>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&pio {
|
||||||
|
/* 192 lines */
|
||||||
|
gpio-line-names =
|
||||||
|
"SPI_AP_EC_CS_L",
|
||||||
|
"SPI_AP_EC_MOSI",
|
||||||
|
"SPI_AP_EC_CLK",
|
||||||
|
"I2S3_DO",
|
||||||
|
"USB_PD_INT_ODL",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"IT6505_HPD_L",
|
||||||
|
"I2S3_TDM_D3",
|
||||||
|
"SOC_I2C6_1V8_SCL",
|
||||||
|
"SOC_I2C6_1V8_SDA",
|
||||||
|
"DPI_D0",
|
||||||
|
"DPI_D1",
|
||||||
|
"DPI_D2",
|
||||||
|
"DPI_D3",
|
||||||
|
"DPI_D4",
|
||||||
|
"DPI_D5",
|
||||||
|
"DPI_D6",
|
||||||
|
"DPI_D7",
|
||||||
|
"DPI_D8",
|
||||||
|
"DPI_D9",
|
||||||
|
"DPI_D10",
|
||||||
|
"DPI_D11",
|
||||||
|
"DPI_HSYNC",
|
||||||
|
"DPI_VSYNC",
|
||||||
|
"DPI_DE",
|
||||||
|
"DPI_CK",
|
||||||
|
"AP_MSDC1_CLK",
|
||||||
|
"AP_MSDC1_DAT3",
|
||||||
|
"AP_MSDC1_CMD",
|
||||||
|
"AP_MSDC1_DAT0",
|
||||||
|
"AP_MSDC1_DAT2",
|
||||||
|
"AP_MSDC1_DAT1",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"OTG_EN",
|
||||||
|
"DRVBUS",
|
||||||
|
"DISP_PWM",
|
||||||
|
"DSI_TE",
|
||||||
|
"LCM_RST_1V8",
|
||||||
|
"AP_CTS_WIFI_RTS",
|
||||||
|
"AP_RTS_WIFI_CTS",
|
||||||
|
"SOC_I2C5_1V8_SCL",
|
||||||
|
"SOC_I2C5_1V8_SDA",
|
||||||
|
"SOC_I2C3_1V8_SCL",
|
||||||
|
"SOC_I2C3_1V8_SDA",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"SOC_I2C1_1V8_SDA",
|
||||||
|
"SOC_I2C0_1V8_SDA",
|
||||||
|
"SOC_I2C0_1V8_SCL",
|
||||||
|
"SOC_I2C1_1V8_SCL",
|
||||||
|
"AP_SPI_H1_MISO",
|
||||||
|
"AP_SPI_H1_CS_L",
|
||||||
|
"AP_SPI_H1_MOSI",
|
||||||
|
"AP_SPI_H1_CLK",
|
||||||
|
"I2S5_BCK",
|
||||||
|
"I2S5_LRCK",
|
||||||
|
"I2S5_DO",
|
||||||
|
"BOOTBLOCK_EN_L",
|
||||||
|
"MT8183_KPCOL0",
|
||||||
|
"SPI_AP_EC_MISO",
|
||||||
|
"UART_DBG_TX_AP_RX",
|
||||||
|
"UART_AP_TX_DBG_RX",
|
||||||
|
"I2S2_MCK",
|
||||||
|
"I2S2_BCK",
|
||||||
|
"CLK_5M_WCAM",
|
||||||
|
"CLK_2M_UCAM",
|
||||||
|
"I2S2_LRCK",
|
||||||
|
"I2S2_DI",
|
||||||
|
"SOC_I2C2_1V8_SCL",
|
||||||
|
"SOC_I2C2_1V8_SDA",
|
||||||
|
"SOC_I2C4_1V8_SCL",
|
||||||
|
"SOC_I2C4_1V8_SDA",
|
||||||
|
"",
|
||||||
|
"SCL8",
|
||||||
|
"SDA8",
|
||||||
|
"FCAM_PWDN_L",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"I2S_PMIC",
|
||||||
|
"I2S_PMIC",
|
||||||
|
"I2S_PMIC",
|
||||||
|
"I2S_PMIC",
|
||||||
|
"I2S_PMIC",
|
||||||
|
"I2S_PMIC",
|
||||||
|
"I2S_PMIC",
|
||||||
|
"I2S_PMIC",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
/*
|
||||||
|
* AP_FLASH_WP_L is crossystem ABI. Rev1 schematics
|
||||||
|
* call it BIOS_FLASH_WP_R_L.
|
||||||
|
*/
|
||||||
|
"AP_FLASH_WP_L",
|
||||||
|
"EC_AP_INT_ODL",
|
||||||
|
"IT6505_INT_ODL",
|
||||||
|
"H1_INT_OD_L",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"AP_SPI_FLASH_MISO",
|
||||||
|
"AP_SPI_FLASH_CS_L",
|
||||||
|
"AP_SPI_FLASH_MOSI",
|
||||||
|
"AP_SPI_FLASH_CLK",
|
||||||
|
"DA7219_IRQ",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"";
|
||||||
|
|
||||||
|
pp1200_mipibrdg_en: pp1200-mipibrdg-en {
|
||||||
|
pins1 {
|
||||||
|
pinmux = <PINMUX_GPIO54__FUNC_GPIO54>;
|
||||||
|
output-low;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
pp1800_lcd_en: pp1800-lcd-en {
|
||||||
|
pins1 {
|
||||||
|
pinmux = <PINMUX_GPIO36__FUNC_GPIO36>;
|
||||||
|
output-low;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
pp3300_panel_pins: pp3300-panel-pins {
|
||||||
|
panel_3v3_enable: panel-3v3-enable {
|
||||||
|
pinmux = <PINMUX_GPIO35__FUNC_GPIO35>;
|
||||||
|
output-low;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
ppvarp_lcd_en: ppvarp-lcd-en {
|
||||||
|
pins1 {
|
||||||
|
pinmux = <PINMUX_GPIO66__FUNC_GPIO66>;
|
||||||
|
output-low;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
ppvarn_lcd_en: ppvarn-lcd-en {
|
||||||
|
pins1 {
|
||||||
|
pinmux = <PINMUX_GPIO166__FUNC_GPIO166>;
|
||||||
|
output-low;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
anx7625_pins: anx7625-pins {
|
||||||
|
pins1 {
|
||||||
|
pinmux = <PINMUX_GPIO45__FUNC_GPIO45>,
|
||||||
|
<PINMUX_GPIO73__FUNC_GPIO73>;
|
||||||
|
output-low;
|
||||||
|
};
|
||||||
|
pins2 {
|
||||||
|
pinmux = <PINMUX_GPIO4__FUNC_GPIO4>;
|
||||||
|
input-enable;
|
||||||
|
bias-pull-up;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
touchscreen_pins: touchscreen-pins {
|
||||||
|
touch_int_odl {
|
||||||
|
pinmux = <PINMUX_GPIO155__FUNC_GPIO155>;
|
||||||
|
input-enable;
|
||||||
|
bias-pull-up;
|
||||||
|
};
|
||||||
|
|
||||||
|
touch_rst_l {
|
||||||
|
pinmux = <PINMUX_GPIO156__FUNC_GPIO156>;
|
||||||
|
output-high;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
trackpad_pins: trackpad-pins {
|
||||||
|
trackpad_int {
|
||||||
|
pinmux = <PINMUX_GPIO7__FUNC_GPIO7>;
|
||||||
|
input-enable;
|
||||||
|
bias-disable; /* pulled externally */
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
vddio_mipibrdg_en: vddio-mipibrdg-en {
|
||||||
|
pins1 {
|
||||||
|
pinmux = <PINMUX_GPIO37__FUNC_GPIO37>;
|
||||||
|
output-low;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
volume_button_pins: volume-button-pins {
|
||||||
|
voldn-btn-odl {
|
||||||
|
pinmux = <PINMUX_GPIO6__FUNC_GPIO6>;
|
||||||
|
input-enable;
|
||||||
|
bias-pull-up;
|
||||||
|
};
|
||||||
|
|
||||||
|
volup-btn-odl {
|
||||||
|
pinmux = <PINMUX_GPIO5__FUNC_GPIO5>;
|
||||||
|
input-enable;
|
||||||
|
bias-pull-up;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
|
@ -0,0 +1,13 @@
|
||||||
|
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
||||||
|
/*
|
||||||
|
* Copyright 2020 Google LLC
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
#include "mt8183-kukui-kakadu.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "MediaTek kakadu board";
|
||||||
|
compatible = "google,kakadu-rev3", "google,kakadu-rev2",
|
||||||
|
"google,kakadu", "mediatek,mt8183";
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,378 @@
|
||||||
|
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
||||||
|
/*
|
||||||
|
* Copyright 2020 Google LLC
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "mt8183-kukui.dtsi"
|
||||||
|
#include <dt-bindings/input/gpio-keys.h>
|
||||||
|
|
||||||
|
/ {
|
||||||
|
ppvarn_lcd: ppvarn-lcd {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
regulator-name = "ppvarn_lcd";
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&ppvarn_lcd_en>;
|
||||||
|
|
||||||
|
enable-active-high;
|
||||||
|
|
||||||
|
gpio = <&pio 66 GPIO_ACTIVE_HIGH>;
|
||||||
|
};
|
||||||
|
|
||||||
|
ppvarp_lcd: ppvarp-lcd {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
regulator-name = "ppvarp_lcd";
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&ppvarp_lcd_en>;
|
||||||
|
|
||||||
|
enable-active-high;
|
||||||
|
|
||||||
|
gpio = <&pio 166 GPIO_ACTIVE_HIGH>;
|
||||||
|
};
|
||||||
|
|
||||||
|
pp1800_lcd: pp1800-lcd {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
regulator-name = "pp1800_lcd";
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&pp1800_lcd_en>;
|
||||||
|
|
||||||
|
enable-active-high;
|
||||||
|
|
||||||
|
gpio = <&pio 36 GPIO_ACTIVE_HIGH>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpio-keys {
|
||||||
|
compatible = "gpio-keys";
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&pen_eject>;
|
||||||
|
|
||||||
|
pen-insert {
|
||||||
|
label = "Pen Insert";
|
||||||
|
/* Insert = low, eject = high */
|
||||||
|
gpios = <&pio 6 GPIO_ACTIVE_LOW>;
|
||||||
|
linux,code = <SW_PEN_INSERTED>;
|
||||||
|
linux,input-type = <EV_SW>;
|
||||||
|
wakeup-event-action = <EV_ACT_DEASSERTED>;
|
||||||
|
wakeup-source;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&bluetooth {
|
||||||
|
firmware-name = "nvm_00440302_i2s_eu.bin";
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c0 {
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
touchscreen: touchscreen@10 {
|
||||||
|
compatible = "hid-over-i2c";
|
||||||
|
reg = <0x10>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&open_touch>;
|
||||||
|
|
||||||
|
interrupt-parent = <&pio>;
|
||||||
|
interrupts = <155 IRQ_TYPE_EDGE_FALLING>;
|
||||||
|
|
||||||
|
post-power-on-delay-ms = <10>;
|
||||||
|
hid-descr-addr = <0x0001>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&mt6358_vcama2_reg {
|
||||||
|
regulator-min-microvolt = <2800000>;
|
||||||
|
regulator-max-microvolt = <2800000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c2 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&i2c2_pins>;
|
||||||
|
status = "okay";
|
||||||
|
clock-frequency = <400000>;
|
||||||
|
|
||||||
|
eeprom@58 {
|
||||||
|
compatible = "atmel,24c32";
|
||||||
|
reg = <0x58>;
|
||||||
|
pagesize = <32>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c4 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&i2c4_pins>;
|
||||||
|
status = "okay";
|
||||||
|
clock-frequency = <400000>;
|
||||||
|
|
||||||
|
eeprom@54 {
|
||||||
|
compatible = "atmel,24c32";
|
||||||
|
reg = <0x54>;
|
||||||
|
pagesize = <32>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&mipi_tx0 {
|
||||||
|
drive-strength-microamp = <5800>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&pio {
|
||||||
|
/* 192 lines */
|
||||||
|
gpio-line-names =
|
||||||
|
"SPI_AP_EC_CS_L",
|
||||||
|
"SPI_AP_EC_MOSI",
|
||||||
|
"SPI_AP_EC_CLK",
|
||||||
|
"I2S3_DO",
|
||||||
|
"USB_PD_INT_ODL",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"IT6505_HPD_L",
|
||||||
|
"I2S3_TDM_D3",
|
||||||
|
"SOC_I2C6_1V8_SCL",
|
||||||
|
"SOC_I2C6_1V8_SDA",
|
||||||
|
"DPI_D0",
|
||||||
|
"DPI_D1",
|
||||||
|
"DPI_D2",
|
||||||
|
"DPI_D3",
|
||||||
|
"DPI_D4",
|
||||||
|
"DPI_D5",
|
||||||
|
"DPI_D6",
|
||||||
|
"DPI_D7",
|
||||||
|
"DPI_D8",
|
||||||
|
"DPI_D9",
|
||||||
|
"DPI_D10",
|
||||||
|
"DPI_D11",
|
||||||
|
"DPI_HSYNC",
|
||||||
|
"DPI_VSYNC",
|
||||||
|
"DPI_DE",
|
||||||
|
"DPI_CK",
|
||||||
|
"AP_MSDC1_CLK",
|
||||||
|
"AP_MSDC1_DAT3",
|
||||||
|
"AP_MSDC1_CMD",
|
||||||
|
"AP_MSDC1_DAT0",
|
||||||
|
"AP_MSDC1_DAT2",
|
||||||
|
"AP_MSDC1_DAT1",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"OTG_EN",
|
||||||
|
"DRVBUS",
|
||||||
|
"DISP_PWM",
|
||||||
|
"DSI_TE",
|
||||||
|
"LCM_RST_1V8",
|
||||||
|
"AP_CTS_WIFI_RTS",
|
||||||
|
"AP_RTS_WIFI_CTS",
|
||||||
|
"SOC_I2C5_1V8_SCL",
|
||||||
|
"SOC_I2C5_1V8_SDA",
|
||||||
|
"SOC_I2C3_1V8_SCL",
|
||||||
|
"SOC_I2C3_1V8_SDA",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"SOC_I2C1_1V8_SDA",
|
||||||
|
"SOC_I2C0_1V8_SDA",
|
||||||
|
"SOC_I2C0_1V8_SCL",
|
||||||
|
"SOC_I2C1_1V8_SCL",
|
||||||
|
"AP_SPI_H1_MISO",
|
||||||
|
"AP_SPI_H1_CS_L",
|
||||||
|
"AP_SPI_H1_MOSI",
|
||||||
|
"AP_SPI_H1_CLK",
|
||||||
|
"I2S5_BCK",
|
||||||
|
"I2S5_LRCK",
|
||||||
|
"I2S5_DO",
|
||||||
|
"BOOTBLOCK_EN_L",
|
||||||
|
"MT8183_KPCOL0",
|
||||||
|
"SPI_AP_EC_MISO",
|
||||||
|
"UART_DBG_TX_AP_RX",
|
||||||
|
"UART_AP_TX_DBG_RX",
|
||||||
|
"I2S2_MCK",
|
||||||
|
"I2S2_BCK",
|
||||||
|
"CLK_5M_WCAM",
|
||||||
|
"CLK_2M_UCAM",
|
||||||
|
"I2S2_LRCK",
|
||||||
|
"I2S2_DI",
|
||||||
|
"SOC_I2C2_1V8_SCL",
|
||||||
|
"SOC_I2C2_1V8_SDA",
|
||||||
|
"SOC_I2C4_1V8_SCL",
|
||||||
|
"SOC_I2C4_1V8_SDA",
|
||||||
|
"",
|
||||||
|
"SCL8",
|
||||||
|
"SDA8",
|
||||||
|
"FCAM_PWDN_L",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"I2S_PMIC",
|
||||||
|
"I2S_PMIC",
|
||||||
|
"I2S_PMIC",
|
||||||
|
"I2S_PMIC",
|
||||||
|
"I2S_PMIC",
|
||||||
|
"I2S_PMIC",
|
||||||
|
"I2S_PMIC",
|
||||||
|
"I2S_PMIC",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
/*
|
||||||
|
* AP_FLASH_WP_L is crossystem ABI. Rev1 schematics
|
||||||
|
* call it BIOS_FLASH_WP_R_L.
|
||||||
|
*/
|
||||||
|
"AP_FLASH_WP_L",
|
||||||
|
"EC_AP_INT_ODL",
|
||||||
|
"IT6505_INT_ODL",
|
||||||
|
"H1_INT_OD_L",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"AP_SPI_FLASH_MISO",
|
||||||
|
"AP_SPI_FLASH_CS_L",
|
||||||
|
"AP_SPI_FLASH_MOSI",
|
||||||
|
"AP_SPI_FLASH_CLK",
|
||||||
|
"DA7219_IRQ",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"";
|
||||||
|
|
||||||
|
ppvarp_lcd_en: ppvarp-lcd-en {
|
||||||
|
pins1 {
|
||||||
|
pinmux = <PINMUX_GPIO66__FUNC_GPIO66>;
|
||||||
|
output-low;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
ppvarn_lcd_en: ppvarn-lcd-en {
|
||||||
|
pins1 {
|
||||||
|
pinmux = <PINMUX_GPIO166__FUNC_GPIO166>;
|
||||||
|
output-low;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
pp1800_lcd_en: pp1800-lcd-en {
|
||||||
|
pins1 {
|
||||||
|
pinmux = <PINMUX_GPIO36__FUNC_GPIO36>;
|
||||||
|
output-low;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
open_touch: open_touch {
|
||||||
|
irq_pin {
|
||||||
|
pinmux = <PINMUX_GPIO155__FUNC_GPIO155>;
|
||||||
|
input-enable;
|
||||||
|
bias-pull-up;
|
||||||
|
};
|
||||||
|
|
||||||
|
rst_pin {
|
||||||
|
pinmux = <PINMUX_GPIO156__FUNC_GPIO156>;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* The pen driver doesn't currently support driving
|
||||||
|
* this reset line. By specifying output-high here
|
||||||
|
* we're relying on the fact that this pin has a default
|
||||||
|
* pulldown at boot (which makes sure the pen was in
|
||||||
|
* reset if it was powered) and then we set it high here
|
||||||
|
* to take it out of reset. Better would be if the pen
|
||||||
|
* driver could control this and we could remove
|
||||||
|
* "output-high" here.
|
||||||
|
*/
|
||||||
|
output-high;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
pen_eject: peneject {
|
||||||
|
pen_eject {
|
||||||
|
pinmux = <PINMUX_GPIO6__FUNC_GPIO6>;
|
||||||
|
input-enable;
|
||||||
|
/* External pull-up. */
|
||||||
|
bias-disable;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&qca_wifi {
|
||||||
|
qcom,ath10k-calibration-variant = "GO_KAKADU";
|
||||||
|
};
|
||||||
|
|
||||||
|
&panel {
|
||||||
|
status = "okay";
|
||||||
|
compatible = "boe,tv105wum-nw0";
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,21 @@
|
||||||
|
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
||||||
|
/*
|
||||||
|
* Copyright 2021 Google LLC
|
||||||
|
*
|
||||||
|
* SKU: 0x10 => 16
|
||||||
|
* - bit 8: Camera: 0 (OV5695)
|
||||||
|
* - bits 7..4: Panel ID: 0x1 (AUO)
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
#include "mt8183-kukui-kodama.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "MediaTek kodama sku16 board";
|
||||||
|
compatible = "google,kodama-sku16", "google,kodama", "mediatek,mt8183";
|
||||||
|
};
|
||||||
|
|
||||||
|
&panel {
|
||||||
|
status = "okay";
|
||||||
|
compatible = "auo,b101uan08.3";
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,21 @@
|
||||||
|
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
||||||
|
/*
|
||||||
|
* Copyright 2020 Google LLC
|
||||||
|
*
|
||||||
|
* SKU: 0x110 => 272
|
||||||
|
* - bit 8: Camera: 1 (GC5035)
|
||||||
|
* - bits 7..4: Panel ID: 0x1 (AUO)
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
#include "mt8183-kukui-kodama.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "MediaTek kodama sku272 board";
|
||||||
|
compatible = "google,kodama-sku272", "google,kodama", "mediatek,mt8183";
|
||||||
|
};
|
||||||
|
|
||||||
|
&panel {
|
||||||
|
status = "okay";
|
||||||
|
compatible = "auo,b101uan08.3";
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,21 @@
|
||||||
|
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
||||||
|
/*
|
||||||
|
* Copyright 2020 Google LLC
|
||||||
|
*
|
||||||
|
* SKU: 0x120 => 288
|
||||||
|
* - bit 8: Camera: 1 (GC5035)
|
||||||
|
* - bits 7..4: Panel ID: 0x2 (BOE)
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
#include "mt8183-kukui-kodama.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "MediaTek kodama sku288 board";
|
||||||
|
compatible = "google,kodama-sku288", "google,kodama", "mediatek,mt8183";
|
||||||
|
};
|
||||||
|
|
||||||
|
&panel {
|
||||||
|
status = "okay";
|
||||||
|
compatible = "boe,tv101wum-n53";
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,21 @@
|
||||||
|
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
||||||
|
/*
|
||||||
|
* Copyright 2021 Google LLC
|
||||||
|
*
|
||||||
|
* SKU: 0x20 => 32
|
||||||
|
* - bit 8: Camera: 0 (OV5695)
|
||||||
|
* - bits 7..4: Panel ID: 0x2 (BOE)
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
#include "mt8183-kukui-kodama.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "MediaTek kodama sku32 board";
|
||||||
|
compatible = "google,kodama-sku32", "google,kodama", "mediatek,mt8183";
|
||||||
|
};
|
||||||
|
|
||||||
|
&panel {
|
||||||
|
status = "okay";
|
||||||
|
compatible = "boe,tv101wum-n53";
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,343 @@
|
||||||
|
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
||||||
|
/*
|
||||||
|
* Copyright 2021 Google LLC
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
#include "mt8183-kukui.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
ppvarn_lcd: ppvarn-lcd {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
regulator-name = "ppvarn_lcd";
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&ppvarn_lcd_en>;
|
||||||
|
|
||||||
|
enable-active-high;
|
||||||
|
|
||||||
|
gpio = <&pio 66 GPIO_ACTIVE_HIGH>;
|
||||||
|
};
|
||||||
|
|
||||||
|
ppvarp_lcd: ppvarp-lcd {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
regulator-name = "ppvarp_lcd";
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&ppvarp_lcd_en>;
|
||||||
|
|
||||||
|
enable-active-high;
|
||||||
|
|
||||||
|
gpio = <&pio 166 GPIO_ACTIVE_HIGH>;
|
||||||
|
};
|
||||||
|
|
||||||
|
pp1800_lcd: pp1800-lcd {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
regulator-name = "pp1800_lcd";
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&pp1800_lcd_en>;
|
||||||
|
|
||||||
|
enable-active-high;
|
||||||
|
|
||||||
|
gpio = <&pio 36 GPIO_ACTIVE_HIGH>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c0 {
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
touchscreen: touchscreen@10 {
|
||||||
|
compatible = "hid-over-i2c";
|
||||||
|
reg = <0x10>;
|
||||||
|
interrupt-parent = <&pio>;
|
||||||
|
interrupts = <155 IRQ_TYPE_LEVEL_LOW>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&touch_default>;
|
||||||
|
|
||||||
|
post-power-on-delay-ms = <10>;
|
||||||
|
hid-descr-addr = <0x0001>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c2 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&i2c2_pins>;
|
||||||
|
status = "okay";
|
||||||
|
clock-frequency = <400000>;
|
||||||
|
|
||||||
|
eeprom@58 {
|
||||||
|
compatible = "atmel,24c64";
|
||||||
|
reg = <0x58>;
|
||||||
|
pagesize = <32>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c4 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&i2c4_pins>;
|
||||||
|
status = "okay";
|
||||||
|
clock-frequency = <400000>;
|
||||||
|
|
||||||
|
eeprom@54 {
|
||||||
|
compatible = "atmel,24c64";
|
||||||
|
reg = <0x54>;
|
||||||
|
pagesize = <32>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&mt6358_vcama2_reg {
|
||||||
|
regulator-min-microvolt = <2800000>;
|
||||||
|
regulator-max-microvolt = <2800000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&pio {
|
||||||
|
/* 192 lines */
|
||||||
|
gpio-line-names =
|
||||||
|
"SPI_AP_EC_CS_L",
|
||||||
|
"SPI_AP_EC_MOSI",
|
||||||
|
"SPI_AP_EC_CLK",
|
||||||
|
"I2S3_DO",
|
||||||
|
"USB_PD_INT_ODL",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"IT6505_HPD_L",
|
||||||
|
"I2S3_TDM_D3",
|
||||||
|
"SOC_I2C6_1V8_SCL",
|
||||||
|
"SOC_I2C6_1V8_SDA",
|
||||||
|
"DPI_D0",
|
||||||
|
"DPI_D1",
|
||||||
|
"DPI_D2",
|
||||||
|
"DPI_D3",
|
||||||
|
"DPI_D4",
|
||||||
|
"DPI_D5",
|
||||||
|
"DPI_D6",
|
||||||
|
"DPI_D7",
|
||||||
|
"DPI_D8",
|
||||||
|
"DPI_D9",
|
||||||
|
"DPI_D10",
|
||||||
|
"DPI_D11",
|
||||||
|
"DPI_HSYNC",
|
||||||
|
"DPI_VSYNC",
|
||||||
|
"DPI_DE",
|
||||||
|
"DPI_CK",
|
||||||
|
"AP_MSDC1_CLK",
|
||||||
|
"AP_MSDC1_DAT3",
|
||||||
|
"AP_MSDC1_CMD",
|
||||||
|
"AP_MSDC1_DAT0",
|
||||||
|
"AP_MSDC1_DAT2",
|
||||||
|
"AP_MSDC1_DAT1",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"OTG_EN",
|
||||||
|
"DRVBUS",
|
||||||
|
"DISP_PWM",
|
||||||
|
"DSI_TE",
|
||||||
|
"LCM_RST_1V8",
|
||||||
|
"AP_CTS_WIFI_RTS",
|
||||||
|
"AP_RTS_WIFI_CTS",
|
||||||
|
"SOC_I2C5_1V8_SCL",
|
||||||
|
"SOC_I2C5_1V8_SDA",
|
||||||
|
"SOC_I2C3_1V8_SCL",
|
||||||
|
"SOC_I2C3_1V8_SDA",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"SOC_I2C1_1V8_SDA",
|
||||||
|
"SOC_I2C0_1V8_SDA",
|
||||||
|
"SOC_I2C0_1V8_SCL",
|
||||||
|
"SOC_I2C1_1V8_SCL",
|
||||||
|
"AP_SPI_H1_MISO",
|
||||||
|
"AP_SPI_H1_CS_L",
|
||||||
|
"AP_SPI_H1_MOSI",
|
||||||
|
"AP_SPI_H1_CLK",
|
||||||
|
"I2S5_BCK",
|
||||||
|
"I2S5_LRCK",
|
||||||
|
"I2S5_DO",
|
||||||
|
"BOOTBLOCK_EN_L",
|
||||||
|
"MT8183_KPCOL0",
|
||||||
|
"SPI_AP_EC_MISO",
|
||||||
|
"UART_DBG_TX_AP_RX",
|
||||||
|
"UART_AP_TX_DBG_RX",
|
||||||
|
"I2S2_MCK",
|
||||||
|
"I2S2_BCK",
|
||||||
|
"CLK_5M_WCAM",
|
||||||
|
"CLK_2M_UCAM",
|
||||||
|
"I2S2_LRCK",
|
||||||
|
"I2S2_DI",
|
||||||
|
"SOC_I2C2_1V8_SCL",
|
||||||
|
"SOC_I2C2_1V8_SDA",
|
||||||
|
"SOC_I2C4_1V8_SCL",
|
||||||
|
"SOC_I2C4_1V8_SDA",
|
||||||
|
"",
|
||||||
|
"SCL8",
|
||||||
|
"SDA8",
|
||||||
|
"FCAM_PWDN_L",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"I2S_PMIC",
|
||||||
|
"I2S_PMIC",
|
||||||
|
"I2S_PMIC",
|
||||||
|
"I2S_PMIC",
|
||||||
|
"I2S_PMIC",
|
||||||
|
"I2S_PMIC",
|
||||||
|
"I2S_PMIC",
|
||||||
|
"I2S_PMIC",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
/*
|
||||||
|
* AP_FLASH_WP_L is crossystem ABI. Rev1 schematics
|
||||||
|
* call it BIOS_FLASH_WP_R_L.
|
||||||
|
*/
|
||||||
|
"AP_FLASH_WP_L",
|
||||||
|
"EC_AP_INT_ODL",
|
||||||
|
"IT6505_INT_ODL",
|
||||||
|
"H1_INT_OD_L",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"AP_SPI_FLASH_MISO",
|
||||||
|
"AP_SPI_FLASH_CS_L",
|
||||||
|
"AP_SPI_FLASH_MOSI",
|
||||||
|
"AP_SPI_FLASH_CLK",
|
||||||
|
"DA7219_IRQ",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"",
|
||||||
|
"";
|
||||||
|
|
||||||
|
ppvarp_lcd_en: ppvarp-lcd-en {
|
||||||
|
pins1 {
|
||||||
|
pinmux = <PINMUX_GPIO66__FUNC_GPIO66>;
|
||||||
|
output-low;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
ppvarn_lcd_en: ppvarn-lcd-en {
|
||||||
|
pins1 {
|
||||||
|
pinmux = <PINMUX_GPIO166__FUNC_GPIO166>;
|
||||||
|
output-low;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
pp1800_lcd_en: pp1800-lcd-en {
|
||||||
|
pins1 {
|
||||||
|
pinmux = <PINMUX_GPIO36__FUNC_GPIO36>;
|
||||||
|
output-low;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
touch_default: touchdefault {
|
||||||
|
pin_irq {
|
||||||
|
pinmux = <PINMUX_GPIO155__FUNC_GPIO155>;
|
||||||
|
input-enable;
|
||||||
|
bias-pull-up;
|
||||||
|
};
|
||||||
|
|
||||||
|
touch_pin_reset: pin_reset {
|
||||||
|
pinmux = <PINMUX_GPIO156__FUNC_GPIO156>;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* The touchscreen driver doesn't currently support driving
|
||||||
|
* this reset line. By specifying output-high here
|
||||||
|
* we're relying on the fact that this pin has a default
|
||||||
|
* pulldown at boot (which makes sure the controller was in
|
||||||
|
* reset if it was powered) and then we set it high here
|
||||||
|
* to take it out of reset. Better would be if the touchscreen
|
||||||
|
* driver could control this and we could remove
|
||||||
|
* "output-high" here.
|
||||||
|
*/
|
||||||
|
output-high;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&qca_wifi {
|
||||||
|
qcom,ath10k-calibration-variant = "GO_KODAMA";
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c_tunnel {
|
||||||
|
google,remote-bus = <2>;
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,378 @@
|
||||||
|
// SPDX-License-Identifier: GPL-2.0
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2021 BayLibre, SAS.
|
||||||
|
* Author: Fabien Parent <fparent@baylibre.com>
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
|
||||||
|
#include <dt-bindings/gpio/gpio.h>
|
||||||
|
#include "mt8183.dtsi"
|
||||||
|
#include "mt6358.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "Pumpkin MT8183";
|
||||||
|
compatible = "mediatek,mt8183-pumpkin", "mediatek,mt8183";
|
||||||
|
|
||||||
|
aliases {
|
||||||
|
serial0 = &uart0;
|
||||||
|
};
|
||||||
|
|
||||||
|
memory@40000000 {
|
||||||
|
device_type = "memory";
|
||||||
|
reg = <0 0x40000000 0 0x80000000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
chosen {
|
||||||
|
stdout-path = "serial0:921600n8";
|
||||||
|
};
|
||||||
|
|
||||||
|
reserved-memory {
|
||||||
|
#address-cells = <2>;
|
||||||
|
#size-cells = <2>;
|
||||||
|
ranges;
|
||||||
|
|
||||||
|
scp_mem_reserved: scp_mem_region {
|
||||||
|
compatible = "shared-dma-pool";
|
||||||
|
reg = <0 0x50000000 0 0x2900000>;
|
||||||
|
no-map;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
leds {
|
||||||
|
compatible = "gpio-leds";
|
||||||
|
|
||||||
|
led-red {
|
||||||
|
label = "red";
|
||||||
|
gpios = <&pio 155 GPIO_ACTIVE_HIGH>;
|
||||||
|
default-state = "off";
|
||||||
|
};
|
||||||
|
|
||||||
|
led-green {
|
||||||
|
label = "green";
|
||||||
|
gpios = <&pio 156 GPIO_ACTIVE_HIGH>;
|
||||||
|
default-state = "off";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
ntc@0 {
|
||||||
|
compatible = "murata,ncp03wf104";
|
||||||
|
pullup-uv = <1800000>;
|
||||||
|
pullup-ohm = <390000>;
|
||||||
|
pulldown-ohm = <0>;
|
||||||
|
io-channels = <&auxadc 0>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&auxadc {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c0 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&i2c_pins_0>;
|
||||||
|
status = "okay";
|
||||||
|
clock-frequency = <100000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c1 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&i2c_pins_1>;
|
||||||
|
status = "okay";
|
||||||
|
clock-frequency = <100000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c2 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&i2c_pins_2>;
|
||||||
|
status = "okay";
|
||||||
|
clock-frequency = <100000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c3 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&i2c_pins_3>;
|
||||||
|
status = "okay";
|
||||||
|
clock-frequency = <100000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c4 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&i2c_pins_4>;
|
||||||
|
status = "okay";
|
||||||
|
clock-frequency = <100000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c5 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&i2c_pins_5>;
|
||||||
|
status = "okay";
|
||||||
|
clock-frequency = <100000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c6 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&i2c6_pins>;
|
||||||
|
status = "okay";
|
||||||
|
clock-frequency = <100000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&mmc0 {
|
||||||
|
status = "okay";
|
||||||
|
pinctrl-names = "default", "state_uhs";
|
||||||
|
pinctrl-0 = <&mmc0_pins_default>;
|
||||||
|
pinctrl-1 = <&mmc0_pins_uhs>;
|
||||||
|
bus-width = <8>;
|
||||||
|
max-frequency = <200000000>;
|
||||||
|
cap-mmc-highspeed;
|
||||||
|
mmc-hs200-1_8v;
|
||||||
|
mmc-hs400-1_8v;
|
||||||
|
cap-mmc-hw-reset;
|
||||||
|
no-sdio;
|
||||||
|
no-sd;
|
||||||
|
hs400-ds-delay = <0x12814>;
|
||||||
|
vmmc-supply = <&mt6358_vemc_reg>;
|
||||||
|
vqmmc-supply = <&mt6358_vio18_reg>;
|
||||||
|
assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>;
|
||||||
|
assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
|
||||||
|
non-removable;
|
||||||
|
};
|
||||||
|
|
||||||
|
&mmc1 {
|
||||||
|
status = "okay";
|
||||||
|
pinctrl-names = "default", "state_uhs";
|
||||||
|
pinctrl-0 = <&mmc1_pins_default>;
|
||||||
|
pinctrl-1 = <&mmc1_pins_uhs>;
|
||||||
|
bus-width = <4>;
|
||||||
|
max-frequency = <200000000>;
|
||||||
|
cap-sd-highspeed;
|
||||||
|
sd-uhs-sdr50;
|
||||||
|
sd-uhs-sdr104;
|
||||||
|
cap-sdio-irq;
|
||||||
|
no-mmc;
|
||||||
|
no-sd;
|
||||||
|
vmmc-supply = <&mt6358_vmch_reg>;
|
||||||
|
vqmmc-supply = <&mt6358_vmc_reg>;
|
||||||
|
keep-power-in-suspend;
|
||||||
|
enable-sdio-wakeup;
|
||||||
|
non-removable;
|
||||||
|
};
|
||||||
|
|
||||||
|
&pio {
|
||||||
|
i2c_pins_0: i2c0 {
|
||||||
|
pins_i2c{
|
||||||
|
pinmux = <PINMUX_GPIO82__FUNC_SDA0>,
|
||||||
|
<PINMUX_GPIO83__FUNC_SCL0>;
|
||||||
|
mediatek,pull-up-adv = <3>;
|
||||||
|
mediatek,drive-strength-adv = <00>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c_pins_1: i2c1 {
|
||||||
|
pins_i2c{
|
||||||
|
pinmux = <PINMUX_GPIO81__FUNC_SDA1>,
|
||||||
|
<PINMUX_GPIO84__FUNC_SCL1>;
|
||||||
|
mediatek,pull-up-adv = <3>;
|
||||||
|
mediatek,drive-strength-adv = <00>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c_pins_2: i2c2 {
|
||||||
|
pins_i2c{
|
||||||
|
pinmux = <PINMUX_GPIO103__FUNC_SCL2>,
|
||||||
|
<PINMUX_GPIO104__FUNC_SDA2>;
|
||||||
|
mediatek,pull-up-adv = <3>;
|
||||||
|
mediatek,drive-strength-adv = <00>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c_pins_3: i2c3 {
|
||||||
|
pins_i2c{
|
||||||
|
pinmux = <PINMUX_GPIO50__FUNC_SCL3>,
|
||||||
|
<PINMUX_GPIO51__FUNC_SDA3>;
|
||||||
|
mediatek,pull-up-adv = <3>;
|
||||||
|
mediatek,drive-strength-adv = <00>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c_pins_4: i2c4 {
|
||||||
|
pins_i2c{
|
||||||
|
pinmux = <PINMUX_GPIO105__FUNC_SCL4>,
|
||||||
|
<PINMUX_GPIO106__FUNC_SDA4>;
|
||||||
|
mediatek,pull-up-adv = <3>;
|
||||||
|
mediatek,drive-strength-adv = <00>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c_pins_5: i2c5 {
|
||||||
|
pins_i2c{
|
||||||
|
pinmux = <PINMUX_GPIO48__FUNC_SCL5>,
|
||||||
|
<PINMUX_GPIO49__FUNC_SDA5>;
|
||||||
|
mediatek,pull-up-adv = <3>;
|
||||||
|
mediatek,drive-strength-adv = <00>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c6_pins: i2c6 {
|
||||||
|
pins_cmd_dat {
|
||||||
|
pinmux = <PINMUX_GPIO113__FUNC_SCL6>,
|
||||||
|
<PINMUX_GPIO114__FUNC_SDA6>;
|
||||||
|
mediatek,pull-up-adv = <3>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
mmc0_pins_default: mmc0-pins-default {
|
||||||
|
pins_cmd_dat {
|
||||||
|
pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
|
||||||
|
<PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
|
||||||
|
<PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
|
||||||
|
<PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
|
||||||
|
<PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
|
||||||
|
<PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
|
||||||
|
<PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
|
||||||
|
<PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
|
||||||
|
<PINMUX_GPIO122__FUNC_MSDC0_CMD>;
|
||||||
|
input-enable;
|
||||||
|
drive-strength = <MTK_DRIVE_14mA>;
|
||||||
|
mediatek,pull-up-adv = <01>;
|
||||||
|
};
|
||||||
|
|
||||||
|
pins_clk {
|
||||||
|
pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
|
||||||
|
drive-strength = <MTK_DRIVE_14mA>;
|
||||||
|
mediatek,pull-down-adv = <10>;
|
||||||
|
};
|
||||||
|
|
||||||
|
pins_rst {
|
||||||
|
pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
|
||||||
|
drive-strength = <MTK_DRIVE_14mA>;
|
||||||
|
mediatek,pull-down-adv = <01>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
mmc0_pins_uhs: mmc0-pins-uhs {
|
||||||
|
pins_cmd_dat {
|
||||||
|
pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
|
||||||
|
<PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
|
||||||
|
<PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
|
||||||
|
<PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
|
||||||
|
<PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
|
||||||
|
<PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
|
||||||
|
<PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
|
||||||
|
<PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
|
||||||
|
<PINMUX_GPIO122__FUNC_MSDC0_CMD>;
|
||||||
|
input-enable;
|
||||||
|
drive-strength = <MTK_DRIVE_14mA>;
|
||||||
|
mediatek,pull-up-adv = <01>;
|
||||||
|
};
|
||||||
|
|
||||||
|
pins_clk {
|
||||||
|
pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
|
||||||
|
drive-strength = <MTK_DRIVE_14mA>;
|
||||||
|
mediatek,pull-down-adv = <10>;
|
||||||
|
};
|
||||||
|
|
||||||
|
pins_ds {
|
||||||
|
pinmux = <PINMUX_GPIO131__FUNC_MSDC0_DSL>;
|
||||||
|
drive-strength = <MTK_DRIVE_14mA>;
|
||||||
|
mediatek,pull-down-adv = <10>;
|
||||||
|
};
|
||||||
|
|
||||||
|
pins_rst {
|
||||||
|
pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
|
||||||
|
drive-strength = <MTK_DRIVE_14mA>;
|
||||||
|
mediatek,pull-up-adv = <01>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
mmc1_pins_default: mmc1-pins-default {
|
||||||
|
pins_cmd_dat {
|
||||||
|
pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
|
||||||
|
<PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
|
||||||
|
<PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
|
||||||
|
<PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
|
||||||
|
<PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
|
||||||
|
input-enable;
|
||||||
|
mediatek,pull-up-adv = <10>;
|
||||||
|
};
|
||||||
|
|
||||||
|
pins_clk {
|
||||||
|
pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
|
||||||
|
input-enable;
|
||||||
|
mediatek,pull-down-adv = <10>;
|
||||||
|
};
|
||||||
|
|
||||||
|
pins_pmu {
|
||||||
|
pinmux = <PINMUX_GPIO178__FUNC_GPIO178>;
|
||||||
|
output-high;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
mmc1_pins_uhs: mmc1-pins-uhs {
|
||||||
|
pins_cmd_dat {
|
||||||
|
pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
|
||||||
|
<PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
|
||||||
|
<PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
|
||||||
|
<PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
|
||||||
|
<PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
|
||||||
|
drive-strength = <MTK_DRIVE_6mA>;
|
||||||
|
input-enable;
|
||||||
|
mediatek,pull-up-adv = <10>;
|
||||||
|
};
|
||||||
|
|
||||||
|
pins_clk {
|
||||||
|
pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
|
||||||
|
drive-strength = <MTK_DRIVE_8mA>;
|
||||||
|
mediatek,pull-down-adv = <10>;
|
||||||
|
input-enable;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&mfg {
|
||||||
|
domain-supply = <&mt6358_vgpu_reg>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&cpu0 {
|
||||||
|
proc-supply = <&mt6358_vproc12_reg>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&cpu1 {
|
||||||
|
proc-supply = <&mt6358_vproc12_reg>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&cpu2 {
|
||||||
|
proc-supply = <&mt6358_vproc12_reg>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&cpu3 {
|
||||||
|
proc-supply = <&mt6358_vproc12_reg>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&cpu4 {
|
||||||
|
proc-supply = <&mt6358_vproc11_reg>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&cpu5 {
|
||||||
|
proc-supply = <&mt6358_vproc11_reg>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&cpu6 {
|
||||||
|
proc-supply = <&mt6358_vproc11_reg>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&cpu7 {
|
||||||
|
proc-supply = <&mt6358_vproc11_reg>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&uart0 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&scp {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&dsi0 {
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
@ -13,6 +13,7 @@
|
||||||
#include <dt-bindings/power/mt8183-power.h>
|
#include <dt-bindings/power/mt8183-power.h>
|
||||||
#include <dt-bindings/reset-controller/mt8183-resets.h>
|
#include <dt-bindings/reset-controller/mt8183-resets.h>
|
||||||
#include <dt-bindings/phy/phy.h>
|
#include <dt-bindings/phy/phy.h>
|
||||||
|
#include <dt-bindings/thermal/thermal.h>
|
||||||
#include "mt8183-pinfunc.h"
|
#include "mt8183-pinfunc.h"
|
||||||
|
|
||||||
/ {
|
/ {
|
||||||
|
|
@ -657,6 +658,142 @@
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
thermal: thermal@1100b000 {
|
||||||
|
#thermal-sensor-cells = <1>;
|
||||||
|
compatible = "mediatek,mt8183-thermal";
|
||||||
|
reg = <0 0x1100b000 0 0x1000>;
|
||||||
|
clocks = <&infracfg CLK_INFRA_THERM>,
|
||||||
|
<&infracfg CLK_INFRA_AUXADC>;
|
||||||
|
clock-names = "therm", "auxadc";
|
||||||
|
resets = <&infracfg MT8183_INFRACFG_AO_THERM_SW_RST>;
|
||||||
|
interrupts = <0 76 IRQ_TYPE_LEVEL_LOW>;
|
||||||
|
mediatek,auxadc = <&auxadc>;
|
||||||
|
mediatek,apmixedsys = <&apmixedsys>;
|
||||||
|
nvmem-cells = <&thermal_calibration>;
|
||||||
|
nvmem-cell-names = "calibration-data";
|
||||||
|
};
|
||||||
|
|
||||||
|
thermal-zones {
|
||||||
|
cpu_thermal: cpu_thermal {
|
||||||
|
polling-delay-passive = <100>;
|
||||||
|
polling-delay = <500>;
|
||||||
|
thermal-sensors = <&thermal 0>;
|
||||||
|
sustainable-power = <5000>;
|
||||||
|
|
||||||
|
trips {
|
||||||
|
threshold: trip-point@0 {
|
||||||
|
temperature = <68000>;
|
||||||
|
hysteresis = <2000>;
|
||||||
|
type = "passive";
|
||||||
|
};
|
||||||
|
|
||||||
|
target: trip-point@1 {
|
||||||
|
temperature = <80000>;
|
||||||
|
hysteresis = <2000>;
|
||||||
|
type = "passive";
|
||||||
|
};
|
||||||
|
|
||||||
|
cpu_crit: cpu-crit {
|
||||||
|
temperature = <115000>;
|
||||||
|
hysteresis = <2000>;
|
||||||
|
type = "critical";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
cooling-maps {
|
||||||
|
map0 {
|
||||||
|
trip = <&target>;
|
||||||
|
cooling-device = <&cpu0
|
||||||
|
THERMAL_NO_LIMIT
|
||||||
|
THERMAL_NO_LIMIT>,
|
||||||
|
<&cpu1
|
||||||
|
THERMAL_NO_LIMIT
|
||||||
|
THERMAL_NO_LIMIT>,
|
||||||
|
<&cpu2
|
||||||
|
THERMAL_NO_LIMIT
|
||||||
|
THERMAL_NO_LIMIT>,
|
||||||
|
<&cpu3
|
||||||
|
THERMAL_NO_LIMIT
|
||||||
|
THERMAL_NO_LIMIT>;
|
||||||
|
contribution = <3072>;
|
||||||
|
};
|
||||||
|
map1 {
|
||||||
|
trip = <&target>;
|
||||||
|
cooling-device = <&cpu4
|
||||||
|
THERMAL_NO_LIMIT
|
||||||
|
THERMAL_NO_LIMIT>,
|
||||||
|
<&cpu5
|
||||||
|
THERMAL_NO_LIMIT
|
||||||
|
THERMAL_NO_LIMIT>,
|
||||||
|
<&cpu6
|
||||||
|
THERMAL_NO_LIMIT
|
||||||
|
THERMAL_NO_LIMIT>,
|
||||||
|
<&cpu7
|
||||||
|
THERMAL_NO_LIMIT
|
||||||
|
THERMAL_NO_LIMIT>;
|
||||||
|
contribution = <1024>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
/* The tzts1 ~ tzts6 don't need to polling */
|
||||||
|
/* The tzts1 ~ tzts6 don't need to thermal throttle */
|
||||||
|
|
||||||
|
tzts1: tzts1 {
|
||||||
|
polling-delay-passive = <0>;
|
||||||
|
polling-delay = <0>;
|
||||||
|
thermal-sensors = <&thermal 1>;
|
||||||
|
sustainable-power = <5000>;
|
||||||
|
trips {};
|
||||||
|
cooling-maps {};
|
||||||
|
};
|
||||||
|
|
||||||
|
tzts2: tzts2 {
|
||||||
|
polling-delay-passive = <0>;
|
||||||
|
polling-delay = <0>;
|
||||||
|
thermal-sensors = <&thermal 2>;
|
||||||
|
sustainable-power = <5000>;
|
||||||
|
trips {};
|
||||||
|
cooling-maps {};
|
||||||
|
};
|
||||||
|
|
||||||
|
tzts3: tzts3 {
|
||||||
|
polling-delay-passive = <0>;
|
||||||
|
polling-delay = <0>;
|
||||||
|
thermal-sensors = <&thermal 3>;
|
||||||
|
sustainable-power = <5000>;
|
||||||
|
trips {};
|
||||||
|
cooling-maps {};
|
||||||
|
};
|
||||||
|
|
||||||
|
tzts4: tzts4 {
|
||||||
|
polling-delay-passive = <0>;
|
||||||
|
polling-delay = <0>;
|
||||||
|
thermal-sensors = <&thermal 4>;
|
||||||
|
sustainable-power = <5000>;
|
||||||
|
trips {};
|
||||||
|
cooling-maps {};
|
||||||
|
};
|
||||||
|
|
||||||
|
tzts5: tzts5 {
|
||||||
|
polling-delay-passive = <0>;
|
||||||
|
polling-delay = <0>;
|
||||||
|
thermal-sensors = <&thermal 5>;
|
||||||
|
sustainable-power = <5000>;
|
||||||
|
trips {};
|
||||||
|
cooling-maps {};
|
||||||
|
};
|
||||||
|
|
||||||
|
tztsABB: tztsABB {
|
||||||
|
polling-delay-passive = <0>;
|
||||||
|
polling-delay = <0>;
|
||||||
|
thermal-sensors = <&thermal 6>;
|
||||||
|
sustainable-power = <5000>;
|
||||||
|
trips {};
|
||||||
|
cooling-maps {};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
pwm0: pwm@1100e000 {
|
pwm0: pwm@1100e000 {
|
||||||
compatible = "mediatek,mt8183-disp-pwm";
|
compatible = "mediatek,mt8183-disp-pwm";
|
||||||
reg = <0 0x1100e000 0 0x1000>;
|
reg = <0 0x1100e000 0 0x1000>;
|
||||||
|
|
@ -874,13 +1011,13 @@
|
||||||
clocks = <&infracfg CLK_INFRA_UNIPRO_SCK>,
|
clocks = <&infracfg CLK_INFRA_UNIPRO_SCK>,
|
||||||
<&infracfg CLK_INFRA_USB>;
|
<&infracfg CLK_INFRA_USB>;
|
||||||
clock-names = "sys_ck", "ref_ck";
|
clock-names = "sys_ck", "ref_ck";
|
||||||
mediatek,syscon-wakeup = <&pericfg 0x400 0>;
|
mediatek,syscon-wakeup = <&pericfg 0x420 101>;
|
||||||
#address-cells = <2>;
|
#address-cells = <2>;
|
||||||
#size-cells = <2>;
|
#size-cells = <2>;
|
||||||
ranges;
|
ranges;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
|
|
||||||
usb_host: xhci@11200000 {
|
usb_host: usb@11200000 {
|
||||||
compatible = "mediatek,mt8183-xhci",
|
compatible = "mediatek,mt8183-xhci",
|
||||||
"mediatek,mtk-xhci";
|
"mediatek,mtk-xhci";
|
||||||
reg = <0 0x11200000 0 0x1000>;
|
reg = <0 0x11200000 0 0x1000>;
|
||||||
|
|
@ -923,11 +1060,10 @@
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
mipi_tx0: mipi-dphy@11e50000 {
|
mipi_tx0: dsi-phy@11e50000 {
|
||||||
compatible = "mediatek,mt8183-mipi-tx";
|
compatible = "mediatek,mt8183-mipi-tx";
|
||||||
reg = <0 0x11e50000 0 0x1000>;
|
reg = <0 0x11e50000 0 0x1000>;
|
||||||
clocks = <&apmixedsys CLK_APMIXED_MIPID0_26M>;
|
clocks = <&apmixedsys CLK_APMIXED_MIPID0_26M>;
|
||||||
clock-names = "ref_clk";
|
|
||||||
#clock-cells = <0>;
|
#clock-cells = <0>;
|
||||||
#phy-cells = <0>;
|
#phy-cells = <0>;
|
||||||
clock-output-names = "mipi_tx0_pll";
|
clock-output-names = "mipi_tx0_pll";
|
||||||
|
|
@ -941,16 +1077,19 @@
|
||||||
reg = <0 0x11f10000 0 0x1000>;
|
reg = <0 0x11f10000 0 0x1000>;
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <1>;
|
#size-cells = <1>;
|
||||||
|
thermal_calibration: calib@180 {
|
||||||
|
reg = <0x180 0xc>;
|
||||||
|
};
|
||||||
|
|
||||||
mipi_tx_calibration: calib@190 {
|
mipi_tx_calibration: calib@190 {
|
||||||
reg = <0x190 0xc>;
|
reg = <0x190 0xc>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
u3phy: usb-phy@11f40000 {
|
u3phy: t-phy@11f40000 {
|
||||||
compatible = "mediatek,mt8183-tphy",
|
compatible = "mediatek,mt8183-tphy",
|
||||||
"mediatek,generic-tphy-v2";
|
"mediatek,generic-tphy-v2";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#phy-cells = <1>;
|
|
||||||
#size-cells = <1>;
|
#size-cells = <1>;
|
||||||
ranges = <0 0 0x11f40000 0x1000>;
|
ranges = <0 0 0x11f40000 0x1000>;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
|
|
@ -983,6 +1122,9 @@
|
||||||
compatible = "mediatek,mt8183-mmsys", "syscon";
|
compatible = "mediatek,mt8183-mmsys", "syscon";
|
||||||
reg = <0 0x14000000 0 0x1000>;
|
reg = <0 0x14000000 0 0x1000>;
|
||||||
#clock-cells = <1>;
|
#clock-cells = <1>;
|
||||||
|
mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
|
||||||
|
<&gce 1 CMDQ_THR_PRIO_HIGHEST>;
|
||||||
|
mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
ovl0: ovl@14008000 {
|
ovl0: ovl@14008000 {
|
||||||
|
|
@ -1058,6 +1200,7 @@
|
||||||
interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_LOW>;
|
interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_LOW>;
|
||||||
power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
|
power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
|
||||||
clocks = <&mmsys CLK_MM_DISP_CCORR0>;
|
clocks = <&mmsys CLK_MM_DISP_CCORR0>;
|
||||||
|
mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xf000 0x1000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
aal0: aal@14010000 {
|
aal0: aal@14010000 {
|
||||||
|
|
@ -1067,6 +1210,7 @@
|
||||||
interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_LOW>;
|
interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_LOW>;
|
||||||
power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
|
power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
|
||||||
clocks = <&mmsys CLK_MM_DISP_AAL0>;
|
clocks = <&mmsys CLK_MM_DISP_AAL0>;
|
||||||
|
mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0 0x1000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
gamma0: gamma@14011000 {
|
gamma0: gamma@14011000 {
|
||||||
|
|
@ -1075,6 +1219,7 @@
|
||||||
interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_LOW>;
|
interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_LOW>;
|
||||||
power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
|
power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
|
||||||
clocks = <&mmsys CLK_MM_DISP_GAMMA0>;
|
clocks = <&mmsys CLK_MM_DISP_GAMMA0>;
|
||||||
|
mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x1000 0x1000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
dither0: dither@14012000 {
|
dither0: dither@14012000 {
|
||||||
|
|
@ -1083,6 +1228,7 @@
|
||||||
interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_LOW>;
|
interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_LOW>;
|
||||||
power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
|
power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
|
||||||
clocks = <&mmsys CLK_MM_DISP_DITHER0>;
|
clocks = <&mmsys CLK_MM_DISP_DITHER0>;
|
||||||
|
mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x2000 0x1000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
dsi0: dsi@14014000 {
|
dsi0: dsi@14014000 {
|
||||||
|
|
|
||||||
|
|
@ -480,7 +480,7 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
usb0: usb@11100000 {
|
usb0: usb@11100000 {
|
||||||
compatible = "mediatek,mtk-musb";
|
compatible = "mediatek,mt8516-musb", "mediatek,mtk-musb";
|
||||||
reg = <0 0x11100000 0 0x1000>;
|
reg = <0 0x11100000 0 0x1000>;
|
||||||
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_LOW>;
|
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_LOW>;
|
||||||
interrupt-names = "mc";
|
interrupt-names = "mc";
|
||||||
|
|
@ -493,7 +493,7 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
usb1: usb@11190000 {
|
usb1: usb@11190000 {
|
||||||
compatible = "mediatek,mtk-musb";
|
compatible = "mediatek,mt8516-musb", "mediatek,mtk-musb";
|
||||||
reg = <0 0x11190000 0 0x1000>;
|
reg = <0 0x11190000 0 0x1000>;
|
||||||
interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_LOW>;
|
interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_LOW>;
|
||||||
interrupt-names = "mc";
|
interrupt-names = "mc";
|
||||||
|
|
@ -506,8 +506,9 @@
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
usb_phy: usb@11110000 {
|
usb_phy: t-phy@11110000 {
|
||||||
compatible = "mediatek,generic-tphy-v1";
|
compatible = "mediatek,mt8516-tphy",
|
||||||
|
"mediatek,generic-tphy-v1";
|
||||||
reg = <0 0x11110000 0 0x800>;
|
reg = <0 0x11110000 0 0x800>;
|
||||||
#address-cells = <2>;
|
#address-cells = <2>;
|
||||||
#size-cells = <2>;
|
#size-cells = <2>;
|
||||||
|
|
|
||||||
|
|
@ -56,7 +56,7 @@
|
||||||
tca6416: gpio@20 {
|
tca6416: gpio@20 {
|
||||||
compatible = "ti,tca6416";
|
compatible = "ti,tca6416";
|
||||||
reg = <0x20>;
|
reg = <0x20>;
|
||||||
reset-gpios = <&pio 65 GPIO_ACTIVE_HIGH>;
|
reset-gpios = <&pio 65 GPIO_ACTIVE_LOW>;
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&tca6416_pins>;
|
pinctrl-0 = <&tca6416_pins>;
|
||||||
|
|
||||||
|
|
@ -188,6 +188,7 @@
|
||||||
&usb0 {
|
&usb0 {
|
||||||
status = "okay";
|
status = "okay";
|
||||||
dr_mode = "peripheral";
|
dr_mode = "peripheral";
|
||||||
|
usb-role-switch;
|
||||||
|
|
||||||
usb_con: connector {
|
usb_con: connector {
|
||||||
compatible = "usb-c-connector";
|
compatible = "usb-c-connector";
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue