RISC-V: KVM: Implement subtype for CSR ONE_REG interface
To make the CSR ONE_REG interface extensible, we implement subtype for the CSR ONE_REG IDs. The existing CSR ONE_REG IDs are treated as subtype = 0 (aka General CSRs). Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> Signed-off-by: Anup Patel <anup@brainfault.org>
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@ -65,7 +65,7 @@ struct kvm_riscv_core {
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#define KVM_RISCV_MODE_S 1
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#define KVM_RISCV_MODE_U 0
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/* CSR registers for KVM_GET_ONE_REG and KVM_SET_ONE_REG */
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/* General CSR registers for KVM_GET_ONE_REG and KVM_SET_ONE_REG */
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struct kvm_riscv_csr {
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unsigned long sstatus;
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unsigned long sie;
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@ -152,6 +152,7 @@ enum KVM_RISCV_SBI_EXT_ID {
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/* Control and status registers are mapped as type 3 */
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#define KVM_REG_RISCV_CSR (0x03 << KVM_REG_RISCV_TYPE_SHIFT)
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#define KVM_REG_RISCV_CSR_GENERAL (0x0 << KVM_REG_RISCV_SUBTYPE_SHIFT)
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#define KVM_REG_RISCV_CSR_REG(name) \
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(offsetof(struct kvm_riscv_csr, name) / sizeof(unsigned long))
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@ -460,53 +460,33 @@ static int kvm_riscv_vcpu_set_reg_core(struct kvm_vcpu *vcpu,
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return 0;
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}
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static int kvm_riscv_vcpu_get_reg_csr(struct kvm_vcpu *vcpu,
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const struct kvm_one_reg *reg)
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static int kvm_riscv_vcpu_general_get_csr(struct kvm_vcpu *vcpu,
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unsigned long reg_num,
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unsigned long *out_val)
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{
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struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr;
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unsigned long __user *uaddr =
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(unsigned long __user *)(unsigned long)reg->addr;
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unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |
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KVM_REG_SIZE_MASK |
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KVM_REG_RISCV_CSR);
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unsigned long reg_val;
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if (KVM_REG_SIZE(reg->id) != sizeof(unsigned long))
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return -EINVAL;
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if (reg_num >= sizeof(struct kvm_riscv_csr) / sizeof(unsigned long))
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return -EINVAL;
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if (reg_num == KVM_REG_RISCV_CSR_REG(sip)) {
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kvm_riscv_vcpu_flush_interrupts(vcpu);
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reg_val = (csr->hvip >> VSIP_TO_HVIP_SHIFT) & VSIP_VALID_MASK;
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*out_val = (csr->hvip >> VSIP_TO_HVIP_SHIFT) & VSIP_VALID_MASK;
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} else
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reg_val = ((unsigned long *)csr)[reg_num];
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if (copy_to_user(uaddr, ®_val, KVM_REG_SIZE(reg->id)))
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return -EFAULT;
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*out_val = ((unsigned long *)csr)[reg_num];
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return 0;
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}
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static int kvm_riscv_vcpu_set_reg_csr(struct kvm_vcpu *vcpu,
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const struct kvm_one_reg *reg)
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static inline int kvm_riscv_vcpu_general_set_csr(struct kvm_vcpu *vcpu,
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unsigned long reg_num,
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unsigned long reg_val)
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{
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struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr;
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unsigned long __user *uaddr =
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(unsigned long __user *)(unsigned long)reg->addr;
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unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |
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KVM_REG_SIZE_MASK |
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KVM_REG_RISCV_CSR);
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unsigned long reg_val;
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if (KVM_REG_SIZE(reg->id) != sizeof(unsigned long))
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return -EINVAL;
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if (reg_num >= sizeof(struct kvm_riscv_csr) / sizeof(unsigned long))
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return -EINVAL;
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if (copy_from_user(®_val, uaddr, KVM_REG_SIZE(reg->id)))
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return -EFAULT;
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if (reg_num == KVM_REG_RISCV_CSR_REG(sip)) {
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reg_val &= VSIP_VALID_MASK;
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reg_val <<= VSIP_TO_HVIP_SHIFT;
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@ -520,6 +500,72 @@ static int kvm_riscv_vcpu_set_reg_csr(struct kvm_vcpu *vcpu,
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return 0;
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}
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static int kvm_riscv_vcpu_get_reg_csr(struct kvm_vcpu *vcpu,
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const struct kvm_one_reg *reg)
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{
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int rc;
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unsigned long __user *uaddr =
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(unsigned long __user *)(unsigned long)reg->addr;
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unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |
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KVM_REG_SIZE_MASK |
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KVM_REG_RISCV_CSR);
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unsigned long reg_val, reg_subtype;
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if (KVM_REG_SIZE(reg->id) != sizeof(unsigned long))
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return -EINVAL;
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reg_subtype = reg_num & KVM_REG_RISCV_SUBTYPE_MASK;
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reg_num &= ~KVM_REG_RISCV_SUBTYPE_MASK;
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switch (reg_subtype) {
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case KVM_REG_RISCV_CSR_GENERAL:
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rc = kvm_riscv_vcpu_general_get_csr(vcpu, reg_num, ®_val);
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break;
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default:
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rc = -EINVAL;
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break;
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}
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if (rc)
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return rc;
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if (copy_to_user(uaddr, ®_val, KVM_REG_SIZE(reg->id)))
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return -EFAULT;
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return 0;
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}
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static int kvm_riscv_vcpu_set_reg_csr(struct kvm_vcpu *vcpu,
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const struct kvm_one_reg *reg)
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{
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int rc;
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unsigned long __user *uaddr =
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(unsigned long __user *)(unsigned long)reg->addr;
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unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |
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KVM_REG_SIZE_MASK |
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KVM_REG_RISCV_CSR);
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unsigned long reg_val, reg_subtype;
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if (KVM_REG_SIZE(reg->id) != sizeof(unsigned long))
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return -EINVAL;
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if (copy_from_user(®_val, uaddr, KVM_REG_SIZE(reg->id)))
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return -EFAULT;
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reg_subtype = reg_num & KVM_REG_RISCV_SUBTYPE_MASK;
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reg_num &= ~KVM_REG_RISCV_SUBTYPE_MASK;
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switch (reg_subtype) {
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case KVM_REG_RISCV_CSR_GENERAL:
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rc = kvm_riscv_vcpu_general_set_csr(vcpu, reg_num, reg_val);
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break;
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default:
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rc = -EINVAL;
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break;
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}
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if (rc)
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return rc;
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return 0;
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}
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static int kvm_riscv_vcpu_get_reg_isa_ext(struct kvm_vcpu *vcpu,
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const struct kvm_one_reg *reg)
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{
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