ARM: shmobile: bonito: Register pinctrl mapping for SCIF
Replace the GPIO-based SCIF pinmux configuration by a pinctrl mapping. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -369,6 +369,12 @@ static void __init bonito_map_io(void)
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#define VCCQ1CR IOMEM(0xE6058140)
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#define VCCQ1CR IOMEM(0xE6058140)
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#define VCCQ1LCDCR IOMEM(0xE6058186)
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#define VCCQ1LCDCR IOMEM(0xE6058186)
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static const struct pinctrl_map scifa5_pinctrl_map[] = {
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/* SCIFA5 */
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PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.5", "pfc-r8a7740",
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"scifa5_data_2", "scifa5"),
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};
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static void __init bonito_init(void)
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static void __init bonito_init(void)
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{
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{
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u16 val;
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u16 val;
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@ -423,8 +429,8 @@ static void __init bonito_init(void)
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if (BIT_OFF(bsw2, 1) && /* S38.3 = ON */
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if (BIT_OFF(bsw2, 1) && /* S38.3 = ON */
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BIT_OFF(bsw3, 9) && /* S39.6 = ON */
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BIT_OFF(bsw3, 9) && /* S39.6 = ON */
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BIT_OFF(bsw4, 4)) { /* S43.1 = ON */
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BIT_OFF(bsw4, 4)) { /* S43.1 = ON */
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gpio_request(GPIO_FN_SCIFA5_TXD_PORT91, NULL);
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pinctrl_register_mappings(scifa5_pinctrl_map,
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gpio_request(GPIO_FN_SCIFA5_RXD_PORT92, NULL);
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ARRAY_SIZE(scifa5_pinctrl_map));
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}
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}
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/*
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/*
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