drm/amdgpu/mst: Stop ignoring error codes and deadlocking
It appears that amdgpu makes the mistake of completely ignoring the return
values from the DP MST helpers, and instead just returns a simple
true/false. In this case, it seems to have come back to bite us because as
a result of simply returning false from
compute_mst_dsc_configs_for_state(), amdgpu had no way of telling when a
deadlock happened from these helpers. This could definitely result in some
kernel splats.
V2:
* Address Wayne's comments (fix another bunch of spots where we weren't
passing down return codes)
Signed-off-by: Lyude Paul <lyude@redhat.com>
Fixes: 8c20a1ed9b ("drm/amd/display: MST DSC compute fair share")
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: <stable@vger.kernel.org> # v5.6+
Reviewed-by: Wayne Lin <Wayne.Lin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Lyude Paul
Alex Deucher
parent
c6023d73a3
commit
7cce4cd628
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@ -6539,7 +6539,7 @@ static int dm_update_mst_vcpi_slots_for_dsc(struct drm_atomic_state *state,
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struct drm_connector_state *new_con_state;
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struct amdgpu_dm_connector *aconnector;
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struct dm_connector_state *dm_conn_state;
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int i, j;
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int i, j, ret;
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int vcpi, pbn_div, pbn, slot_num = 0;
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for_each_new_connector_in_state(state, connector, new_con_state, i) {
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@ -6586,8 +6586,11 @@ static int dm_update_mst_vcpi_slots_for_dsc(struct drm_atomic_state *state,
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dm_conn_state->pbn = pbn;
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dm_conn_state->vcpi_slots = slot_num;
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drm_dp_mst_atomic_enable_dsc(state, aconnector->port, dm_conn_state->pbn,
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false);
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ret = drm_dp_mst_atomic_enable_dsc(state, aconnector->port,
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dm_conn_state->pbn, false);
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if (ret < 0)
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return ret;
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continue;
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}
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@ -9604,11 +9607,10 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
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#if defined(CONFIG_DRM_AMD_DC_DCN)
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if (dc_resource_is_dsc_encoding_supported(dc)) {
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if (!pre_validate_dsc(state, &dm_state, vars)) {
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ret = -EINVAL;
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ret = pre_validate_dsc(state, &dm_state, vars);
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if (ret != 0)
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goto fail;
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}
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}
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#endif
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/* Run this here since we want to validate the streams we created */
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@ -9702,9 +9704,9 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
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}
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#if defined(CONFIG_DRM_AMD_DC_DCN)
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if (!compute_mst_dsc_configs_for_state(state, dm_state->context, vars)) {
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ret = compute_mst_dsc_configs_for_state(state, dm_state->context, vars);
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if (ret) {
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DRM_DEBUG_DRIVER("compute_mst_dsc_configs_for_state() failed\n");
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ret = -EINVAL;
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goto fail;
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}
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@ -710,7 +710,7 @@ static int bpp_x16_from_pbn(struct dsc_mst_fairness_params param, int pbn)
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return dsc_config.bits_per_pixel;
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}
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static bool increase_dsc_bpp(struct drm_atomic_state *state,
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static int increase_dsc_bpp(struct drm_atomic_state *state,
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struct drm_dp_mst_topology_state *mst_state,
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struct dc_link *dc_link,
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struct dsc_mst_fairness_params *params,
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@ -726,6 +726,7 @@ static bool increase_dsc_bpp(struct drm_atomic_state *state,
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int remaining_to_increase = 0;
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int link_timeslots_used;
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int fair_pbn_alloc;
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int ret = 0;
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for (i = 0; i < count; i++) {
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if (vars[i + k].dsc_enabled) {
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@ -764,47 +765,55 @@ static bool increase_dsc_bpp(struct drm_atomic_state *state,
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if (initial_slack[next_index] > fair_pbn_alloc) {
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vars[next_index].pbn += fair_pbn_alloc;
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if (drm_dp_atomic_find_time_slots(state,
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ret = drm_dp_atomic_find_time_slots(state,
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params[next_index].port->mgr,
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params[next_index].port,
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vars[next_index].pbn) < 0)
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return false;
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if (!drm_dp_mst_atomic_check(state)) {
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vars[next_index].pbn);
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if (ret < 0)
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return ret;
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ret = drm_dp_mst_atomic_check(state);
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if (ret == 0) {
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vars[next_index].bpp_x16 = bpp_x16_from_pbn(params[next_index], vars[next_index].pbn);
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} else {
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vars[next_index].pbn -= fair_pbn_alloc;
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if (drm_dp_atomic_find_time_slots(state,
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ret = drm_dp_atomic_find_time_slots(state,
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params[next_index].port->mgr,
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params[next_index].port,
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vars[next_index].pbn) < 0)
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return false;
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vars[next_index].pbn);
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if (ret < 0)
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return ret;
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}
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} else {
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vars[next_index].pbn += initial_slack[next_index];
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if (drm_dp_atomic_find_time_slots(state,
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ret = drm_dp_atomic_find_time_slots(state,
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params[next_index].port->mgr,
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params[next_index].port,
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vars[next_index].pbn) < 0)
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return false;
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if (!drm_dp_mst_atomic_check(state)) {
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vars[next_index].pbn);
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if (ret < 0)
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return ret;
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ret = drm_dp_mst_atomic_check(state);
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if (ret == 0) {
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vars[next_index].bpp_x16 = params[next_index].bw_range.max_target_bpp_x16;
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} else {
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vars[next_index].pbn -= initial_slack[next_index];
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if (drm_dp_atomic_find_time_slots(state,
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ret = drm_dp_atomic_find_time_slots(state,
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params[next_index].port->mgr,
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params[next_index].port,
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vars[next_index].pbn) < 0)
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return false;
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vars[next_index].pbn);
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if (ret < 0)
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return ret;
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}
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}
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bpp_increased[next_index] = true;
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remaining_to_increase--;
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}
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return true;
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return 0;
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}
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static bool try_disable_dsc(struct drm_atomic_state *state,
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static int try_disable_dsc(struct drm_atomic_state *state,
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struct dc_link *dc_link,
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struct dsc_mst_fairness_params *params,
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struct dsc_mst_fairness_vars *vars,
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@ -817,6 +826,7 @@ static bool try_disable_dsc(struct drm_atomic_state *state,
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int max_kbps_increase;
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int next_index;
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int remaining_to_try = 0;
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int ret;
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for (i = 0; i < count; i++) {
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if (vars[i + k].dsc_enabled
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@ -847,31 +857,34 @@ static bool try_disable_dsc(struct drm_atomic_state *state,
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break;
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vars[next_index].pbn = kbps_to_peak_pbn(params[next_index].bw_range.stream_kbps);
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if (drm_dp_atomic_find_time_slots(state,
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ret = drm_dp_atomic_find_time_slots(state,
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params[next_index].port->mgr,
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params[next_index].port,
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vars[next_index].pbn) < 0)
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return false;
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vars[next_index].pbn);
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if (ret < 0)
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return ret;
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if (!drm_dp_mst_atomic_check(state)) {
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ret = drm_dp_mst_atomic_check(state);
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if (ret == 0) {
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vars[next_index].dsc_enabled = false;
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vars[next_index].bpp_x16 = 0;
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} else {
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vars[next_index].pbn = kbps_to_peak_pbn(params[next_index].bw_range.max_kbps);
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if (drm_dp_atomic_find_time_slots(state,
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ret = drm_dp_atomic_find_time_slots(state,
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params[next_index].port->mgr,
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params[next_index].port,
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vars[next_index].pbn) < 0)
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return false;
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vars[next_index].pbn);
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if (ret < 0)
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return ret;
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}
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tried[next_index] = true;
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remaining_to_try--;
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}
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return true;
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return 0;
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}
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static bool compute_mst_dsc_configs_for_link(struct drm_atomic_state *state,
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static int compute_mst_dsc_configs_for_link(struct drm_atomic_state *state,
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struct dc_state *dc_state,
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struct dc_link *dc_link,
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struct dsc_mst_fairness_vars *vars,
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@ -883,13 +896,13 @@ static bool compute_mst_dsc_configs_for_link(struct drm_atomic_state *state,
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struct amdgpu_dm_connector *aconnector;
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struct drm_dp_mst_topology_state *mst_state = drm_atomic_get_mst_topology_state(state, mgr);
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int count = 0;
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int i, k;
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int i, k, ret;
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bool debugfs_overwrite = false;
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memset(params, 0, sizeof(params));
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if (IS_ERR(mst_state))
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return false;
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return PTR_ERR(mst_state);
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mst_state->pbn_div = dm_mst_get_pbn_divider(dc_link);
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#if defined(CONFIG_DRM_AMD_DC_DCN)
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@ -940,7 +953,7 @@ static bool compute_mst_dsc_configs_for_link(struct drm_atomic_state *state,
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if (count == 0) {
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ASSERT(0);
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return true;
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return 0;
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}
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/* k is start index of vars for current phy link used by mst hub */
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@ -954,13 +967,17 @@ static bool compute_mst_dsc_configs_for_link(struct drm_atomic_state *state,
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vars[i + k].pbn = kbps_to_peak_pbn(params[i].bw_range.stream_kbps);
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vars[i + k].dsc_enabled = false;
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vars[i + k].bpp_x16 = 0;
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if (drm_dp_atomic_find_time_slots(state, params[i].port->mgr, params[i].port,
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vars[i + k].pbn) < 0)
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return false;
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ret = drm_dp_atomic_find_time_slots(state, params[i].port->mgr, params[i].port,
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vars[i + k].pbn);
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if (ret < 0)
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return ret;
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}
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if (!drm_dp_mst_atomic_check(state) && !debugfs_overwrite) {
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ret = drm_dp_mst_atomic_check(state);
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if (ret == 0 && !debugfs_overwrite) {
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set_dsc_configs_from_fairness_vars(params, vars, count, k);
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return true;
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return 0;
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} else if (ret != -ENOSPC) {
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return ret;
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}
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/* Try max compression */
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@ -969,31 +986,36 @@ static bool compute_mst_dsc_configs_for_link(struct drm_atomic_state *state,
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vars[i + k].pbn = kbps_to_peak_pbn(params[i].bw_range.min_kbps);
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vars[i + k].dsc_enabled = true;
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vars[i + k].bpp_x16 = params[i].bw_range.min_target_bpp_x16;
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if (drm_dp_atomic_find_time_slots(state, params[i].port->mgr,
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params[i].port, vars[i + k].pbn) < 0)
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return false;
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ret = drm_dp_atomic_find_time_slots(state, params[i].port->mgr,
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params[i].port, vars[i + k].pbn);
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if (ret < 0)
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return ret;
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} else {
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vars[i + k].pbn = kbps_to_peak_pbn(params[i].bw_range.stream_kbps);
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vars[i + k].dsc_enabled = false;
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vars[i + k].bpp_x16 = 0;
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if (drm_dp_atomic_find_time_slots(state, params[i].port->mgr,
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params[i].port, vars[i + k].pbn) < 0)
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return false;
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ret = drm_dp_atomic_find_time_slots(state, params[i].port->mgr,
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params[i].port, vars[i + k].pbn);
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if (ret < 0)
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return ret;
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}
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}
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if (drm_dp_mst_atomic_check(state))
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return false;
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ret = drm_dp_mst_atomic_check(state);
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if (ret != 0)
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return ret;
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/* Optimize degree of compression */
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if (!increase_dsc_bpp(state, mst_state, dc_link, params, vars, count, k))
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return false;
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ret = increase_dsc_bpp(state, mst_state, dc_link, params, vars, count, k);
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if (ret < 0)
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return ret;
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if (!try_disable_dsc(state, dc_link, params, vars, count, k))
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return false;
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ret = try_disable_dsc(state, dc_link, params, vars, count, k);
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if (ret < 0)
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return ret;
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set_dsc_configs_from_fairness_vars(params, vars, count, k);
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return true;
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return 0;
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}
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static bool is_dsc_need_re_compute(
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@ -1094,7 +1116,7 @@ static bool is_dsc_need_re_compute(
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return is_dsc_need_re_compute;
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}
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bool compute_mst_dsc_configs_for_state(struct drm_atomic_state *state,
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int compute_mst_dsc_configs_for_state(struct drm_atomic_state *state,
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struct dc_state *dc_state,
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struct dsc_mst_fairness_vars *vars)
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{
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@ -1103,6 +1125,7 @@ bool compute_mst_dsc_configs_for_state(struct drm_atomic_state *state,
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bool computed_streams[MAX_PIPES];
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struct amdgpu_dm_connector *aconnector;
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int link_vars_start_index = 0;
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int ret = 0;
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for (i = 0; i < dc_state->stream_count; i++)
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computed_streams[i] = false;
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@ -1125,17 +1148,19 @@ bool compute_mst_dsc_configs_for_state(struct drm_atomic_state *state,
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continue;
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if (dcn20_remove_stream_from_ctx(stream->ctx->dc, dc_state, stream) != DC_OK)
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return false;
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return -EINVAL;
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if (!is_dsc_need_re_compute(state, dc_state, stream->link))
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continue;
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mutex_lock(&aconnector->mst_mgr.lock);
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if (!compute_mst_dsc_configs_for_link(state, dc_state, stream->link, vars,
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ret = compute_mst_dsc_configs_for_link(state, dc_state, stream->link, vars,
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&aconnector->mst_mgr,
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&link_vars_start_index)) {
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&link_vars_start_index);
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if (ret != 0) {
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mutex_unlock(&aconnector->mst_mgr.lock);
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return false;
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return ret;
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}
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mutex_unlock(&aconnector->mst_mgr.lock);
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@ -1150,14 +1175,13 @@ bool compute_mst_dsc_configs_for_state(struct drm_atomic_state *state,
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if (stream->timing.flags.DSC == 1)
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if (dc_stream_add_dsc_to_resource(stream->ctx->dc, dc_state, stream) != DC_OK)
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return false;
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return -EINVAL;
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}
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return true;
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return ret;
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}
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static bool
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pre_compute_mst_dsc_configs_for_state(struct drm_atomic_state *state,
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static int pre_compute_mst_dsc_configs_for_state(struct drm_atomic_state *state,
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struct dc_state *dc_state,
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struct dsc_mst_fairness_vars *vars)
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{
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@ -1166,6 +1190,7 @@ static bool
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bool computed_streams[MAX_PIPES];
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struct amdgpu_dm_connector *aconnector;
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int link_vars_start_index = 0;
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int ret;
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for (i = 0; i < dc_state->stream_count; i++)
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computed_streams[i] = false;
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@ -1191,11 +1216,12 @@ static bool
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continue;
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mutex_lock(&aconnector->mst_mgr.lock);
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if (!compute_mst_dsc_configs_for_link(state, dc_state, stream->link, vars,
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ret = compute_mst_dsc_configs_for_link(state, dc_state, stream->link, vars,
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&aconnector->mst_mgr,
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&link_vars_start_index)) {
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&link_vars_start_index);
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if (ret != 0) {
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mutex_unlock(&aconnector->mst_mgr.lock);
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return false;
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return ret;
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}
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mutex_unlock(&aconnector->mst_mgr.lock);
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@ -1205,7 +1231,7 @@ static bool
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}
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}
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return true;
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return ret;
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}
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static int find_crtc_index_in_state_by_stream(struct drm_atomic_state *state,
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@ -1260,7 +1286,7 @@ static bool is_dsc_precompute_needed(struct drm_atomic_state *state)
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return ret;
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}
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bool pre_validate_dsc(struct drm_atomic_state *state,
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int pre_validate_dsc(struct drm_atomic_state *state,
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struct dm_atomic_state **dm_state_ptr,
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struct dsc_mst_fairness_vars *vars)
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{
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@ -1271,11 +1297,12 @@ bool pre_validate_dsc(struct drm_atomic_state *state,
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if (!is_dsc_precompute_needed(state)) {
|
||||
DRM_INFO_ONCE("DSC precompute is not needed.\n");
|
||||
return true;
|
||||
return 0;
|
||||
}
|
||||
if (dm_atomic_get_state(state, dm_state_ptr)) {
|
||||
ret = dm_atomic_get_state(state, dm_state_ptr);
|
||||
if (ret != 0) {
|
||||
DRM_INFO_ONCE("dm_atomic_get_state() failed\n");
|
||||
return false;
|
||||
return ret;
|
||||
}
|
||||
dm_state = *dm_state_ptr;
|
||||
|
||||
|
|
@ -1287,7 +1314,7 @@ bool pre_validate_dsc(struct drm_atomic_state *state,
|
|||
|
||||
local_dc_state = kmemdup(dm_state->context, sizeof(struct dc_state), GFP_KERNEL);
|
||||
if (!local_dc_state)
|
||||
return false;
|
||||
return -ENOMEM;
|
||||
|
||||
for (i = 0; i < local_dc_state->stream_count; i++) {
|
||||
struct dc_stream_state *stream = dm_state->context->streams[i];
|
||||
|
|
@ -1323,9 +1350,9 @@ bool pre_validate_dsc(struct drm_atomic_state *state,
|
|||
if (ret != 0)
|
||||
goto clean_exit;
|
||||
|
||||
if (!pre_compute_mst_dsc_configs_for_state(state, local_dc_state, vars)) {
|
||||
ret = pre_compute_mst_dsc_configs_for_state(state, local_dc_state, vars);
|
||||
if (ret != 0) {
|
||||
DRM_INFO_ONCE("pre_compute_mst_dsc_configs_for_state() failed\n");
|
||||
ret = -EINVAL;
|
||||
goto clean_exit;
|
||||
}
|
||||
|
||||
|
|
@ -1356,7 +1383,7 @@ clean_exit:
|
|||
|
||||
kfree(local_dc_state);
|
||||
|
||||
return (ret == 0);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static unsigned int kbps_from_pbn(unsigned int pbn)
|
||||
|
|
|
|||
|
|
@ -53,13 +53,13 @@ struct dsc_mst_fairness_vars {
|
|||
struct amdgpu_dm_connector *aconnector;
|
||||
};
|
||||
|
||||
bool compute_mst_dsc_configs_for_state(struct drm_atomic_state *state,
|
||||
int compute_mst_dsc_configs_for_state(struct drm_atomic_state *state,
|
||||
struct dc_state *dc_state,
|
||||
struct dsc_mst_fairness_vars *vars);
|
||||
|
||||
bool needs_dsc_aux_workaround(struct dc_link *link);
|
||||
|
||||
bool pre_validate_dsc(struct drm_atomic_state *state,
|
||||
int pre_validate_dsc(struct drm_atomic_state *state,
|
||||
struct dm_atomic_state **dm_state_ptr,
|
||||
struct dsc_mst_fairness_vars *vars);
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue