powerpc updates for 5.15
- Convert pseries & powernv to use MSI IRQ domains.
- Rework the pseries CPU numbering so that CPUs that are removed, and later re-added, are
given a CPU number on the same node as previously, when possible.
- Add support for a new more flexible device-tree format for specifying NUMA distances.
- Convert powerpc to GENERIC_PTDUMP.
- Retire sbc8548 and sbc8641d board support.
- Various other small features and fixes.
Thanks to: Alexey Kardashevskiy, Aneesh Kumar K.V, Anton Blanchard, Cédric Le Goater,
Christophe Leroy, Emmanuel Gil Peyrot, Fabiano Rosas, Fangrui Song, Finn Thain, Gautham R.
Shenoy, Hari Bathini, Joel Stanley, Jordan Niethe, Kajol Jain, Laurent Dufour, Leonardo
Bras, Lukas Bulwahn, Marc Zyngier, Masahiro Yamada, Michal Suchanek, Nathan Chancellor,
Nicholas Piggin, Parth Shah, Paul Gortmaker, Pratik R. Sampat, Randy Dunlap, Sebastian
Andrzej Siewior, Srikar Dronamraju, Wan Jiabing, Xiongwei Song, Zheng Yongjun.
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Merge tag 'powerpc-5.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
Pull powerpc updates from Michael Ellerman:
- Convert pseries & powernv to use MSI IRQ domains.
- Rework the pseries CPU numbering so that CPUs that are removed, and
later re-added, are given a CPU number on the same node as
previously, when possible.
- Add support for a new more flexible device-tree format for specifying
NUMA distances.
- Convert powerpc to GENERIC_PTDUMP.
- Retire sbc8548 and sbc8641d board support.
- Various other small features and fixes.
Thanks to Alexey Kardashevskiy, Aneesh Kumar K.V, Anton Blanchard,
Cédric Le Goater, Christophe Leroy, Emmanuel Gil Peyrot, Fabiano Rosas,
Fangrui Song, Finn Thain, Gautham R. Shenoy, Hari Bathini, Joel
Stanley, Jordan Niethe, Kajol Jain, Laurent Dufour, Leonardo Bras, Lukas
Bulwahn, Marc Zyngier, Masahiro Yamada, Michal Suchanek, Nathan
Chancellor, Nicholas Piggin, Parth Shah, Paul Gortmaker, Pratik R.
Sampat, Randy Dunlap, Sebastian Andrzej Siewior, Srikar Dronamraju, Wan
Jiabing, Xiongwei Song, and Zheng Yongjun.
* tag 'powerpc-5.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (154 commits)
powerpc/bug: Cast to unsigned long before passing to inline asm
powerpc/ptdump: Fix generic ptdump for 64-bit
KVM: PPC: Fix clearing never mapped TCEs in realmode
powerpc/pseries/iommu: Rename "direct window" to "dma window"
powerpc/pseries/iommu: Make use of DDW for indirect mapping
powerpc/pseries/iommu: Find existing DDW with given property name
powerpc/pseries/iommu: Update remove_dma_window() to accept property name
powerpc/pseries/iommu: Reorganize iommu_table_setparms*() with new helper
powerpc/pseries/iommu: Add ddw_property_create() and refactor enable_ddw()
powerpc/pseries/iommu: Allow DDW windows starting at 0x00
powerpc/pseries/iommu: Add ddw_list_new_entry() helper
powerpc/pseries/iommu: Add iommu_pseries_alloc_table() helper
powerpc/kernel/iommu: Add new iommu_table_in_use() helper
powerpc/pseries/iommu: Replace hard-coded page shift
powerpc/numa: Update cpu_cpu_map on CPU online/offline
powerpc/numa: Print debug statements only when required
powerpc/numa: convert printk to pr_xxx
powerpc/numa: Drop dbg in favour of pr_debug
powerpc/smp: Enable CACHE domain for shared processor
powerpc/smp: Update cpu_core_map on all PowerPc systems
...
This commit is contained in:
Linus Torvalds
commit
7cca308cfd
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|
@ -0,0 +1,105 @@
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============================
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NUMA resource associativity
|
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============================
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|
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Associativity represents the groupings of the various platform resources into
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domains of substantially similar mean performance relative to resources outside
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of that domain. Resources subsets of a given domain that exhibit better
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performance relative to each other than relative to other resources subsets
|
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are represented as being members of a sub-grouping domain. This performance
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characteristic is presented in terms of NUMA node distance within the Linux kernel.
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From the platform view, these groups are also referred to as domains.
|
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|
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PAPR interface currently supports different ways of communicating these resource
|
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grouping details to the OS. These are referred to as Form 0, Form 1 and Form2
|
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associativity grouping. Form 0 is the oldest format and is now considered deprecated.
|
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|
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Hypervisor indicates the type/form of associativity used via "ibm,architecture-vec-5 property".
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Bit 0 of byte 5 in the "ibm,architecture-vec-5" property indicates usage of Form 0 or Form 1.
|
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A value of 1 indicates the usage of Form 1 associativity. For Form 2 associativity
|
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bit 2 of byte 5 in the "ibm,architecture-vec-5" property is used.
|
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|
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Form 0
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------
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Form 0 associativity supports only two NUMA distances (LOCAL and REMOTE).
|
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|
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Form 1
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------
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With Form 1 a combination of ibm,associativity-reference-points, and ibm,associativity
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device tree properties are used to determine the NUMA distance between resource groups/domains.
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|
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The “ibm,associativity” property contains a list of one or more numbers (domainID)
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representing the resource’s platform grouping domains.
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|
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The “ibm,associativity-reference-points” property contains a list of one or more numbers
|
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(domainID index) that represents the 1 based ordinal in the associativity lists.
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The list of domainID indexes represents an increasing hierarchy of resource grouping.
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ex:
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{ primary domainID index, secondary domainID index, tertiary domainID index.. }
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Linux kernel uses the domainID at the primary domainID index as the NUMA node id.
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Linux kernel computes NUMA distance between two domains by recursively comparing
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if they belong to the same higher-level domains. For mismatch at every higher
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level of the resource group, the kernel doubles the NUMA distance between the
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comparing domains.
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Form 2
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-------
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Form 2 associativity format adds separate device tree properties representing NUMA node distance
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thereby making the node distance computation flexible. Form 2 also allows flexible primary
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domain numbering. With numa distance computation now detached from the index value in
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"ibm,associativity-reference-points" property, Form 2 allows a large number of primary domain
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ids at the same domainID index representing resource groups of different performance/latency
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characteristics.
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Hypervisor indicates the usage of FORM2 associativity using bit 2 of byte 5 in the
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"ibm,architecture-vec-5" property.
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"ibm,numa-lookup-index-table" property contains a list of one or more numbers representing
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the domainIDs present in the system. The offset of the domainID in this property is
|
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used as an index while computing numa distance information via "ibm,numa-distance-table".
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prop-encoded-array: The number N of the domainIDs encoded as with encode-int, followed by
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N domainID encoded as with encode-int
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For ex:
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"ibm,numa-lookup-index-table" = {4, 0, 8, 250, 252}. The offset of domainID 8 (2) is used when
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computing the distance of domain 8 from other domains present in the system. For the rest of
|
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this document, this offset will be referred to as domain distance offset.
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"ibm,numa-distance-table" property contains a list of one or more numbers representing the NUMA
|
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distance between resource groups/domains present in the system.
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prop-encoded-array: The number N of the distance values encoded as with encode-int, followed by
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N distance values encoded as with encode-bytes. The max distance value we could encode is 255.
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The number N must be equal to the square of m where m is the number of domainIDs in the
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numa-lookup-index-table.
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For ex:
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ibm,numa-lookup-index-table = <3 0 8 40>;
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ibm,numa-distace-table = <9>, /bits/ 8 < 10 20 80 20 10 160 80 160 10>;
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::
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| 0 8 40
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--|------------
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|
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0 | 10 20 80
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|
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8 | 20 10 160
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|
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40| 80 160 10
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|
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A possible "ibm,associativity" property for resources in node 0, 8 and 40
|
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|
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{ 3, 6, 7, 0 }
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{ 3, 6, 9, 8 }
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{ 3, 6, 7, 40}
|
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|
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With "ibm,associativity-reference-points" { 0x3 }
|
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|
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"ibm,lookup-index-table" helps in having a compact representation of distance matrix.
|
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Since domainID can be sparse, the matrix of distances can also be effectively sparse.
|
||||
With "ibm,lookup-index-table" we can achieve a compact representation of
|
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distance information.
|
||||
|
|
@ -7,6 +7,7 @@ powerpc
|
|||
.. toctree::
|
||||
:maxdepth: 1
|
||||
|
||||
associativity
|
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booting
|
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bootwrapper
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cpu_families
|
||||
|
|
|
|||
|
|
@ -6853,7 +6853,6 @@ F: Documentation/admin-guide/media/em28xx*
|
|||
F: drivers/media/usb/em28xx/
|
||||
|
||||
EMBEDDED LINUX
|
||||
M: Paul Gortmaker <paul.gortmaker@windriver.com>
|
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M: Matt Mackall <mpm@selenic.com>
|
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M: David Woodhouse <dwmw2@infradead.org>
|
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L: linux-embedded@vger.kernel.org
|
||||
|
|
|
|||
|
|
@ -123,6 +123,7 @@ config PPC
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select ARCH_HAS_COPY_MC if PPC64
|
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select ARCH_HAS_DEBUG_VIRTUAL
|
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select ARCH_HAS_DEBUG_VM_PGTABLE
|
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select ARCH_HAS_DEBUG_WX if STRICT_KERNEL_RWX
|
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select ARCH_HAS_DEVMEM_IS_ALLOWED
|
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select ARCH_HAS_DMA_MAP_DIRECT if PPC_PSERIES
|
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select ARCH_HAS_ELF_RANDOMIZE
|
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|
|
@ -182,6 +183,7 @@ config PPC
|
|||
select GENERIC_IRQ_SHOW
|
||||
select GENERIC_IRQ_SHOW_LEVEL
|
||||
select GENERIC_PCI_IOMAP if PCI
|
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select GENERIC_PTDUMP
|
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select GENERIC_SMP_IDLE_THREAD
|
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select GENERIC_TIME_VSYSCALL
|
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select GENERIC_VDSO_TIME_NS
|
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|
|
|
|||
|
|
@ -365,36 +365,6 @@ config FAIL_IOMMU
|
|||
|
||||
If you are unsure, say N.
|
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|
||||
config PPC_PTDUMP
|
||||
bool "Export kernel pagetable layout to userspace via debugfs"
|
||||
depends on DEBUG_KERNEL && DEBUG_FS
|
||||
help
|
||||
This option exports the state of the kernel pagetables to a
|
||||
debugfs file. This is only useful for kernel developers who are
|
||||
working in architecture specific areas of the kernel - probably
|
||||
not a good idea to enable this feature in a production kernel.
|
||||
|
||||
If you are unsure, say N.
|
||||
|
||||
config PPC_DEBUG_WX
|
||||
bool "Warn on W+X mappings at boot"
|
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depends on PPC_PTDUMP && STRICT_KERNEL_RWX
|
||||
help
|
||||
Generate a warning if any W+X mappings are found at boot.
|
||||
|
||||
This is useful for discovering cases where the kernel is leaving
|
||||
W+X mappings after applying NX, as such mappings are a security risk.
|
||||
|
||||
Note that even if the check fails, your kernel is possibly
|
||||
still fine, as W+X mappings are not a security hole in
|
||||
themselves, what they do is that they make the exploitation
|
||||
of other unfixed kernel bugs easier.
|
||||
|
||||
There is no runtime or memory usage effect of this option
|
||||
once the kernel has booted up - it's a one time check.
|
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|
||||
If in doubt, say "Y".
|
||||
|
||||
config PPC_FAST_ENDIAN_SWITCH
|
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bool "Deprecated fast endian-switch syscall"
|
||||
depends on DEBUG_KERNEL && PPC_BOOK3S_64
|
||||
|
|
|
|||
|
|
@ -122,6 +122,7 @@ endif
|
|||
|
||||
LDFLAGS_vmlinux-y := -Bstatic
|
||||
LDFLAGS_vmlinux-$(CONFIG_RELOCATABLE) := -pie
|
||||
LDFLAGS_vmlinux-$(CONFIG_RELOCATABLE) += -z notext
|
||||
LDFLAGS_vmlinux := $(LDFLAGS_vmlinux-y)
|
||||
|
||||
ifdef CONFIG_PPC64
|
||||
|
|
@ -407,7 +408,8 @@ endef
|
|||
|
||||
PHONY += install
|
||||
install:
|
||||
$(Q)$(MAKE) $(build)=$(boot) install
|
||||
sh -x $(srctree)/$(boot)/install.sh "$(KERNELRELEASE)" vmlinux \
|
||||
System.map "$(INSTALL_PATH)"
|
||||
|
||||
archclean:
|
||||
$(Q)$(MAKE) $(clean)=$(boot)
|
||||
|
|
|
|||
|
|
@ -341,7 +341,6 @@ image-$(CONFIG_TQM8541) += cuImage.tqm8541
|
|||
image-$(CONFIG_TQM8548) += cuImage.tqm8548
|
||||
image-$(CONFIG_TQM8555) += cuImage.tqm8555
|
||||
image-$(CONFIG_TQM8560) += cuImage.tqm8560
|
||||
image-$(CONFIG_SBC8548) += cuImage.sbc8548
|
||||
image-$(CONFIG_KSI8560) += cuImage.ksi8560
|
||||
|
||||
# Board ports in arch/powerpc/platform/86xx/Kconfig
|
||||
|
|
@ -444,16 +443,6 @@ $(obj)/zImage: $(addprefix $(obj)/, $(image-y))
|
|||
$(obj)/zImage.initrd: $(addprefix $(obj)/, $(initrd-y))
|
||||
$(Q)rm -f $@; ln $< $@
|
||||
|
||||
# Only install the vmlinux
|
||||
install: $(CONFIGURE) $(addprefix $(obj)/, $(image-y))
|
||||
sh -x $(srctree)/$(src)/install.sh "$(KERNELRELEASE)" vmlinux System.map "$(INSTALL_PATH)"
|
||||
|
||||
# Install the vmlinux and other built boot targets.
|
||||
zInstall: $(CONFIGURE) $(addprefix $(obj)/, $(image-y))
|
||||
sh -x $(srctree)/$(src)/install.sh "$(KERNELRELEASE)" vmlinux System.map "$(INSTALL_PATH)" $^
|
||||
|
||||
PHONY += install zInstall
|
||||
|
||||
# anything not in $(targets)
|
||||
clean-files += $(image-) $(initrd-) cuImage.* dtbImage.* treeImage.* \
|
||||
zImage zImage.initrd zImage.chrp zImage.coff zImage.holly \
|
||||
|
|
|
|||
|
|
@ -1,176 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* SBC8641D Device Tree Source
|
||||
*
|
||||
* Copyright 2008 Wind River Systems Inc.
|
||||
*
|
||||
* Paul Gortmaker (see MAINTAINERS for contact information)
|
||||
*
|
||||
* Based largely on the mpc8641_hpcn.dts by Freescale Semiconductor Inc.
|
||||
*/
|
||||
|
||||
/include/ "mpc8641si-pre.dtsi"
|
||||
|
||||
/ {
|
||||
model = "SBC8641D";
|
||||
compatible = "wind,sbc8641";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x20000000>; // 512M at 0x0
|
||||
};
|
||||
|
||||
lbc: localbus@f8005000 {
|
||||
reg = <0xf8005000 0x1000>;
|
||||
|
||||
ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash
|
||||
1 0 0xf0000000 0x00010000 // 64KB EEPROM
|
||||
2 0 0xf1000000 0x00100000 // EPLD (1MB)
|
||||
3 0 0xe0000000 0x04000000 // 64MB LB SDRAM (CS3)
|
||||
4 0 0xe4000000 0x04000000 // 64MB LB SDRAM (CS4)
|
||||
6 0 0xf4000000 0x00100000 // LCD display (1MB)
|
||||
7 0 0xe8000000 0x04000000>; // 64MB OneNAND
|
||||
|
||||
flash@0,0 {
|
||||
compatible = "cfi-flash";
|
||||
reg = <0 0 0x01000000>;
|
||||
bank-width = <2>;
|
||||
device-width = <2>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
partition@0 {
|
||||
label = "dtb";
|
||||
reg = <0x00000000 0x00100000>;
|
||||
read-only;
|
||||
};
|
||||
partition@300000 {
|
||||
label = "kernel";
|
||||
reg = <0x00100000 0x00400000>;
|
||||
read-only;
|
||||
};
|
||||
partition@400000 {
|
||||
label = "fs";
|
||||
reg = <0x00500000 0x00a00000>;
|
||||
};
|
||||
partition@700000 {
|
||||
label = "firmware";
|
||||
reg = <0x00f00000 0x00100000>;
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
|
||||
epld@2,0 {
|
||||
compatible = "wrs,epld-localbus";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
reg = <2 0 0x100000>;
|
||||
ranges = <0 0 5 0 1 // User switches
|
||||
1 0 5 1 1 // Board ID/Rev
|
||||
3 0 5 3 1>; // LEDs
|
||||
};
|
||||
};
|
||||
|
||||
soc: soc@f8000000 {
|
||||
ranges = <0x00000000 0xf8000000 0x00100000>;
|
||||
|
||||
enet0: ethernet@24000 {
|
||||
tbi-handle = <&tbi0>;
|
||||
phy-handle = <&phy0>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
|
||||
mdio@24520 {
|
||||
phy0: ethernet-phy@1f {
|
||||
reg = <0x1f>;
|
||||
};
|
||||
phy1: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
phy2: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
phy3: ethernet-phy@2 {
|
||||
reg = <2>;
|
||||
};
|
||||
tbi0: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
|
||||
enet1: ethernet@25000 {
|
||||
tbi-handle = <&tbi1>;
|
||||
phy-handle = <&phy1>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
|
||||
mdio@25520 {
|
||||
tbi1: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
|
||||
enet2: ethernet@26000 {
|
||||
tbi-handle = <&tbi2>;
|
||||
phy-handle = <&phy2>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
|
||||
mdio@26520 {
|
||||
tbi2: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
|
||||
enet3: ethernet@27000 {
|
||||
tbi-handle = <&tbi3>;
|
||||
phy-handle = <&phy3>;
|
||||
phy-connection-type = "rgmii-id";
|
||||
};
|
||||
|
||||
mdio@27520 {
|
||||
tbi3: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pci0: pcie@f8008000 {
|
||||
reg = <0xf8008000 0x1000>;
|
||||
ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
|
||||
0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
|
||||
interrupt-map-mask = <0xff00 0 0 7>;
|
||||
|
||||
pcie@0 {
|
||||
ranges = <0x02000000 0x0 0x80000000
|
||||
0x02000000 0x0 0x80000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x01000000 0x0 0x00000000
|
||||
0x01000000 0x0 0x00000000
|
||||
0x0 0x00100000>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
pci1: pcie@f8009000 {
|
||||
reg = <0xf8009000 0x1000>;
|
||||
ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
|
||||
0x01000000 0x0 0x00000000 0xe3000000 0x0 0x00100000>;
|
||||
|
||||
pcie@0 {
|
||||
ranges = <0x02000000 0x0 0xa0000000
|
||||
0x02000000 0x0 0xa0000000
|
||||
0x0 0x20000000
|
||||
|
||||
0x01000000 0x0 0x00000000
|
||||
0x01000000 0x0 0x00000000
|
||||
0x0 0x00100000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "mpc8641si-post.dtsi"
|
||||
|
|
@ -127,6 +127,18 @@
|
|||
fifo-size = <16>;
|
||||
interrupts = <0x10 0x1>;
|
||||
};
|
||||
|
||||
ethernet@8020000 {
|
||||
compatible = "litex,liteeth";
|
||||
reg = <0x8021000 0x100
|
||||
0x8020800 0x100
|
||||
0x8030000 0x2000>;
|
||||
reg-names = "mac", "mido", "buffer";
|
||||
litex,rx-slots = <2>;
|
||||
litex,tx-slots = <2>;
|
||||
litex,slot-size = <0x800>;
|
||||
interrupts = <0x11 0x1>;
|
||||
};
|
||||
};
|
||||
|
||||
chosen {
|
||||
|
|
|
|||
|
|
@ -1,111 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* SBC8548 Device Tree Source
|
||||
*
|
||||
* Configured for booting off the alternate (64MB SODIMM) flash.
|
||||
* Requires switching JP12 jumpers and changing SW2.8 setting.
|
||||
*
|
||||
* Copyright 2013 Wind River Systems Inc.
|
||||
*
|
||||
* Paul Gortmaker (see MAINTAINERS for contact information)
|
||||
*/
|
||||
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/include/ "sbc8548-pre.dtsi"
|
||||
|
||||
/{
|
||||
localbus@e0000000 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
reg = <0xe0000000 0x5000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
ranges = <0x0 0x0 0xfc000000 0x04000000 /*64MB Flash*/
|
||||
0x3 0x0 0xf0000000 0x04000000 /*64MB SDRAM*/
|
||||
0x4 0x0 0xf4000000 0x04000000 /*64MB SDRAM*/
|
||||
0x5 0x0 0xf8000000 0x00b10000 /* EPLD */
|
||||
0x6 0x0 0xef800000 0x00800000>; /*8MB Flash*/
|
||||
|
||||
flash@0,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x0 0x0 0x04000000>;
|
||||
compatible = "intel,JS28F128", "cfi-flash";
|
||||
bank-width = <4>;
|
||||
device-width = <1>;
|
||||
partition@0 {
|
||||
label = "space";
|
||||
/* FC000000 -> FFEFFFFF */
|
||||
reg = <0x00000000 0x03f00000>;
|
||||
};
|
||||
partition@3f00000 {
|
||||
label = "bootloader";
|
||||
/* FFF00000 -> FFFFFFFF */
|
||||
reg = <0x03f00000 0x00100000>;
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
epld@5,0 {
|
||||
compatible = "wrs,epld-localbus";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x5 0x0 0x00b10000>;
|
||||
ranges = <
|
||||
0x0 0x0 0x5 0x000000 0x1fff /* LED */
|
||||
0x1 0x0 0x5 0x100000 0x1fff /* Switches */
|
||||
0x3 0x0 0x5 0x300000 0x1fff /* HW Rev. */
|
||||
0xb 0x0 0x5 0xb00000 0x1fff /* EEPROM */
|
||||
>;
|
||||
|
||||
led@0,0 {
|
||||
compatible = "led";
|
||||
reg = <0x0 0x0 0x1fff>;
|
||||
};
|
||||
|
||||
switches@1,0 {
|
||||
compatible = "switches";
|
||||
reg = <0x1 0x0 0x1fff>;
|
||||
};
|
||||
|
||||
hw-rev@3,0 {
|
||||
compatible = "hw-rev";
|
||||
reg = <0x3 0x0 0x1fff>;
|
||||
};
|
||||
|
||||
eeprom@b,0 {
|
||||
compatible = "eeprom";
|
||||
reg = <0xb 0 0x1fff>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
alt-flash@6,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "intel,JS28F640", "cfi-flash";
|
||||
reg = <0x6 0x0 0x800000>;
|
||||
bank-width = <1>;
|
||||
device-width = <1>;
|
||||
partition@0 {
|
||||
label = "space";
|
||||
/* EF800000 -> EFF9FFFF */
|
||||
reg = <0x00000000 0x007a0000>;
|
||||
};
|
||||
partition@7a0000 {
|
||||
label = "bootloader";
|
||||
/* EFFA0000 -> EFFFFFFF */
|
||||
reg = <0x007a0000 0x00060000>;
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "sbc8548-post.dtsi"
|
||||
|
|
@ -1,289 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* SBC8548 Device Tree Source
|
||||
*
|
||||
* Copyright 2007 Wind River Systems Inc.
|
||||
*
|
||||
* Paul Gortmaker (see MAINTAINERS for contact information)
|
||||
*/
|
||||
|
||||
/{
|
||||
soc8548@e0000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
ranges = <0x00000000 0xe0000000 0x00100000>;
|
||||
bus-frequency = <0>;
|
||||
compatible = "simple-bus";
|
||||
|
||||
ecm-law@0 {
|
||||
compatible = "fsl,ecm-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <10>;
|
||||
};
|
||||
|
||||
ecm@1000 {
|
||||
compatible = "fsl,mpc8548-ecm", "fsl,ecm";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <17 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
memory-controller@2000 {
|
||||
compatible = "fsl,mpc8548-memory-controller";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <0x12 0x2>;
|
||||
};
|
||||
|
||||
L2: l2-cache-controller@20000 {
|
||||
compatible = "fsl,mpc8548-l2-cache-controller";
|
||||
reg = <0x20000 0x1000>;
|
||||
cache-line-size = <0x20>; // 32 bytes
|
||||
cache-size = <0x80000>; // L2, 512K
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <0x10 0x2>;
|
||||
};
|
||||
|
||||
i2c@3000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <0>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3000 0x100>;
|
||||
interrupts = <0x2b 0x2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
dfsrr;
|
||||
};
|
||||
|
||||
i2c@3100 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <1>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x3100 0x100>;
|
||||
interrupts = <0x2b 0x2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
dfsrr;
|
||||
};
|
||||
|
||||
dma@21300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma";
|
||||
reg = <0x21300 0x4>;
|
||||
ranges = <0x0 0x21100 0x200>;
|
||||
cell-index = <0>;
|
||||
dma-channel@0 {
|
||||
compatible = "fsl,mpc8548-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x0 0x80>;
|
||||
cell-index = <0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <20 2>;
|
||||
};
|
||||
dma-channel@80 {
|
||||
compatible = "fsl,mpc8548-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x80 0x80>;
|
||||
cell-index = <1>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <21 2>;
|
||||
};
|
||||
dma-channel@100 {
|
||||
compatible = "fsl,mpc8548-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x100 0x80>;
|
||||
cell-index = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <22 2>;
|
||||
};
|
||||
dma-channel@180 {
|
||||
compatible = "fsl,mpc8548-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x180 0x80>;
|
||||
cell-index = <3>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <23 2>;
|
||||
};
|
||||
};
|
||||
|
||||
enet0: ethernet@24000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <0>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x24000 0x1000>;
|
||||
ranges = <0x0 0x24000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
tbi-handle = <&tbi0>;
|
||||
phy-handle = <&phy0>;
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-mdio";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
phy0: ethernet-phy@19 {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <0x6 0x1>;
|
||||
reg = <0x19>;
|
||||
};
|
||||
phy1: ethernet-phy@1a {
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <0x7 0x1>;
|
||||
reg = <0x1a>;
|
||||
};
|
||||
tbi0: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
enet1: ethernet@25000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <1>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x25000 0x1000>;
|
||||
ranges = <0x0 0x25000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
tbi-handle = <&tbi1>;
|
||||
phy-handle = <&phy1>;
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-tbi";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
tbi1: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
serial0: serial@4500 {
|
||||
cell-index = <0>;
|
||||
device_type = "serial";
|
||||
compatible = "fsl,ns16550", "ns16550";
|
||||
reg = <0x4500 0x100>; // reg base, size
|
||||
clock-frequency = <0>; // should we fill in in uboot?
|
||||
interrupts = <0x2a 0x2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
serial1: serial@4600 {
|
||||
cell-index = <1>;
|
||||
device_type = "serial";
|
||||
compatible = "fsl,ns16550", "ns16550";
|
||||
reg = <0x4600 0x100>; // reg base, size
|
||||
clock-frequency = <0>; // should we fill in in uboot?
|
||||
interrupts = <0x2a 0x2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
};
|
||||
|
||||
global-utilities@e0000 { //global utilities reg
|
||||
compatible = "fsl,mpc8548-guts";
|
||||
reg = <0xe0000 0x1000>;
|
||||
fsl,has-rstcr;
|
||||
};
|
||||
|
||||
crypto@30000 {
|
||||
compatible = "fsl,sec2.1", "fsl,sec2.0";
|
||||
reg = <0x30000 0x10000>;
|
||||
interrupts = <45 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
fsl,num-channels = <4>;
|
||||
fsl,channel-fifo-len = <24>;
|
||||
fsl,exec-units-mask = <0xfe>;
|
||||
fsl,descriptor-types-mask = <0x12b0ebf>;
|
||||
};
|
||||
|
||||
mpic: pic@40000 {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x40000 0x40000>;
|
||||
compatible = "chrp,open-pic";
|
||||
device_type = "open-pic";
|
||||
};
|
||||
};
|
||||
|
||||
pci0: pci@e0008000 {
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x01 (PCI-X slot) @66MHz */
|
||||
0x0800 0x0 0x0 0x1 &mpic 0x2 0x1
|
||||
0x0800 0x0 0x0 0x2 &mpic 0x3 0x1
|
||||
0x0800 0x0 0x0 0x3 &mpic 0x4 0x1
|
||||
0x0800 0x0 0x0 0x4 &mpic 0x1 0x1
|
||||
|
||||
/* IDSEL 0x11 (PCI, 3.3V 32bit) @33MHz */
|
||||
0x8800 0x0 0x0 0x1 &mpic 0x2 0x1
|
||||
0x8800 0x0 0x0 0x2 &mpic 0x3 0x1
|
||||
0x8800 0x0 0x0 0x3 &mpic 0x4 0x1
|
||||
0x8800 0x0 0x0 0x4 &mpic 0x1 0x1>;
|
||||
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <0x18 0x2>;
|
||||
bus-range = <0 0>;
|
||||
ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x10000000
|
||||
0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00800000>;
|
||||
clock-frequency = <66000000>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xe0008000 0x1000>;
|
||||
compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
|
||||
device_type = "pci";
|
||||
};
|
||||
|
||||
pci1: pcie@e000a000 {
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
|
||||
/* IDSEL 0x0 (PEX) */
|
||||
0x0000 0x0 0x0 0x1 &mpic 0x0 0x1
|
||||
0x0000 0x0 0x0 0x2 &mpic 0x1 0x1
|
||||
0x0000 0x0 0x0 0x3 &mpic 0x2 0x1
|
||||
0x0000 0x0 0x0 0x4 &mpic 0x3 0x1>;
|
||||
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <0x1a 0x2>;
|
||||
bus-range = <0x0 0xff>;
|
||||
ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
|
||||
0x01000000 0x0 0x00000000 0xe2800000 0x0 0x08000000>;
|
||||
clock-frequency = <33000000>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xe000a000 0x1000>;
|
||||
compatible = "fsl,mpc8548-pcie";
|
||||
device_type = "pci";
|
||||
pcie@0 {
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
ranges = <0x02000000 0x0 0xa0000000
|
||||
0x02000000 0x0 0xa0000000
|
||||
0x0 0x10000000
|
||||
|
||||
0x01000000 0x0 0x00000000
|
||||
0x01000000 0x0 0x00000000
|
||||
0x0 0x00800000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,48 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* SBC8548 Device Tree Source
|
||||
*
|
||||
* Copyright 2007 Wind River Systems Inc.
|
||||
*
|
||||
* Paul Gortmaker (see MAINTAINERS for contact information)
|
||||
*/
|
||||
|
||||
/{
|
||||
model = "SBC8548";
|
||||
compatible = "SBC8548";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
aliases {
|
||||
ethernet0 = &enet0;
|
||||
ethernet1 = &enet1;
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,8548@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0>;
|
||||
d-cache-line-size = <0x20>; // 32 bytes
|
||||
i-cache-line-size = <0x20>; // 32 bytes
|
||||
d-cache-size = <0x8000>; // L1, 32K
|
||||
i-cache-size = <0x8000>; // L1, 32K
|
||||
timebase-frequency = <0>; // From uboot
|
||||
bus-frequency = <0>;
|
||||
clock-frequency = <0>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x10000000>;
|
||||
};
|
||||
|
||||
};
|
||||
|
|
@ -1,106 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* SBC8548 Device Tree Source
|
||||
*
|
||||
* Copyright 2007 Wind River Systems Inc.
|
||||
*
|
||||
* Paul Gortmaker (see MAINTAINERS for contact information)
|
||||
*/
|
||||
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/include/ "sbc8548-pre.dtsi"
|
||||
|
||||
/{
|
||||
localbus@e0000000 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
reg = <0xe0000000 0x5000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
ranges = <0x0 0x0 0xff800000 0x00800000 /*8MB Flash*/
|
||||
0x3 0x0 0xf0000000 0x04000000 /*64MB SDRAM*/
|
||||
0x4 0x0 0xf4000000 0x04000000 /*64MB SDRAM*/
|
||||
0x5 0x0 0xf8000000 0x00b10000 /* EPLD */
|
||||
0x6 0x0 0xec000000 0x04000000>; /*64MB Flash*/
|
||||
|
||||
|
||||
flash@0,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "intel,JS28F640", "cfi-flash";
|
||||
reg = <0x0 0x0 0x800000>;
|
||||
bank-width = <1>;
|
||||
device-width = <1>;
|
||||
partition@0 {
|
||||
label = "space";
|
||||
/* FF800000 -> FFF9FFFF */
|
||||
reg = <0x00000000 0x007a0000>;
|
||||
};
|
||||
partition@7a0000 {
|
||||
label = "bootloader";
|
||||
/* FFFA0000 -> FFFFFFFF */
|
||||
reg = <0x007a0000 0x00060000>;
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
|
||||
epld@5,0 {
|
||||
compatible = "wrs,epld-localbus";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x5 0x0 0x00b10000>;
|
||||
ranges = <
|
||||
0x0 0x0 0x5 0x000000 0x1fff /* LED */
|
||||
0x1 0x0 0x5 0x100000 0x1fff /* Switches */
|
||||
0x3 0x0 0x5 0x300000 0x1fff /* HW Rev. */
|
||||
0xb 0x0 0x5 0xb00000 0x1fff /* EEPROM */
|
||||
>;
|
||||
|
||||
led@0,0 {
|
||||
compatible = "led";
|
||||
reg = <0x0 0x0 0x1fff>;
|
||||
};
|
||||
|
||||
switches@1,0 {
|
||||
compatible = "switches";
|
||||
reg = <0x1 0x0 0x1fff>;
|
||||
};
|
||||
|
||||
hw-rev@3,0 {
|
||||
compatible = "hw-rev";
|
||||
reg = <0x3 0x0 0x1fff>;
|
||||
};
|
||||
|
||||
eeprom@b,0 {
|
||||
compatible = "eeprom";
|
||||
reg = <0xb 0 0x1fff>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
alt-flash@6,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x6 0x0 0x04000000>;
|
||||
compatible = "intel,JS28F128", "cfi-flash";
|
||||
bank-width = <4>;
|
||||
device-width = <1>;
|
||||
partition@0 {
|
||||
label = "space";
|
||||
/* EC000000 -> EFEFFFFF */
|
||||
reg = <0x00000000 0x03f00000>;
|
||||
};
|
||||
partition@3f00000 {
|
||||
label = "bootloader";
|
||||
/* EFF00000 -> EFFFFFFF */
|
||||
reg = <0x03f00000 0x00100000>;
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "sbc8548-post.dtsi"
|
||||
|
|
@ -216,7 +216,18 @@
|
|||
|
||||
control@d800100 {
|
||||
compatible = "nintendo,hollywood-control";
|
||||
reg = <0x0d800100 0x300>;
|
||||
/*
|
||||
* Both the address and length are wrong, according to
|
||||
* Wiibrew this should be <0x0d800000 0x400>, but it
|
||||
* requires refactoring the PIC1, GPIO and OTP nodes
|
||||
* before changing that.
|
||||
*/
|
||||
reg = <0x0d800100 0xa0>;
|
||||
};
|
||||
|
||||
otp@d8001ec {
|
||||
compatible = "nintendo,hollywood-otp";
|
||||
reg = <0x0d8001ec 0x8>;
|
||||
};
|
||||
|
||||
disk@d806000 {
|
||||
|
|
|
|||
|
|
@ -15,12 +15,25 @@
|
|||
# $2 - kernel image file
|
||||
# $3 - kernel map file
|
||||
# $4 - default install path (blank if root directory)
|
||||
# $5 and more - kernel boot files; zImage*, uImage, cuImage.*, etc.
|
||||
#
|
||||
|
||||
# Bail with error code if anything goes wrong
|
||||
set -e
|
||||
|
||||
verify () {
|
||||
if [ ! -f "$1" ]; then
|
||||
echo "" 1>&2
|
||||
echo " *** Missing file: $1" 1>&2
|
||||
echo ' *** You need to run "make" before "make install".' 1>&2
|
||||
echo "" 1>&2
|
||||
exit 1
|
||||
fi
|
||||
}
|
||||
|
||||
# Make sure the files actually exist
|
||||
verify "$2"
|
||||
verify "$3"
|
||||
|
||||
# User may have a custom install script
|
||||
|
||||
if [ -x ~/bin/${INSTALLKERNEL} ]; then exec ~/bin/${INSTALLKERNEL} "$@"; fi
|
||||
|
|
@ -41,15 +54,3 @@ fi
|
|||
|
||||
cat $2 > $4/$image_name
|
||||
cp $3 $4/System.map
|
||||
|
||||
# Copy all the bootable image files
|
||||
path=$4
|
||||
shift 4
|
||||
while [ $# -ne 0 ]; do
|
||||
image_name=`basename $1`
|
||||
if [ -f $path/$image_name ]; then
|
||||
mv $path/$image_name $path/$image_name.old
|
||||
fi
|
||||
cat $1 > $path/$image_name
|
||||
shift
|
||||
done;
|
||||
|
|
|
|||
|
|
@ -298,7 +298,7 @@ cuboot*)
|
|||
*-tqm8541|*-mpc8560*|*-tqm8560|*-tqm8555|*-ksi8560*)
|
||||
platformo=$object/cuboot-85xx-cpm2.o
|
||||
;;
|
||||
*-mpc85*|*-tqm85*|*-sbc85*)
|
||||
*-mpc85*|*-tqm85*)
|
||||
platformo=$object/cuboot-85xx.o
|
||||
;;
|
||||
*-amigaone)
|
||||
|
|
|
|||
|
|
@ -1,50 +0,0 @@
|
|||
CONFIG_PPC_85xx=y
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_EXPERT=y
|
||||
CONFIG_SLAB=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
CONFIG_SBC8548=y
|
||||
CONFIG_GEN_RTC=y
|
||||
CONFIG_BINFMT_MISC=y
|
||||
CONFIG_MATH_EMULATION=y
|
||||
# CONFIG_SECCOMP is not set
|
||||
CONFIG_PCI=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_XFRM_USER=y
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_MULTICAST=y
|
||||
CONFIG_IP_PNP=y
|
||||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_IP_PNP_BOOTP=y
|
||||
CONFIG_SYN_COOKIES=y
|
||||
# CONFIG_IPV6 is not set
|
||||
# CONFIG_FW_LOADER is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_CFI=y
|
||||
CONFIG_MTD_CFI_ADV_OPTIONS=y
|
||||
CONFIG_MTD_CFI_GEOMETRY=y
|
||||
CONFIG_MTD_CFI_I4=y
|
||||
CONFIG_MTD_CFI_INTELEXT=y
|
||||
CONFIG_MTD_PHYSMAP_OF=y
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_GIANFAR=y
|
||||
CONFIG_BROADCOM_PHY=y
|
||||
# CONFIG_INPUT_KEYBOARD is not set
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_VT is not set
|
||||
CONFIG_SERIAL_8250=y
|
||||
CONFIG_SERIAL_8250_CONSOLE=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
# CONFIG_USB_SUPPORT is not set
|
||||
CONFIG_PROC_KCORE=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
|
|
@ -5,6 +5,7 @@ CONFIG_PREEMPT_VOLUNTARY=y
|
|||
CONFIG_TICK_CPU_ACCOUNTING=y
|
||||
CONFIG_LOG_BUF_SHIFT=16
|
||||
CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=12
|
||||
CONFIG_CGROUPS=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
CONFIG_KALLSYMS_ALL=y
|
||||
|
|
@ -53,10 +54,12 @@ CONFIG_MTD_SPI_NOR=y
|
|||
CONFIG_BLK_DEV_LOOP=y
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_LITEX_LITEETH=y
|
||||
# CONFIG_WLAN is not set
|
||||
# CONFIG_INPUT is not set
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_VT is not set
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
CONFIG_SERIAL_8250=y
|
||||
# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
|
||||
CONFIG_SERIAL_8250_CONSOLE=y
|
||||
|
|
@ -76,8 +79,10 @@ CONFIG_SPI_SPIDEV=y
|
|||
CONFIG_EXT4_FS=y
|
||||
# CONFIG_FILE_LOCKING is not set
|
||||
# CONFIG_DNOTIFY is not set
|
||||
# CONFIG_INOTIFY_USER is not set
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
# CONFIG_MISC_FILESYSTEMS is not set
|
||||
CONFIG_CRYPTO_SHA256=y
|
||||
# CONFIG_CRYPTO_HW is not set
|
||||
# CONFIG_XZ_DEC_X86 is not set
|
||||
# CONFIG_XZ_DEC_IA64 is not set
|
||||
|
|
|
|||
|
|
@ -13,7 +13,6 @@ CONFIG_P1022_DS=y
|
|||
CONFIG_P1022_RDK=y
|
||||
CONFIG_P1023_RDB=y
|
||||
CONFIG_TWR_P102x=y
|
||||
CONFIG_SBC8548=y
|
||||
CONFIG_SOCRATES=y
|
||||
CONFIG_STX_GP3=y
|
||||
CONFIG_TQM8540=y
|
||||
|
|
|
|||
|
|
@ -1,6 +1,5 @@
|
|||
CONFIG_PPC_86xx=y
|
||||
CONFIG_MPC8641_HPCN=y
|
||||
CONFIG_SBC8641D=y
|
||||
CONFIG_MPC8610_HPCD=y
|
||||
CONFIG_GEF_PPC9A=y
|
||||
CONFIG_GEF_SBC310=y
|
||||
|
|
|
|||
|
|
@ -1,19 +1,30 @@
|
|||
CONFIG_PPC_8xx=y
|
||||
# CONFIG_SWAP is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_BPF_JIT=y
|
||||
CONFIG_VIRT_CPU_ACCOUNTING_NATIVE=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_EXPERT=y
|
||||
# CONFIG_ELF_CORE is not set
|
||||
# CONFIG_BASE_FULL is not set
|
||||
# CONFIG_FUTEX is not set
|
||||
CONFIG_PERF_EVENTS=y
|
||||
# CONFIG_VM_EVENT_COUNTERS is not set
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
CONFIG_PARTITION_ADVANCED=y
|
||||
CONFIG_PPC_8xx=y
|
||||
CONFIG_8xx_GPIO=y
|
||||
CONFIG_SMC_UCODE_PATCH=y
|
||||
CONFIG_PIN_TLB=y
|
||||
CONFIG_GEN_RTC=y
|
||||
CONFIG_HZ_100=y
|
||||
CONFIG_MATH_EMULATION=y
|
||||
CONFIG_PPC_16K_PAGES=y
|
||||
CONFIG_ADVANCED_OPTIONS=y
|
||||
# CONFIG_SECCOMP is not set
|
||||
CONFIG_STRICT_KERNEL_RWX=y
|
||||
CONFIG_MODULES=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
CONFIG_PARTITION_ADVANCED=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
|
|
@ -21,7 +32,6 @@ CONFIG_INET=y
|
|||
CONFIG_IP_MULTICAST=y
|
||||
CONFIG_IP_PNP=y
|
||||
CONFIG_SYN_COOKIES=y
|
||||
# CONFIG_IPV6 is not set
|
||||
# CONFIG_FW_LOADER is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
|
|
@ -34,6 +44,7 @@ CONFIG_MTD_CFI_GEOMETRY=y
|
|||
# CONFIG_MTD_CFI_I2 is not set
|
||||
CONFIG_MTD_CFI_I4=y
|
||||
CONFIG_MTD_CFI_AMDSTD=y
|
||||
CONFIG_MTD_PHYSMAP=y
|
||||
CONFIG_MTD_PHYSMAP_OF=y
|
||||
# CONFIG_BLK_DEV is not set
|
||||
CONFIG_NETDEVICES=y
|
||||
|
|
@ -46,39 +57,25 @@ CONFIG_DAVICOM_PHY=y
|
|||
# CONFIG_LEGACY_PTYS is not set
|
||||
CONFIG_SERIAL_CPM=y
|
||||
CONFIG_SERIAL_CPM_CONSOLE=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_FSL_SPI=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_8xxx_WDT=y
|
||||
# CONFIG_USB_SUPPORT is not set
|
||||
# CONFIG_DNOTIFY is not set
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_CRAMFS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_CRYPTO=y
|
||||
CONFIG_CRYPTO_DEV_TALITOS=y
|
||||
CONFIG_CRC32_SLICEBY4=y
|
||||
CONFIG_DEBUG_INFO=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_DETECT_HUNG_TASK=y
|
||||
CONFIG_PPC_16K_PAGES=y
|
||||
CONFIG_DEBUG_KERNEL=y
|
||||
CONFIG_DEBUG_FS=y
|
||||
CONFIG_PPC_PTDUMP=y
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_FSL_SPI=y
|
||||
CONFIG_CRYPTO=y
|
||||
CONFIG_CRYPTO_DEV_TALITOS=y
|
||||
CONFIG_8xx_GPIO=y
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_8xxx_WDT=y
|
||||
CONFIG_SMC_UCODE_PATCH=y
|
||||
CONFIG_ADVANCED_OPTIONS=y
|
||||
CONFIG_PIN_TLB=y
|
||||
CONFIG_PERF_EVENTS=y
|
||||
CONFIG_MATH_EMULATION=y
|
||||
CONFIG_VIRT_CPU_ACCOUNTING_NATIVE=y
|
||||
CONFIG_STRICT_KERNEL_RWX=y
|
||||
CONFIG_IPV6=y
|
||||
CONFIG_BPF_JIT=y
|
||||
CONFIG_DEBUG_VM_PGTABLE=y
|
||||
CONFIG_DETECT_HUNG_TASK=y
|
||||
CONFIG_BDI_SWITCH=y
|
||||
CONFIG_PPC_EARLY_DEBUG=y
|
||||
CONFIG_PPC_EARLY_DEBUG_CPM_ADDR=0xff002008
|
||||
CONFIG_PPC_PTDUMP=y
|
||||
|
|
|
|||
|
|
@ -55,7 +55,6 @@ CONFIG_MPC837x_RDB=y
|
|||
CONFIG_ASP834x=y
|
||||
CONFIG_PPC_86xx=y
|
||||
CONFIG_MPC8641_HPCN=y
|
||||
CONFIG_SBC8641D=y
|
||||
CONFIG_MPC8610_HPCD=y
|
||||
CONFIG_GEF_SBC610=y
|
||||
CONFIG_CPU_FREQ=y
|
||||
|
|
|
|||
|
|
@ -99,6 +99,7 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
|
|||
CONFIG_LEDS_TRIGGER_PANIC=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_GENERIC=y
|
||||
CONFIG_NVMEM_NINTENDO_OTP=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_FUSE_FS=m
|
||||
|
|
|
|||
|
|
@ -17,7 +17,7 @@
|
|||
#define PPC_LONG stringify_in_c(.8byte)
|
||||
#define PPC_LONG_ALIGN stringify_in_c(.balign 8)
|
||||
#define PPC_TLNEI stringify_in_c(tdnei)
|
||||
#define PPC_LLARX(t, a, b, eh) PPC_LDARX(t, a, b, eh)
|
||||
#define PPC_LLARX stringify_in_c(ldarx)
|
||||
#define PPC_STLCX stringify_in_c(stdcx.)
|
||||
#define PPC_CNTLZL stringify_in_c(cntlzd)
|
||||
#define PPC_MTOCRF(FXM, RS) MTOCRF((FXM), RS)
|
||||
|
|
@ -50,7 +50,7 @@
|
|||
#define PPC_LONG stringify_in_c(.long)
|
||||
#define PPC_LONG_ALIGN stringify_in_c(.balign 4)
|
||||
#define PPC_TLNEI stringify_in_c(twnei)
|
||||
#define PPC_LLARX(t, a, b, eh) PPC_LWARX(t, a, b, eh)
|
||||
#define PPC_LLARX stringify_in_c(lwarx)
|
||||
#define PPC_STLCX stringify_in_c(stwcx.)
|
||||
#define PPC_CNTLZL stringify_in_c(cntlzw)
|
||||
#define PPC_MTOCRF stringify_in_c(mtcrf)
|
||||
|
|
|
|||
|
|
@ -207,7 +207,7 @@ arch_atomic_try_cmpxchg_lock(atomic_t *v, int *old, int new)
|
|||
int r, o = *old;
|
||||
|
||||
__asm__ __volatile__ (
|
||||
"1:\t" PPC_LWARX(%0,0,%2,1) " # atomic_try_cmpxchg_acquire \n"
|
||||
"1: lwarx %0,0,%2,%5 # atomic_try_cmpxchg_acquire \n"
|
||||
" cmpw 0,%0,%3 \n"
|
||||
" bne- 2f \n"
|
||||
" stwcx. %4,0,%2 \n"
|
||||
|
|
@ -215,7 +215,7 @@ arch_atomic_try_cmpxchg_lock(atomic_t *v, int *old, int new)
|
|||
"\t" PPC_ACQUIRE_BARRIER " \n"
|
||||
"2: \n"
|
||||
: "=&r" (r), "+m" (v->counter)
|
||||
: "r" (&v->counter), "r" (o), "r" (new)
|
||||
: "r" (&v->counter), "r" (o), "r" (new), "i" (IS_ENABLED(CONFIG_PPC64) ? 1 : 0)
|
||||
: "cr0", "memory");
|
||||
|
||||
if (unlikely(r != o))
|
||||
|
|
|
|||
|
|
@ -70,7 +70,7 @@ static inline void fn(unsigned long mask, \
|
|||
unsigned long *p = (unsigned long *)_p; \
|
||||
__asm__ __volatile__ ( \
|
||||
prefix \
|
||||
"1:" PPC_LLARX(%0,0,%3,0) "\n" \
|
||||
"1:" PPC_LLARX "%0,0,%3,0\n" \
|
||||
stringify_in_c(op) "%0,%0,%2\n" \
|
||||
PPC_STLCX "%0,0,%3\n" \
|
||||
"bne- 1b\n" \
|
||||
|
|
@ -115,13 +115,13 @@ static inline unsigned long fn( \
|
|||
unsigned long *p = (unsigned long *)_p; \
|
||||
__asm__ __volatile__ ( \
|
||||
prefix \
|
||||
"1:" PPC_LLARX(%0,0,%3,eh) "\n" \
|
||||
"1:" PPC_LLARX "%0,0,%3,%4\n" \
|
||||
stringify_in_c(op) "%1,%0,%2\n" \
|
||||
PPC_STLCX "%1,0,%3\n" \
|
||||
"bne- 1b\n" \
|
||||
postfix \
|
||||
: "=&r" (old), "=&r" (t) \
|
||||
: "r" (mask), "r" (p) \
|
||||
: "r" (mask), "r" (p), "i" (IS_ENABLED(CONFIG_PPC64) ? eh : 0) \
|
||||
: "cc", "memory"); \
|
||||
return (old & mask); \
|
||||
}
|
||||
|
|
@ -170,7 +170,7 @@ clear_bit_unlock_return_word(int nr, volatile unsigned long *addr)
|
|||
|
||||
__asm__ __volatile__ (
|
||||
PPC_RELEASE_BARRIER
|
||||
"1:" PPC_LLARX(%0,0,%3,0) "\n"
|
||||
"1:" PPC_LLARX "%0,0,%3,0\n"
|
||||
"andc %1,%0,%2\n"
|
||||
PPC_STLCX "%1,0,%3\n"
|
||||
"bne- 1b\n"
|
||||
|
|
|
|||
|
|
@ -90,7 +90,7 @@
|
|||
/* Prevent access to userspace using any key values */
|
||||
LOAD_REG_IMMEDIATE(\gpr2, AMR_KUAP_BLOCKED)
|
||||
999: tdne \gpr1, \gpr2
|
||||
EMIT_BUG_ENTRY 999b, __FILE__, __LINE__, (BUGFLAG_WARNING | BUGFLAG_ONCE)
|
||||
EMIT_WARN_ENTRY 999b, __FILE__, __LINE__, (BUGFLAG_WARNING | BUGFLAG_ONCE)
|
||||
END_MMU_FTR_SECTION_NESTED_IFSET(MMU_FTR_BOOK3S_KUAP, 67)
|
||||
#endif
|
||||
.endm
|
||||
|
|
|
|||
|
|
@ -4,6 +4,7 @@
|
|||
#ifdef __KERNEL__
|
||||
|
||||
#include <asm/asm-compat.h>
|
||||
#include <asm/extable.h>
|
||||
|
||||
#ifdef CONFIG_BUG
|
||||
|
||||
|
|
@ -30,6 +31,11 @@
|
|||
.endm
|
||||
#endif /* verbose */
|
||||
|
||||
.macro EMIT_WARN_ENTRY addr,file,line,flags
|
||||
EX_TABLE(\addr,\addr+4)
|
||||
EMIT_BUG_ENTRY \addr,\file,\line,\flags
|
||||
.endm
|
||||
|
||||
#else /* !__ASSEMBLY__ */
|
||||
/* _EMIT_BUG_ENTRY expects args %0,%1,%2,%3 to be FILE, LINE, flags and
|
||||
sizeof(struct bug_entry), respectively */
|
||||
|
|
@ -58,6 +64,16 @@
|
|||
"i" (sizeof(struct bug_entry)), \
|
||||
##__VA_ARGS__)
|
||||
|
||||
#define WARN_ENTRY(insn, flags, label, ...) \
|
||||
asm_volatile_goto( \
|
||||
"1: " insn "\n" \
|
||||
EX_TABLE(1b, %l[label]) \
|
||||
_EMIT_BUG_ENTRY \
|
||||
: : "i" (__FILE__), "i" (__LINE__), \
|
||||
"i" (flags), \
|
||||
"i" (sizeof(struct bug_entry)), \
|
||||
##__VA_ARGS__ : : label)
|
||||
|
||||
/*
|
||||
* BUG_ON() and WARN_ON() do their best to cooperate with compile-time
|
||||
* optimisations. However depending on the complexity of the condition
|
||||
|
|
@ -68,7 +84,19 @@
|
|||
BUG_ENTRY("twi 31, 0, 0", 0); \
|
||||
unreachable(); \
|
||||
} while (0)
|
||||
#define HAVE_ARCH_BUG
|
||||
|
||||
#define __WARN_FLAGS(flags) do { \
|
||||
__label__ __label_warn_on; \
|
||||
\
|
||||
WARN_ENTRY("twi 31, 0, 0", BUGFLAG_WARNING | (flags), __label_warn_on); \
|
||||
unreachable(); \
|
||||
\
|
||||
__label_warn_on: \
|
||||
break; \
|
||||
} while (0)
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
#define BUG_ON(x) do { \
|
||||
if (__builtin_constant_p(x)) { \
|
||||
if (x) \
|
||||
|
|
@ -78,31 +106,43 @@
|
|||
} \
|
||||
} while (0)
|
||||
|
||||
#define __WARN_FLAGS(flags) BUG_ENTRY("twi 31, 0, 0", BUGFLAG_WARNING | (flags))
|
||||
|
||||
#define WARN_ON(x) ({ \
|
||||
int __ret_warn_on = !!(x); \
|
||||
if (__builtin_constant_p(__ret_warn_on)) { \
|
||||
if (__ret_warn_on) \
|
||||
bool __ret_warn_on = false; \
|
||||
do { \
|
||||
if (__builtin_constant_p((x))) { \
|
||||
if (!(x)) \
|
||||
break; \
|
||||
__WARN(); \
|
||||
} else { \
|
||||
BUG_ENTRY(PPC_TLNEI " %4, 0", \
|
||||
BUGFLAG_WARNING | BUGFLAG_TAINT(TAINT_WARN), \
|
||||
"r" (__ret_warn_on)); \
|
||||
} \
|
||||
__ret_warn_on = true; \
|
||||
} else { \
|
||||
__label__ __label_warn_on; \
|
||||
\
|
||||
WARN_ENTRY(PPC_TLNEI " %4, 0", \
|
||||
BUGFLAG_WARNING | BUGFLAG_TAINT(TAINT_WARN), \
|
||||
__label_warn_on, \
|
||||
"r" ((__force long)(x))); \
|
||||
break; \
|
||||
__label_warn_on: \
|
||||
__ret_warn_on = true; \
|
||||
} \
|
||||
} while (0); \
|
||||
unlikely(__ret_warn_on); \
|
||||
})
|
||||
|
||||
#define HAVE_ARCH_BUG
|
||||
#define HAVE_ARCH_BUG_ON
|
||||
#define HAVE_ARCH_WARN_ON
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY __ */
|
||||
#else
|
||||
#ifdef __ASSEMBLY__
|
||||
.macro EMIT_BUG_ENTRY addr,file,line,flags
|
||||
.endm
|
||||
.macro EMIT_WARN_ENTRY addr,file,line,flags
|
||||
.endm
|
||||
#else /* !__ASSEMBLY__ */
|
||||
#define _EMIT_BUG_ENTRY
|
||||
#define _EMIT_WARN_ENTRY
|
||||
#endif
|
||||
#endif /* CONFIG_BUG */
|
||||
|
||||
|
|
|
|||
|
|
@ -1,13 +0,0 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-or-later */
|
||||
#ifndef _ASM_POWERPC_DEBUGFS_H
|
||||
#define _ASM_POWERPC_DEBUGFS_H
|
||||
|
||||
/*
|
||||
* Copyright 2017, Michael Ellerman, IBM Corporation.
|
||||
*/
|
||||
|
||||
#include <linux/debugfs.h>
|
||||
|
||||
extern struct dentry *powerpc_debugfs_root;
|
||||
|
||||
#endif /* _ASM_POWERPC_DEBUGFS_H */
|
||||
|
|
@ -111,6 +111,7 @@ int drmem_update_dt(void);
|
|||
int __init
|
||||
walk_drmem_lmbs_early(unsigned long node, void *data,
|
||||
int (*func)(struct drmem_lmb *, const __be32 **, void *));
|
||||
void drmem_update_lmbs(struct property *prop);
|
||||
#endif
|
||||
|
||||
static inline void invalidate_lmb_associativity_index(struct drmem_lmb *lmb)
|
||||
|
|
|
|||
|
|
@ -17,6 +17,8 @@
|
|||
|
||||
#define ARCH_HAS_RELATIVE_EXTABLE
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
struct exception_table_entry {
|
||||
int insn;
|
||||
int fixup;
|
||||
|
|
@ -28,3 +30,15 @@ static inline unsigned long extable_fixup(const struct exception_table_entry *x)
|
|||
}
|
||||
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Helper macro for exception table entries
|
||||
*/
|
||||
#define EX_TABLE(_fault, _target) \
|
||||
stringify_in_c(.section __ex_table,"a";)\
|
||||
stringify_in_c(.balign 4;) \
|
||||
stringify_in_c(.long (_fault) - . ;) \
|
||||
stringify_in_c(.long (_target) - . ;) \
|
||||
stringify_in_c(.previous)
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -44,7 +44,7 @@
|
|||
#define FW_FEATURE_OPAL ASM_CONST(0x0000000010000000)
|
||||
#define FW_FEATURE_SET_MODE ASM_CONST(0x0000000040000000)
|
||||
#define FW_FEATURE_BEST_ENERGY ASM_CONST(0x0000000080000000)
|
||||
#define FW_FEATURE_TYPE1_AFFINITY ASM_CONST(0x0000000100000000)
|
||||
#define FW_FEATURE_FORM1_AFFINITY ASM_CONST(0x0000000100000000)
|
||||
#define FW_FEATURE_PRRN ASM_CONST(0x0000000200000000)
|
||||
#define FW_FEATURE_DRMEM_V2 ASM_CONST(0x0000000400000000)
|
||||
#define FW_FEATURE_DRC_INFO ASM_CONST(0x0000000800000000)
|
||||
|
|
@ -53,6 +53,7 @@
|
|||
#define FW_FEATURE_ULTRAVISOR ASM_CONST(0x0000004000000000)
|
||||
#define FW_FEATURE_STUFF_TCE ASM_CONST(0x0000008000000000)
|
||||
#define FW_FEATURE_RPT_INVALIDATE ASM_CONST(0x0000010000000000)
|
||||
#define FW_FEATURE_FORM2_AFFINITY ASM_CONST(0x0000020000000000)
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
|
|
@ -69,11 +70,11 @@ enum {
|
|||
FW_FEATURE_SPLPAR | FW_FEATURE_LPAR |
|
||||
FW_FEATURE_CMO | FW_FEATURE_VPHN | FW_FEATURE_XCMO |
|
||||
FW_FEATURE_SET_MODE | FW_FEATURE_BEST_ENERGY |
|
||||
FW_FEATURE_TYPE1_AFFINITY | FW_FEATURE_PRRN |
|
||||
FW_FEATURE_FORM1_AFFINITY | FW_FEATURE_PRRN |
|
||||
FW_FEATURE_HPT_RESIZE | FW_FEATURE_DRMEM_V2 |
|
||||
FW_FEATURE_DRC_INFO | FW_FEATURE_BLOCK_REMOVE |
|
||||
FW_FEATURE_PAPR_SCM | FW_FEATURE_ULTRAVISOR |
|
||||
FW_FEATURE_RPT_INVALIDATE,
|
||||
FW_FEATURE_RPT_INVALIDATE | FW_FEATURE_FORM2_AFFINITY,
|
||||
FW_FEATURE_PSERIES_ALWAYS = 0,
|
||||
FW_FEATURE_POWERNV_POSSIBLE = FW_FEATURE_OPAL | FW_FEATURE_ULTRAVISOR,
|
||||
FW_FEATURE_POWERNV_ALWAYS = 0,
|
||||
|
|
|
|||
|
|
@ -154,6 +154,7 @@ extern int iommu_tce_table_put(struct iommu_table *tbl);
|
|||
*/
|
||||
extern struct iommu_table *iommu_init_table(struct iommu_table *tbl,
|
||||
int nid, unsigned long res_start, unsigned long res_end);
|
||||
bool iommu_table_in_use(struct iommu_table *tbl);
|
||||
|
||||
#define IOMMU_TABLE_GROUP_MAX_TABLES 2
|
||||
|
||||
|
|
|
|||
|
|
@ -39,6 +39,7 @@ struct kvm_nested_guest {
|
|||
pgd_t *shadow_pgtable; /* our page table for this guest */
|
||||
u64 l1_gr_to_hr; /* L1's addr of part'n-scoped table */
|
||||
u64 process_table; /* process table entry for this guest */
|
||||
u64 hfscr; /* HFSCR that the L1 requested for this nested guest */
|
||||
long refcnt; /* number of pointers to this struct */
|
||||
struct mutex tlb_lock; /* serialize page faults and tlbies */
|
||||
struct kvm_nested_guest *next;
|
||||
|
|
|
|||
|
|
@ -811,6 +811,8 @@ struct kvm_vcpu_arch {
|
|||
|
||||
u32 online;
|
||||
|
||||
u64 hfscr_permitted; /* A mask of permitted HFSCR facilities */
|
||||
|
||||
/* For support of nested guests */
|
||||
struct kvm_nested_guest *nested;
|
||||
u32 nested_vcpu_id;
|
||||
|
|
|
|||
|
|
@ -664,9 +664,9 @@ extern int kvmppc_xive_connect_vcpu(struct kvm_device *dev,
|
|||
struct kvm_vcpu *vcpu, u32 cpu);
|
||||
extern void kvmppc_xive_cleanup_vcpu(struct kvm_vcpu *vcpu);
|
||||
extern int kvmppc_xive_set_mapped(struct kvm *kvm, unsigned long guest_irq,
|
||||
struct irq_desc *host_desc);
|
||||
unsigned long host_irq);
|
||||
extern int kvmppc_xive_clr_mapped(struct kvm *kvm, unsigned long guest_irq,
|
||||
struct irq_desc *host_desc);
|
||||
unsigned long host_irq);
|
||||
extern u64 kvmppc_xive_get_icp(struct kvm_vcpu *vcpu);
|
||||
extern int kvmppc_xive_set_icp(struct kvm_vcpu *vcpu, u64 icpval);
|
||||
|
||||
|
|
|
|||
|
|
@ -12,7 +12,8 @@ static inline void membarrier_arch_switch_mm(struct mm_struct *prev,
|
|||
* when switching from userspace to kernel is not needed after
|
||||
* store to rq->curr.
|
||||
*/
|
||||
if (likely(!(atomic_read(&next->membarrier_state) &
|
||||
if (IS_ENABLED(CONFIG_SMP) &&
|
||||
likely(!(atomic_read(&next->membarrier_state) &
|
||||
(MEMBARRIER_STATE_PRIVATE_EXPEDITED |
|
||||
MEMBARRIER_STATE_GLOBAL_EXPEDITED)) || !prev))
|
||||
return;
|
||||
|
|
|
|||
|
|
@ -324,7 +324,7 @@ static inline void assert_pte_locked(struct mm_struct *mm, unsigned long addr)
|
|||
}
|
||||
#endif /* !CONFIG_DEBUG_VM */
|
||||
|
||||
static inline bool radix_enabled(void)
|
||||
static __always_inline bool radix_enabled(void)
|
||||
{
|
||||
return mmu_has_feature(MMU_FTR_TYPE_RADIX);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -126,6 +126,11 @@ struct pci_controller {
|
|||
#endif /* CONFIG_PPC64 */
|
||||
|
||||
void *private_data;
|
||||
|
||||
/* IRQ domain hierarchy */
|
||||
struct irq_domain *dev_domain;
|
||||
struct irq_domain *msi_domain;
|
||||
struct fwnode_handle *fwnode;
|
||||
};
|
||||
|
||||
/* These are used for config access before all the PCI probing
|
||||
|
|
|
|||
|
|
@ -34,6 +34,13 @@ static inline void ppc_set_pmu_inuse(int inuse)
|
|||
#endif
|
||||
}
|
||||
|
||||
#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
|
||||
static inline int ppc_get_pmu_inuse(void)
|
||||
{
|
||||
return get_paca()->pmcregs_in_use;
|
||||
}
|
||||
#endif
|
||||
|
||||
extern void power4_enable_pmcs(void);
|
||||
|
||||
#else /* CONFIG_PPC64 */
|
||||
|
|
|
|||
|
|
@ -33,7 +33,7 @@ int pnv_cxl_alloc_hwirqs(struct pci_dev *dev, int num);
|
|||
void pnv_cxl_release_hwirqs(struct pci_dev *dev, int hwirq, int num);
|
||||
int pnv_cxl_get_irq_count(struct pci_dev *dev);
|
||||
struct device_node *pnv_pci_get_phb_node(struct pci_dev *dev);
|
||||
int64_t pnv_opal_pci_msi_eoi(struct irq_chip *chip, unsigned int hw_irq);
|
||||
int64_t pnv_opal_pci_msi_eoi(struct irq_data *d);
|
||||
bool is_pnv_opal_msi(struct irq_chip *chip);
|
||||
|
||||
#ifdef CONFIG_CXL_BASE
|
||||
|
|
|
|||
|
|
@ -576,8 +576,6 @@
|
|||
#define PPC_DIVDE(t, a, b) stringify_in_c(.long PPC_RAW_DIVDE(t, a, b))
|
||||
#define PPC_DIVDEU(t, a, b) stringify_in_c(.long PPC_RAW_DIVDEU(t, a, b))
|
||||
#define PPC_LQARX(t, a, b, eh) stringify_in_c(.long PPC_RAW_LQARX(t, a, b, eh))
|
||||
#define PPC_LDARX(t, a, b, eh) stringify_in_c(.long PPC_RAW_LDARX(t, a, b, eh))
|
||||
#define PPC_LWARX(t, a, b, eh) stringify_in_c(.long PPC_RAW_LWARX(t, a, b, eh))
|
||||
#define PPC_STQCX(t, a, b) stringify_in_c(.long PPC_RAW_STQCX(t, a, b))
|
||||
#define PPC_MADDHD(t, a, b, c) stringify_in_c(.long PPC_RAW_MADDHD(t, a, b, c))
|
||||
#define PPC_MADDHDU(t, a, b, c) stringify_in_c(.long PPC_RAW_MADDHDU(t, a, b, c))
|
||||
|
|
|
|||
|
|
@ -10,6 +10,7 @@
|
|||
#include <asm/ppc-opcode.h>
|
||||
#include <asm/firmware.h>
|
||||
#include <asm/feature-fixups.h>
|
||||
#include <asm/extable.h>
|
||||
|
||||
#ifdef __ASSEMBLY__
|
||||
|
||||
|
|
@ -259,7 +260,7 @@ n:
|
|||
|
||||
/* Be careful, this will clobber the lr register. */
|
||||
#define LOAD_REG_ADDR_PIC(reg, name) \
|
||||
bl 0f; \
|
||||
bcl 20,31,$+4; \
|
||||
0: mflr reg; \
|
||||
addis reg,reg,(name - 0b)@ha; \
|
||||
addi reg,reg,(name - 0b)@l;
|
||||
|
|
@ -752,16 +753,6 @@ END_FTR_SECTION_NESTED(CPU_FTR_CELL_TB_BUG, CPU_FTR_CELL_TB_BUG, 96)
|
|||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
/*
|
||||
* Helper macro for exception table entries
|
||||
*/
|
||||
#define EX_TABLE(_fault, _target) \
|
||||
stringify_in_c(.section __ex_table,"a";)\
|
||||
stringify_in_c(.balign 4;) \
|
||||
stringify_in_c(.long (_fault) - . ;) \
|
||||
stringify_in_c(.long (_target) - . ;) \
|
||||
stringify_in_c(.previous)
|
||||
|
||||
#define SOFT_MASK_TABLE(_start, _end) \
|
||||
stringify_in_c(.section __soft_mask_table,"a";)\
|
||||
stringify_in_c(.balign 8;) \
|
||||
|
|
|
|||
|
|
@ -147,8 +147,9 @@ extern int of_read_drc_info_cell(struct property **prop,
|
|||
#define OV5_MSI 0x0201 /* PCIe/MSI support */
|
||||
#define OV5_CMO 0x0480 /* Cooperative Memory Overcommitment */
|
||||
#define OV5_XCMO 0x0440 /* Page Coalescing */
|
||||
#define OV5_TYPE1_AFFINITY 0x0580 /* Type 1 NUMA affinity */
|
||||
#define OV5_FORM1_AFFINITY 0x0580 /* FORM1 NUMA affinity */
|
||||
#define OV5_PRRN 0x0540 /* Platform Resource Reassignment */
|
||||
#define OV5_FORM2_AFFINITY 0x0520 /* Form2 NUMA affinity */
|
||||
#define OV5_HP_EVT 0x0604 /* Hot Plug Event support */
|
||||
#define OV5_RESIZE_HPT 0x0601 /* Hash Page Table resizing */
|
||||
#define OV5_PFO_HW_RNG 0x1180 /* PFO Random Number Generator */
|
||||
|
|
|
|||
|
|
@ -22,6 +22,7 @@
|
|||
#include <linux/err.h>
|
||||
#include <uapi/asm/ptrace.h>
|
||||
#include <asm/asm-const.h>
|
||||
#include <asm/reg.h>
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
struct pt_regs
|
||||
|
|
@ -43,8 +44,14 @@ struct pt_regs
|
|||
unsigned long mq;
|
||||
#endif
|
||||
unsigned long trap;
|
||||
unsigned long dar;
|
||||
unsigned long dsisr;
|
||||
union {
|
||||
unsigned long dar;
|
||||
unsigned long dear;
|
||||
};
|
||||
union {
|
||||
unsigned long dsisr;
|
||||
unsigned long esr;
|
||||
};
|
||||
unsigned long result;
|
||||
};
|
||||
};
|
||||
|
|
@ -197,11 +204,7 @@ static inline unsigned long frame_pointer(struct pt_regs *regs)
|
|||
return 0;
|
||||
}
|
||||
|
||||
#ifdef __powerpc64__
|
||||
#define user_mode(regs) ((((regs)->msr) >> MSR_PR_LG) & 0x1)
|
||||
#else
|
||||
#define user_mode(regs) (((regs)->msr & MSR_PR) != 0)
|
||||
#endif
|
||||
|
||||
#define force_successful_syscall_return() \
|
||||
do { \
|
||||
|
|
@ -286,6 +289,28 @@ static inline void regs_set_return_value(struct pt_regs *regs, unsigned long rc)
|
|||
regs->gpr[3] = rc;
|
||||
}
|
||||
|
||||
static inline bool cpu_has_msr_ri(void)
|
||||
{
|
||||
return !IS_ENABLED(CONFIG_BOOKE) && !IS_ENABLED(CONFIG_40x);
|
||||
}
|
||||
|
||||
static inline bool regs_is_unrecoverable(struct pt_regs *regs)
|
||||
{
|
||||
return unlikely(cpu_has_msr_ri() && !(regs->msr & MSR_RI));
|
||||
}
|
||||
|
||||
static inline void regs_set_recoverable(struct pt_regs *regs)
|
||||
{
|
||||
if (cpu_has_msr_ri())
|
||||
regs_set_return_msr(regs, regs->msr | MSR_RI);
|
||||
}
|
||||
|
||||
static inline void regs_set_unrecoverable(struct pt_regs *regs)
|
||||
{
|
||||
if (cpu_has_msr_ri())
|
||||
regs_set_return_msr(regs, regs->msr & ~MSR_RI);
|
||||
}
|
||||
|
||||
#define arch_has_single_step() (1)
|
||||
#define arch_has_block_step() (true)
|
||||
#define ARCH_HAS_USER_SINGLE_STEP_REPORT
|
||||
|
|
|
|||
|
|
@ -415,6 +415,7 @@
|
|||
#define FSCR_TAR __MASK(FSCR_TAR_LG)
|
||||
#define FSCR_EBB __MASK(FSCR_EBB_LG)
|
||||
#define FSCR_DSCR __MASK(FSCR_DSCR_LG)
|
||||
#define FSCR_INTR_CAUSE (ASM_CONST(0xFF) << 56) /* interrupt cause */
|
||||
#define SPRN_HFSCR 0xbe /* HV=1 Facility Status & Control Register */
|
||||
#define HFSCR_PREFIX __MASK(FSCR_PREFIX_LG)
|
||||
#define HFSCR_MSGP __MASK(FSCR_MSGP_LG)
|
||||
|
|
@ -426,7 +427,7 @@
|
|||
#define HFSCR_DSCR __MASK(FSCR_DSCR_LG)
|
||||
#define HFSCR_VECVSX __MASK(FSCR_VECVSX_LG)
|
||||
#define HFSCR_FP __MASK(FSCR_FP_LG)
|
||||
#define HFSCR_INTR_CAUSE (ASM_CONST(0xFF) << 56) /* interrupt cause */
|
||||
#define HFSCR_INTR_CAUSE FSCR_INTR_CAUSE
|
||||
#define SPRN_TAR 0x32f /* Target Address Register */
|
||||
#define SPRN_LPCR 0x13E /* LPAR Control Register */
|
||||
#define LPCR_VPM0 ASM_CONST(0x8000000000000000)
|
||||
|
|
|
|||
|
|
@ -38,14 +38,6 @@ extern char start_virt_trampolines[];
|
|||
extern char end_virt_trampolines[];
|
||||
#endif
|
||||
|
||||
static inline int in_kernel_text(unsigned long addr)
|
||||
{
|
||||
if (addr >= (unsigned long)_stext && addr < (unsigned long)__init_end)
|
||||
return 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline unsigned long kernel_toc_addr(void)
|
||||
{
|
||||
/* Defined by the linker, see vmlinux.lds.S */
|
||||
|
|
|
|||
|
|
@ -51,7 +51,7 @@ static inline unsigned long __arch_spin_trylock(arch_spinlock_t *lock)
|
|||
|
||||
token = LOCK_TOKEN;
|
||||
__asm__ __volatile__(
|
||||
"1: " PPC_LWARX(%0,0,%2,1) "\n\
|
||||
"1: lwarx %0,0,%2,1\n\
|
||||
cmpwi 0,%0,0\n\
|
||||
bne- 2f\n\
|
||||
stwcx. %1,0,%2\n\
|
||||
|
|
@ -179,7 +179,7 @@ static inline long __arch_read_trylock(arch_rwlock_t *rw)
|
|||
long tmp;
|
||||
|
||||
__asm__ __volatile__(
|
||||
"1: " PPC_LWARX(%0,0,%1,1) "\n"
|
||||
"1: lwarx %0,0,%1,1\n"
|
||||
__DO_SIGN_EXTEND
|
||||
" addic. %0,%0,1\n\
|
||||
ble- 2f\n"
|
||||
|
|
@ -203,7 +203,7 @@ static inline long __arch_write_trylock(arch_rwlock_t *rw)
|
|||
|
||||
token = WRLOCK_TOKEN;
|
||||
__asm__ __volatile__(
|
||||
"1: " PPC_LWARX(%0,0,%2,1) "\n\
|
||||
"1: lwarx %0,0,%2,1\n\
|
||||
cmpwi 0,%0,0\n\
|
||||
bne- 2f\n"
|
||||
" stwcx. %1,0,%2\n\
|
||||
|
|
|
|||
|
|
@ -33,6 +33,10 @@ extern bool coregroup_enabled;
|
|||
extern int cpu_to_chip_id(int cpu);
|
||||
extern int *chip_id_lookup_table;
|
||||
|
||||
DECLARE_PER_CPU(cpumask_var_t, thread_group_l1_cache_map);
|
||||
DECLARE_PER_CPU(cpumask_var_t, thread_group_l2_cache_map);
|
||||
DECLARE_PER_CPU(cpumask_var_t, thread_group_l3_cache_map);
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
|
||||
struct smp_ops_t {
|
||||
|
|
@ -141,6 +145,7 @@ extern int cpu_to_core_id(int cpu);
|
|||
|
||||
extern bool has_big_cores;
|
||||
extern bool thread_group_shares_l2;
|
||||
extern bool thread_group_shares_l3;
|
||||
|
||||
#define cpu_smt_mask cpu_smt_mask
|
||||
#ifdef CONFIG_SCHED_SMT
|
||||
|
|
@ -195,6 +200,7 @@ extern void __cpu_die(unsigned int cpu);
|
|||
#define hard_smp_processor_id() get_hard_smp_processor_id(0)
|
||||
#define smp_setup_cpu_maps()
|
||||
#define thread_group_shares_l2 0
|
||||
#define thread_group_shares_l3 0
|
||||
static inline void inhibit_secondary_onlining(void) {}
|
||||
static inline void uninhibit_secondary_onlining(void) {}
|
||||
static inline const struct cpumask *cpu_sibling_mask(int cpu)
|
||||
|
|
|
|||
|
|
@ -90,10 +90,9 @@ static inline void syscall_get_arguments(struct task_struct *task,
|
|||
unsigned long val, mask = -1UL;
|
||||
unsigned int n = 6;
|
||||
|
||||
#ifdef CONFIG_COMPAT
|
||||
if (test_tsk_thread_flag(task, TIF_32BIT))
|
||||
if (is_32bit_task())
|
||||
mask = 0xffffffff;
|
||||
#endif
|
||||
|
||||
while (n--) {
|
||||
if (n == 0)
|
||||
val = regs->orig_gpr3;
|
||||
|
|
@ -116,16 +115,11 @@ static inline void syscall_set_arguments(struct task_struct *task,
|
|||
|
||||
static inline int syscall_get_arch(struct task_struct *task)
|
||||
{
|
||||
int arch;
|
||||
|
||||
if (IS_ENABLED(CONFIG_PPC64) && !test_tsk_thread_flag(task, TIF_32BIT))
|
||||
arch = AUDIT_ARCH_PPC64;
|
||||
if (is_32bit_task())
|
||||
return AUDIT_ARCH_PPC;
|
||||
else if (IS_ENABLED(CONFIG_CPU_LITTLE_ENDIAN))
|
||||
return AUDIT_ARCH_PPC64LE;
|
||||
else
|
||||
arch = AUDIT_ARCH_PPC;
|
||||
|
||||
#ifdef __LITTLE_ENDIAN__
|
||||
arch |= __AUDIT_ARCH_LE;
|
||||
#endif
|
||||
return arch;
|
||||
return AUDIT_ARCH_PPC64;
|
||||
}
|
||||
#endif /* _ASM_SYSCALL_H */
|
||||
|
|
|
|||
|
|
@ -6,6 +6,7 @@
|
|||
#include <linux/compiler.h>
|
||||
#include <linux/linkage.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/compat.h>
|
||||
|
||||
struct rtas_args;
|
||||
|
||||
|
|
@ -18,5 +19,34 @@ asmlinkage long sys_mmap2(unsigned long addr, size_t len,
|
|||
asmlinkage long ppc64_personality(unsigned long personality);
|
||||
asmlinkage long sys_rtas(struct rtas_args __user *uargs);
|
||||
|
||||
#ifdef CONFIG_COMPAT
|
||||
unsigned long compat_sys_mmap2(unsigned long addr, size_t len,
|
||||
unsigned long prot, unsigned long flags,
|
||||
unsigned long fd, unsigned long pgoff);
|
||||
|
||||
compat_ssize_t compat_sys_pread64(unsigned int fd, char __user *ubuf, compat_size_t count,
|
||||
u32 reg6, u32 pos1, u32 pos2);
|
||||
|
||||
compat_ssize_t compat_sys_pwrite64(unsigned int fd, const char __user *ubuf, compat_size_t count,
|
||||
u32 reg6, u32 pos1, u32 pos2);
|
||||
|
||||
compat_ssize_t compat_sys_readahead(int fd, u32 r4, u32 offset1, u32 offset2, u32 count);
|
||||
|
||||
int compat_sys_truncate64(const char __user *path, u32 reg4,
|
||||
unsigned long len1, unsigned long len2);
|
||||
|
||||
long compat_sys_fallocate(int fd, int mode, u32 offset1, u32 offset2, u32 len1, u32 len2);
|
||||
|
||||
int compat_sys_ftruncate64(unsigned int fd, u32 reg4, unsigned long len1,
|
||||
unsigned long len2);
|
||||
|
||||
long ppc32_fadvise64(int fd, u32 unused, u32 offset1, u32 offset2,
|
||||
size_t len, int advice);
|
||||
|
||||
long compat_sys_sync_file_range2(int fd, unsigned int flags,
|
||||
unsigned int offset1, unsigned int offset2,
|
||||
unsigned int nbytes1, unsigned int nbytes2);
|
||||
#endif
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* __ASM_POWERPC_SYSCALLS_H */
|
||||
|
|
|
|||
|
|
@ -19,15 +19,7 @@
|
|||
#define TCE_VB 0
|
||||
#define TCE_PCI 1
|
||||
|
||||
/* TCE page size is 4096 bytes (1 << 12) */
|
||||
|
||||
#define TCE_SHIFT 12
|
||||
#define TCE_PAGE_SIZE (1 << TCE_SHIFT)
|
||||
|
||||
#define TCE_ENTRY_SIZE 8 /* each TCE is 64 bits */
|
||||
|
||||
#define TCE_RPN_MASK 0xfffffffffful /* 40-bit RPN (4K pages) */
|
||||
#define TCE_RPN_SHIFT 12
|
||||
#define TCE_VALID 0x800 /* TCE valid */
|
||||
#define TCE_ALLIO 0x400 /* TCE valid for all lpars */
|
||||
#define TCE_PCI_WRITE 0x2 /* write from PCI allowed */
|
||||
|
|
|
|||
|
|
@ -36,7 +36,7 @@ static inline int pcibus_to_node(struct pci_bus *bus)
|
|||
cpu_all_mask : \
|
||||
cpumask_of_node(pcibus_to_node(bus)))
|
||||
|
||||
extern int cpu_distance(__be32 *cpu1_assoc, __be32 *cpu2_assoc);
|
||||
int cpu_relative_distance(__be32 *cpu1_assoc, __be32 *cpu2_assoc);
|
||||
extern int __node_distance(int, int);
|
||||
#define node_distance(a, b) __node_distance(a, b)
|
||||
|
||||
|
|
@ -64,6 +64,12 @@ static inline int early_cpu_to_node(int cpu)
|
|||
}
|
||||
|
||||
int of_drconf_to_nid_single(struct drmem_lmb *lmb);
|
||||
void update_numa_distance(struct device_node *node);
|
||||
|
||||
extern void map_cpu_to_node(int cpu, int node);
|
||||
#ifdef CONFIG_HOTPLUG_CPU
|
||||
extern void unmap_cpu_from_node(unsigned long cpu);
|
||||
#endif /* CONFIG_HOTPLUG_CPU */
|
||||
|
||||
#else
|
||||
|
||||
|
|
@ -83,7 +89,7 @@ static inline void sysfs_remove_device_from_node(struct device *dev,
|
|||
|
||||
static inline void update_numa_cpu_lookup_table(unsigned int cpu, int node) {}
|
||||
|
||||
static inline int cpu_distance(__be32 *cpu1_assoc, __be32 *cpu2_assoc)
|
||||
static inline int cpu_relative_distance(__be32 *cpu1_assoc, __be32 *cpu2_assoc)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -93,6 +99,15 @@ static inline int of_drconf_to_nid_single(struct drmem_lmb *lmb)
|
|||
return first_online_node;
|
||||
}
|
||||
|
||||
static inline void update_numa_distance(struct device_node *node) {}
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
static inline void map_cpu_to_node(int cpu, int node) {}
|
||||
#ifdef CONFIG_HOTPLUG_CPU
|
||||
static inline void unmap_cpu_from_node(unsigned long cpu) {}
|
||||
#endif /* CONFIG_HOTPLUG_CPU */
|
||||
#endif /* CONFIG_SMP */
|
||||
|
||||
#endif /* CONFIG_NUMA */
|
||||
|
||||
#if defined(CONFIG_NUMA) && defined(CONFIG_PPC_SPLPAR)
|
||||
|
|
|
|||
|
|
@ -9,8 +9,6 @@
|
|||
|
||||
#define NR_syscalls __NR_syscalls
|
||||
|
||||
#define __NR__exit __NR_exit
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#include <linux/types.h>
|
||||
|
|
|
|||
|
|
@ -5,12 +5,21 @@
|
|||
#ifndef __ASSEMBLY__
|
||||
|
||||
/* Macros for adjusting thread priority (hardware multi-threading) */
|
||||
#ifdef CONFIG_PPC64
|
||||
#define HMT_very_low() asm volatile("or 31, 31, 31 # very low priority")
|
||||
#define HMT_low() asm volatile("or 1, 1, 1 # low priority")
|
||||
#define HMT_medium_low() asm volatile("or 6, 6, 6 # medium low priority")
|
||||
#define HMT_medium() asm volatile("or 2, 2, 2 # medium priority")
|
||||
#define HMT_medium_high() asm volatile("or 5, 5, 5 # medium high priority")
|
||||
#define HMT_high() asm volatile("or 3, 3, 3 # high priority")
|
||||
#else
|
||||
#define HMT_very_low()
|
||||
#define HMT_low()
|
||||
#define HMT_medium_low()
|
||||
#define HMT_medium()
|
||||
#define HMT_medium_high()
|
||||
#define HMT_high()
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
#define cpu_relax() do { HMT_low(); HMT_medium(); barrier(); } while (0)
|
||||
|
|
|
|||
|
|
@ -89,10 +89,11 @@ static inline int ics_opal_init(void) { return -ENODEV; }
|
|||
/* ICS instance, hooked up to chip_data of an irq */
|
||||
struct ics {
|
||||
struct list_head link;
|
||||
int (*map)(struct ics *ics, unsigned int virq);
|
||||
int (*check)(struct ics *ics, unsigned int hwirq);
|
||||
void (*mask_unknown)(struct ics *ics, unsigned long vec);
|
||||
long (*get_server)(struct ics *ics, unsigned long vec);
|
||||
int (*host_match)(struct ics *ics, struct device_node *node);
|
||||
struct irq_chip *chip;
|
||||
char data[];
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -80,10 +80,13 @@
|
|||
#define TM_QW0W2_VU PPC_BIT32(0)
|
||||
#define TM_QW0W2_LOGIC_SERV PPC_BITMASK32(1,31) // XX 2,31 ?
|
||||
#define TM_QW1W2_VO PPC_BIT32(0)
|
||||
#define TM_QW1W2_HO PPC_BIT32(1) /* P10 XIVE2 */
|
||||
#define TM_QW1W2_OS_CAM PPC_BITMASK32(8,31)
|
||||
#define TM_QW2W2_VP PPC_BIT32(0)
|
||||
#define TM_QW2W2_HP PPC_BIT32(1) /* P10 XIVE2 */
|
||||
#define TM_QW2W2_POOL_CAM PPC_BITMASK32(8,31)
|
||||
#define TM_QW3W2_VT PPC_BIT32(0)
|
||||
#define TM_QW3W2_HT PPC_BIT32(1) /* P10 XIVE2 */
|
||||
#define TM_QW3W2_LP PPC_BIT32(6)
|
||||
#define TM_QW3W2_LE PPC_BIT32(7)
|
||||
#define TM_QW3W2_T PPC_BIT32(31)
|
||||
|
|
|
|||
|
|
@ -111,6 +111,7 @@ void xive_native_free_vp_block(u32 vp_base);
|
|||
int xive_native_populate_irq_data(u32 hw_irq,
|
||||
struct xive_irq_data *data);
|
||||
void xive_cleanup_irq_data(struct xive_irq_data *xd);
|
||||
void xive_irq_free_data(unsigned int virq);
|
||||
void xive_native_free_irq(u32 irq);
|
||||
int xive_native_configure_irq(u32 hw_irq, u32 target, u8 prio, u32 sw_irq);
|
||||
|
||||
|
|
@ -125,6 +126,7 @@ int xive_native_enable_vp(u32 vp_id, bool single_escalation);
|
|||
int xive_native_disable_vp(u32 vp_id);
|
||||
int xive_native_get_vp_info(u32 vp_id, u32 *out_cam_id, u32 *out_chip_id);
|
||||
bool xive_native_has_single_escalation(void);
|
||||
bool xive_native_has_save_restore(void);
|
||||
|
||||
int xive_native_get_queue_info(u32 vp_id, uint32_t prio,
|
||||
u64 *out_qpage,
|
||||
|
|
|
|||
|
|
@ -46,7 +46,8 @@ obj-y := cputable.o syscalls.o \
|
|||
prom.o traps.o setup-common.o \
|
||||
udbg.o misc.o io.o misc_$(BITS).o \
|
||||
of_platform.o prom_parse.o firmware.o \
|
||||
hw_breakpoint_constraints.o interrupt.o
|
||||
hw_breakpoint_constraints.o interrupt.o \
|
||||
kdebugfs.o
|
||||
obj-y += ptrace/
|
||||
obj-$(CONFIG_PPC64) += setup_64.o \
|
||||
paca.o nvram_64.o note.o
|
||||
|
|
|
|||
|
|
@ -286,23 +286,16 @@ int main(void)
|
|||
STACK_PT_REGS_OFFSET(_CCR, ccr);
|
||||
STACK_PT_REGS_OFFSET(_XER, xer);
|
||||
STACK_PT_REGS_OFFSET(_DAR, dar);
|
||||
STACK_PT_REGS_OFFSET(_DEAR, dear);
|
||||
STACK_PT_REGS_OFFSET(_DSISR, dsisr);
|
||||
STACK_PT_REGS_OFFSET(_ESR, esr);
|
||||
STACK_PT_REGS_OFFSET(ORIG_GPR3, orig_gpr3);
|
||||
STACK_PT_REGS_OFFSET(RESULT, result);
|
||||
STACK_PT_REGS_OFFSET(_TRAP, trap);
|
||||
#ifndef CONFIG_PPC64
|
||||
/*
|
||||
* The PowerPC 400-class & Book-E processors have neither the DAR
|
||||
* nor the DSISR SPRs. Hence, we overload them to hold the similar
|
||||
* DEAR and ESR SPRs for such processors. For critical interrupts
|
||||
* we use them to hold SRR0 and SRR1.
|
||||
*/
|
||||
STACK_PT_REGS_OFFSET(_DEAR, dar);
|
||||
STACK_PT_REGS_OFFSET(_ESR, dsisr);
|
||||
#else /* CONFIG_PPC64 */
|
||||
#ifdef CONFIG_PPC64
|
||||
STACK_PT_REGS_OFFSET(SOFTE, softe);
|
||||
STACK_PT_REGS_OFFSET(_PPR, ppr);
|
||||
#endif /* CONFIG_PPC64 */
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PPC_PKEY
|
||||
STACK_PT_REGS_OFFSET(STACK_REGS_AMR, amr);
|
||||
|
|
|
|||
|
|
@ -120,6 +120,7 @@ struct cache {
|
|||
struct cpumask shared_cpu_map; /* online CPUs using this cache */
|
||||
int type; /* split cache disambiguation */
|
||||
int level; /* level not explicit in device tree */
|
||||
int group_id; /* id of the group of threads that share this cache */
|
||||
struct list_head list; /* global list of cache objects */
|
||||
struct cache *next_local; /* next cache of >= level */
|
||||
};
|
||||
|
|
@ -142,22 +143,24 @@ static const char *cache_type_string(const struct cache *cache)
|
|||
}
|
||||
|
||||
static void cache_init(struct cache *cache, int type, int level,
|
||||
struct device_node *ofnode)
|
||||
struct device_node *ofnode, int group_id)
|
||||
{
|
||||
cache->type = type;
|
||||
cache->level = level;
|
||||
cache->ofnode = of_node_get(ofnode);
|
||||
cache->group_id = group_id;
|
||||
INIT_LIST_HEAD(&cache->list);
|
||||
list_add(&cache->list, &cache_list);
|
||||
}
|
||||
|
||||
static struct cache *new_cache(int type, int level, struct device_node *ofnode)
|
||||
static struct cache *new_cache(int type, int level,
|
||||
struct device_node *ofnode, int group_id)
|
||||
{
|
||||
struct cache *cache;
|
||||
|
||||
cache = kzalloc(sizeof(*cache), GFP_KERNEL);
|
||||
if (cache)
|
||||
cache_init(cache, type, level, ofnode);
|
||||
cache_init(cache, type, level, ofnode, group_id);
|
||||
|
||||
return cache;
|
||||
}
|
||||
|
|
@ -309,20 +312,24 @@ static struct cache *cache_find_first_sibling(struct cache *cache)
|
|||
return cache;
|
||||
|
||||
list_for_each_entry(iter, &cache_list, list)
|
||||
if (iter->ofnode == cache->ofnode && iter->next_local == cache)
|
||||
if (iter->ofnode == cache->ofnode &&
|
||||
iter->group_id == cache->group_id &&
|
||||
iter->next_local == cache)
|
||||
return iter;
|
||||
|
||||
return cache;
|
||||
}
|
||||
|
||||
/* return the first cache on a local list matching node */
|
||||
static struct cache *cache_lookup_by_node(const struct device_node *node)
|
||||
/* return the first cache on a local list matching node and thread-group id */
|
||||
static struct cache *cache_lookup_by_node_group(const struct device_node *node,
|
||||
int group_id)
|
||||
{
|
||||
struct cache *cache = NULL;
|
||||
struct cache *iter;
|
||||
|
||||
list_for_each_entry(iter, &cache_list, list) {
|
||||
if (iter->ofnode != node)
|
||||
if (iter->ofnode != node ||
|
||||
iter->group_id != group_id)
|
||||
continue;
|
||||
cache = cache_find_first_sibling(iter);
|
||||
break;
|
||||
|
|
@ -352,14 +359,15 @@ static int cache_is_unified_d(const struct device_node *np)
|
|||
CACHE_TYPE_UNIFIED_D : CACHE_TYPE_UNIFIED;
|
||||
}
|
||||
|
||||
static struct cache *cache_do_one_devnode_unified(struct device_node *node, int level)
|
||||
static struct cache *cache_do_one_devnode_unified(struct device_node *node, int group_id,
|
||||
int level)
|
||||
{
|
||||
pr_debug("creating L%d ucache for %pOFP\n", level, node);
|
||||
|
||||
return new_cache(cache_is_unified_d(node), level, node);
|
||||
return new_cache(cache_is_unified_d(node), level, node, group_id);
|
||||
}
|
||||
|
||||
static struct cache *cache_do_one_devnode_split(struct device_node *node,
|
||||
static struct cache *cache_do_one_devnode_split(struct device_node *node, int group_id,
|
||||
int level)
|
||||
{
|
||||
struct cache *dcache, *icache;
|
||||
|
|
@ -367,8 +375,8 @@ static struct cache *cache_do_one_devnode_split(struct device_node *node,
|
|||
pr_debug("creating L%d dcache and icache for %pOFP\n", level,
|
||||
node);
|
||||
|
||||
dcache = new_cache(CACHE_TYPE_DATA, level, node);
|
||||
icache = new_cache(CACHE_TYPE_INSTRUCTION, level, node);
|
||||
dcache = new_cache(CACHE_TYPE_DATA, level, node, group_id);
|
||||
icache = new_cache(CACHE_TYPE_INSTRUCTION, level, node, group_id);
|
||||
|
||||
if (!dcache || !icache)
|
||||
goto err;
|
||||
|
|
@ -382,31 +390,32 @@ err:
|
|||
return NULL;
|
||||
}
|
||||
|
||||
static struct cache *cache_do_one_devnode(struct device_node *node, int level)
|
||||
static struct cache *cache_do_one_devnode(struct device_node *node, int group_id, int level)
|
||||
{
|
||||
struct cache *cache;
|
||||
|
||||
if (cache_node_is_unified(node))
|
||||
cache = cache_do_one_devnode_unified(node, level);
|
||||
cache = cache_do_one_devnode_unified(node, group_id, level);
|
||||
else
|
||||
cache = cache_do_one_devnode_split(node, level);
|
||||
cache = cache_do_one_devnode_split(node, group_id, level);
|
||||
|
||||
return cache;
|
||||
}
|
||||
|
||||
static struct cache *cache_lookup_or_instantiate(struct device_node *node,
|
||||
int group_id,
|
||||
int level)
|
||||
{
|
||||
struct cache *cache;
|
||||
|
||||
cache = cache_lookup_by_node(node);
|
||||
cache = cache_lookup_by_node_group(node, group_id);
|
||||
|
||||
WARN_ONCE(cache && cache->level != level,
|
||||
"cache level mismatch on lookup (got %d, expected %d)\n",
|
||||
cache->level, level);
|
||||
|
||||
if (!cache)
|
||||
cache = cache_do_one_devnode(node, level);
|
||||
cache = cache_do_one_devnode(node, group_id, level);
|
||||
|
||||
return cache;
|
||||
}
|
||||
|
|
@ -443,7 +452,30 @@ static void do_subsidiary_caches_debugcheck(struct cache *cache)
|
|||
of_node_get_device_type(cache->ofnode));
|
||||
}
|
||||
|
||||
static void do_subsidiary_caches(struct cache *cache)
|
||||
/*
|
||||
* If sub-groups of threads in a core containing @cpu_id share the
|
||||
* L@level-cache (information obtained via "ibm,thread-groups"
|
||||
* device-tree property), then we identify the group by the first
|
||||
* thread-sibling in the group. We define this to be the group-id.
|
||||
*
|
||||
* In the absence of any thread-group information for L@level-cache,
|
||||
* this function returns -1.
|
||||
*/
|
||||
static int get_group_id(unsigned int cpu_id, int level)
|
||||
{
|
||||
if (has_big_cores && level == 1)
|
||||
return cpumask_first(per_cpu(thread_group_l1_cache_map,
|
||||
cpu_id));
|
||||
else if (thread_group_shares_l2 && level == 2)
|
||||
return cpumask_first(per_cpu(thread_group_l2_cache_map,
|
||||
cpu_id));
|
||||
else if (thread_group_shares_l3 && level == 3)
|
||||
return cpumask_first(per_cpu(thread_group_l3_cache_map,
|
||||
cpu_id));
|
||||
return -1;
|
||||
}
|
||||
|
||||
static void do_subsidiary_caches(struct cache *cache, unsigned int cpu_id)
|
||||
{
|
||||
struct device_node *subcache_node;
|
||||
int level = cache->level;
|
||||
|
|
@ -452,9 +484,11 @@ static void do_subsidiary_caches(struct cache *cache)
|
|||
|
||||
while ((subcache_node = of_find_next_cache_node(cache->ofnode))) {
|
||||
struct cache *subcache;
|
||||
int group_id;
|
||||
|
||||
level++;
|
||||
subcache = cache_lookup_or_instantiate(subcache_node, level);
|
||||
group_id = get_group_id(cpu_id, level);
|
||||
subcache = cache_lookup_or_instantiate(subcache_node, group_id, level);
|
||||
of_node_put(subcache_node);
|
||||
if (!subcache)
|
||||
break;
|
||||
|
|
@ -468,6 +502,7 @@ static struct cache *cache_chain_instantiate(unsigned int cpu_id)
|
|||
{
|
||||
struct device_node *cpu_node;
|
||||
struct cache *cpu_cache = NULL;
|
||||
int group_id;
|
||||
|
||||
pr_debug("creating cache object(s) for CPU %i\n", cpu_id);
|
||||
|
||||
|
|
@ -476,11 +511,13 @@ static struct cache *cache_chain_instantiate(unsigned int cpu_id)
|
|||
if (!cpu_node)
|
||||
goto out;
|
||||
|
||||
cpu_cache = cache_lookup_or_instantiate(cpu_node, 1);
|
||||
group_id = get_group_id(cpu_id, 1);
|
||||
|
||||
cpu_cache = cache_lookup_or_instantiate(cpu_node, group_id, 1);
|
||||
if (!cpu_cache)
|
||||
goto out;
|
||||
|
||||
do_subsidiary_caches(cpu_cache);
|
||||
do_subsidiary_caches(cpu_cache, cpu_id);
|
||||
|
||||
cache_cpu_set(cpu_cache, cpu_id);
|
||||
out:
|
||||
|
|
@ -641,45 +678,6 @@ static ssize_t level_show(struct kobject *k, struct kobj_attribute *attr, char *
|
|||
static struct kobj_attribute cache_level_attr =
|
||||
__ATTR(level, 0444, level_show, NULL);
|
||||
|
||||
static unsigned int index_dir_to_cpu(struct cache_index_dir *index)
|
||||
{
|
||||
struct kobject *index_dir_kobj = &index->kobj;
|
||||
struct kobject *cache_dir_kobj = index_dir_kobj->parent;
|
||||
struct kobject *cpu_dev_kobj = cache_dir_kobj->parent;
|
||||
struct device *dev = kobj_to_dev(cpu_dev_kobj);
|
||||
|
||||
return dev->id;
|
||||
}
|
||||
|
||||
/*
|
||||
* On big-core systems, each core has two groups of CPUs each of which
|
||||
* has its own L1-cache. The thread-siblings which share l1-cache with
|
||||
* @cpu can be obtained via cpu_smallcore_mask().
|
||||
*
|
||||
* On some big-core systems, the L2 cache is shared only between some
|
||||
* groups of siblings. This is already parsed and encoded in
|
||||
* cpu_l2_cache_mask().
|
||||
*
|
||||
* TODO: cache_lookup_or_instantiate() needs to be made aware of the
|
||||
* "ibm,thread-groups" property so that cache->shared_cpu_map
|
||||
* reflects the correct siblings on platforms that have this
|
||||
* device-tree property. This helper function is only a stop-gap
|
||||
* solution so that we report the correct siblings to the
|
||||
* userspace via sysfs.
|
||||
*/
|
||||
static const struct cpumask *get_shared_cpu_map(struct cache_index_dir *index, struct cache *cache)
|
||||
{
|
||||
if (has_big_cores) {
|
||||
int cpu = index_dir_to_cpu(index);
|
||||
if (cache->level == 1)
|
||||
return cpu_smallcore_mask(cpu);
|
||||
if (cache->level == 2 && thread_group_shares_l2)
|
||||
return cpu_l2_cache_mask(cpu);
|
||||
}
|
||||
|
||||
return &cache->shared_cpu_map;
|
||||
}
|
||||
|
||||
static ssize_t
|
||||
show_shared_cpumap(struct kobject *k, struct kobj_attribute *attr, char *buf, bool list)
|
||||
{
|
||||
|
|
@ -690,7 +688,7 @@ show_shared_cpumap(struct kobject *k, struct kobj_attribute *attr, char *buf, bo
|
|||
index = kobj_to_cache_index_dir(k);
|
||||
cache = index->cache;
|
||||
|
||||
mask = get_shared_cpu_map(index, cache);
|
||||
mask = &cache->shared_cpu_map;
|
||||
|
||||
return cpumap_print_to_pagebuf(list, buf, mask);
|
||||
}
|
||||
|
|
@ -848,13 +846,15 @@ static struct cache *cache_lookup_by_cpu(unsigned int cpu_id)
|
|||
{
|
||||
struct device_node *cpu_node;
|
||||
struct cache *cache;
|
||||
int group_id;
|
||||
|
||||
cpu_node = of_get_cpu_node(cpu_id, NULL);
|
||||
WARN_ONCE(!cpu_node, "no OF node found for CPU %i\n", cpu_id);
|
||||
if (!cpu_node)
|
||||
return NULL;
|
||||
|
||||
cache = cache_lookup_by_node(cpu_node);
|
||||
group_id = get_group_id(cpu_id, 1);
|
||||
cache = cache_lookup_by_node_group(cpu_node, group_id);
|
||||
of_node_put(cpu_node);
|
||||
|
||||
return cache;
|
||||
|
|
|
|||
|
|
@ -9,7 +9,6 @@
|
|||
#include <linux/export.h>
|
||||
#include <linux/fs.h>
|
||||
#include <linux/debugfs.h>
|
||||
#include <asm/debugfs.h>
|
||||
#include <asm/machdep.h>
|
||||
#include <asm/hvcall.h>
|
||||
|
||||
|
|
@ -101,7 +100,7 @@ static int __init dawr_force_setup(void)
|
|||
if (PVR_VER(mfspr(SPRN_PVR)) == PVR_POWER9) {
|
||||
/* Turn DAWR off by default, but allow admin to turn it on */
|
||||
debugfs_create_file_unsafe("dawr_enable_dangerous", 0600,
|
||||
powerpc_debugfs_root,
|
||||
arch_debugfs_dir,
|
||||
&dawr_force_enable,
|
||||
&dawr_enable_fops);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -21,9 +21,9 @@
|
|||
#include <linux/spinlock.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/debugfs.h>
|
||||
|
||||
#include <linux/atomic.h>
|
||||
#include <asm/debugfs.h>
|
||||
#include <asm/eeh.h>
|
||||
#include <asm/eeh_event.h>
|
||||
#include <asm/io.h>
|
||||
|
|
@ -1901,24 +1901,24 @@ static int __init eeh_init_proc(void)
|
|||
proc_create_single("powerpc/eeh", 0, NULL, proc_eeh_show);
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
debugfs_create_file_unsafe("eeh_enable", 0600,
|
||||
powerpc_debugfs_root, NULL,
|
||||
arch_debugfs_dir, NULL,
|
||||
&eeh_enable_dbgfs_ops);
|
||||
debugfs_create_u32("eeh_max_freezes", 0600,
|
||||
powerpc_debugfs_root, &eeh_max_freezes);
|
||||
arch_debugfs_dir, &eeh_max_freezes);
|
||||
debugfs_create_bool("eeh_disable_recovery", 0600,
|
||||
powerpc_debugfs_root,
|
||||
arch_debugfs_dir,
|
||||
&eeh_debugfs_no_recover);
|
||||
debugfs_create_file_unsafe("eeh_dev_check", 0600,
|
||||
powerpc_debugfs_root, NULL,
|
||||
arch_debugfs_dir, NULL,
|
||||
&eeh_dev_check_fops);
|
||||
debugfs_create_file_unsafe("eeh_dev_break", 0600,
|
||||
powerpc_debugfs_root, NULL,
|
||||
arch_debugfs_dir, NULL,
|
||||
&eeh_dev_break_fops);
|
||||
debugfs_create_file_unsafe("eeh_force_recover", 0600,
|
||||
powerpc_debugfs_root, NULL,
|
||||
arch_debugfs_dir, NULL,
|
||||
&eeh_force_recover_fops);
|
||||
debugfs_create_file_unsafe("eeh_dev_can_recover", 0600,
|
||||
powerpc_debugfs_root, NULL,
|
||||
arch_debugfs_dir, NULL,
|
||||
&eeh_dev_can_recover_fops);
|
||||
eeh_cache_debugfs_init();
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -12,8 +12,8 @@
|
|||
#include <linux/slab.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/atomic.h>
|
||||
#include <linux/debugfs.h>
|
||||
#include <asm/pci-bridge.h>
|
||||
#include <asm/debugfs.h>
|
||||
#include <asm/ppc-pci.h>
|
||||
|
||||
|
||||
|
|
@ -283,6 +283,6 @@ DEFINE_SHOW_ATTRIBUTE(eeh_addr_cache);
|
|||
void eeh_cache_debugfs_init(void)
|
||||
{
|
||||
debugfs_create_file_unsafe("eeh_address_cache", 0400,
|
||||
powerpc_debugfs_root, NULL,
|
||||
arch_debugfs_dir, NULL,
|
||||
&eeh_addr_cache_fops);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -161,10 +161,10 @@ ret_from_fork:
|
|||
ret_from_kernel_thread:
|
||||
REST_NVGPRS(r1)
|
||||
bl schedule_tail
|
||||
mtlr r14
|
||||
mtctr r14
|
||||
mr r3,r15
|
||||
PPC440EP_ERR42
|
||||
blrl
|
||||
bctrl
|
||||
li r3,0
|
||||
b ret_from_syscall
|
||||
|
||||
|
|
|
|||
|
|
@ -309,7 +309,7 @@ _GLOBAL(enter_rtas)
|
|||
*/
|
||||
lbz r0,PACAIRQSOFTMASK(r13)
|
||||
1: tdeqi r0,IRQS_ENABLED
|
||||
EMIT_BUG_ENTRY 1b,__FILE__,__LINE__,BUGFLAG_WARNING
|
||||
EMIT_WARN_ENTRY 1b,__FILE__,__LINE__,BUGFLAG_WARNING
|
||||
#endif
|
||||
|
||||
/* Hard-disable interrupts */
|
||||
|
|
|
|||
|
|
@ -545,8 +545,8 @@ __end_interrupts:
|
|||
PROLOG_ADDITION_2REGS)
|
||||
mfspr r14,SPRN_DEAR
|
||||
mfspr r15,SPRN_ESR
|
||||
std r14,_DAR(r1)
|
||||
std r15,_DSISR(r1)
|
||||
std r14,_DEAR(r1)
|
||||
std r15,_ESR(r1)
|
||||
ld r14,PACA_EXGEN+EX_R14(r13)
|
||||
ld r15,PACA_EXGEN+EX_R15(r13)
|
||||
EXCEPTION_COMMON(0x300)
|
||||
|
|
@ -558,8 +558,8 @@ __end_interrupts:
|
|||
PROLOG_ADDITION_2REGS)
|
||||
li r15,0
|
||||
mr r14,r10
|
||||
std r14,_DAR(r1)
|
||||
std r15,_DSISR(r1)
|
||||
std r14,_DEAR(r1)
|
||||
std r15,_ESR(r1)
|
||||
ld r14,PACA_EXGEN+EX_R14(r13)
|
||||
ld r15,PACA_EXGEN+EX_R15(r13)
|
||||
EXCEPTION_COMMON(0x400)
|
||||
|
|
@ -575,8 +575,8 @@ __end_interrupts:
|
|||
PROLOG_ADDITION_2REGS)
|
||||
mfspr r14,SPRN_DEAR
|
||||
mfspr r15,SPRN_ESR
|
||||
std r14,_DAR(r1)
|
||||
std r15,_DSISR(r1)
|
||||
std r14,_DEAR(r1)
|
||||
std r15,_ESR(r1)
|
||||
ld r14,PACA_EXGEN+EX_R14(r13)
|
||||
ld r15,PACA_EXGEN+EX_R15(r13)
|
||||
EXCEPTION_COMMON(0x600)
|
||||
|
|
@ -587,7 +587,7 @@ __end_interrupts:
|
|||
NORMAL_EXCEPTION_PROLOG(0x700, BOOKE_INTERRUPT_PROGRAM,
|
||||
PROLOG_ADDITION_1REG)
|
||||
mfspr r14,SPRN_ESR
|
||||
std r14,_DSISR(r1)
|
||||
std r14,_ESR(r1)
|
||||
ld r14,PACA_EXGEN+EX_R14(r13)
|
||||
EXCEPTION_COMMON(0x700)
|
||||
addi r3,r1,STACK_FRAME_OVERHEAD
|
||||
|
|
@ -1057,8 +1057,8 @@ bad_stack_book3e:
|
|||
std r11,_CCR(r1)
|
||||
mfspr r10,SPRN_DEAR
|
||||
mfspr r11,SPRN_ESR
|
||||
std r10,_DAR(r1)
|
||||
std r11,_DSISR(r1)
|
||||
std r10,_DEAR(r1)
|
||||
std r11,_ESR(r1)
|
||||
std r0,GPR0(r1); /* save r0 in stackframe */ \
|
||||
std r2,GPR2(r1); /* save r2 in stackframe */ \
|
||||
SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \
|
||||
|
|
@ -1127,7 +1127,7 @@ found_iprot:
|
|||
* r3 = MAS0_TLBSEL (for the iprot array)
|
||||
* r4 = SPRN_TLBnCFG
|
||||
*/
|
||||
bl invstr /* Find our address */
|
||||
bcl 20,31,$+4 /* Find our address */
|
||||
invstr: mflr r6 /* Make it accessible */
|
||||
mfmsr r7
|
||||
rlwinm r5,r7,27,31,31 /* extract MSR[IS] */
|
||||
|
|
@ -1196,7 +1196,7 @@ skpinv: addi r6,r6,1 /* Increment */
|
|||
mfmsr r6
|
||||
xori r6,r6,MSR_IS
|
||||
mtspr SPRN_SRR1,r6
|
||||
bl 1f /* Find our address */
|
||||
bcl 20,31,$+4 /* Find our address */
|
||||
1: mflr r6
|
||||
addi r6,r6,(2f - 1b)
|
||||
mtspr SPRN_SRR0,r6
|
||||
|
|
@ -1256,7 +1256,7 @@ skpinv: addi r6,r6,1 /* Increment */
|
|||
* r4 = MAS0 w/TLBSEL & ESEL for the temp mapping
|
||||
*/
|
||||
/* Now we branch the new virtual address mapped by this entry */
|
||||
bl 1f /* Find our address */
|
||||
bcl 20,31,$+4 /* Find our address */
|
||||
1: mflr r6
|
||||
addi r6,r6,(2f - 1b)
|
||||
tovirt(r6,r6)
|
||||
|
|
|
|||
|
|
@ -24,8 +24,8 @@
|
|||
#include <linux/slab.h>
|
||||
#include <linux/cma.h>
|
||||
#include <linux/hugetlb.h>
|
||||
#include <linux/debugfs.h>
|
||||
|
||||
#include <asm/debugfs.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/prom.h>
|
||||
#include <asm/fadump.h>
|
||||
|
|
@ -1557,7 +1557,7 @@ static void fadump_init_files(void)
|
|||
return;
|
||||
}
|
||||
|
||||
debugfs_create_file("fadump_region", 0444, powerpc_debugfs_root, NULL,
|
||||
debugfs_create_file("fadump_region", 0444, arch_debugfs_dir, NULL,
|
||||
&fadump_region_fops);
|
||||
|
||||
if (fw_dump.dump_active) {
|
||||
|
|
|
|||
|
|
@ -91,8 +91,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX)
|
|||
isync
|
||||
/* enable use of FP after return */
|
||||
#ifdef CONFIG_PPC32
|
||||
mfspr r5,SPRN_SPRG_THREAD /* current task's THREAD (phys) */
|
||||
tovirt(r5, r5)
|
||||
addi r5,r2,THREAD
|
||||
lwz r4,THREAD_FPEXC_MODE(r5)
|
||||
ori r9,r9,MSR_FP /* enable FP for current */
|
||||
or r9,r9,r4
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
|
||||
/* 1. Find the index of the entry we're executing in */
|
||||
bl invstr /* Find our address */
|
||||
bcl 20,31,$+4 /* Find our address */
|
||||
invstr: mflr r6 /* Make it accessible */
|
||||
mfmsr r7
|
||||
rlwinm r4,r7,27,31,31 /* extract MSR[IS] */
|
||||
|
|
@ -85,7 +85,7 @@ skpinv: addi r6,r6,1 /* Increment */
|
|||
addi r6,r6,10
|
||||
slw r6,r8,r6 /* convert to mask */
|
||||
|
||||
bl 1f /* Find our address */
|
||||
bcl 20,31,$+4 /* Find our address */
|
||||
1: mflr r7
|
||||
|
||||
mfspr r8,SPRN_MAS3
|
||||
|
|
@ -117,7 +117,7 @@ skpinv: addi r6,r6,1 /* Increment */
|
|||
|
||||
xori r6,r4,1
|
||||
slwi r6,r6,5 /* setup new context with other address space */
|
||||
bl 1f /* Find our address */
|
||||
bcl 20,31,$+4 /* Find our address */
|
||||
1: mflr r9
|
||||
rlwimi r7,r9,0,20,31
|
||||
addi r7,r7,(2f - 1b)
|
||||
|
|
@ -207,7 +207,7 @@ next_tlb_setup:
|
|||
|
||||
lis r7,MSR_KERNEL@h
|
||||
ori r7,r7,MSR_KERNEL@l
|
||||
bl 1f /* Find our address */
|
||||
bcl 20,31,$+4 /* Find our address */
|
||||
1: mflr r9
|
||||
rlwimi r6,r9,0,20,31
|
||||
addi r6,r6,(2f - 1b)
|
||||
|
|
|
|||
|
|
@ -70,7 +70,7 @@ _ENTRY(_start);
|
|||
* address.
|
||||
* r21 will be loaded with the physical runtime address of _stext
|
||||
*/
|
||||
bl 0f /* Get our runtime address */
|
||||
bcl 20,31,$+4 /* Get our runtime address */
|
||||
0: mflr r21 /* Make it accessible */
|
||||
addis r21,r21,(_stext - 0b)@ha
|
||||
addi r21,r21,(_stext - 0b)@l /* Get our current runtime base */
|
||||
|
|
@ -853,7 +853,7 @@ _GLOBAL(init_cpu_state)
|
|||
wmmucr: mtspr SPRN_MMUCR,r3 /* Put MMUCR */
|
||||
sync
|
||||
|
||||
bl invstr /* Find our address */
|
||||
bcl 20,31,$+4 /* Find our address */
|
||||
invstr: mflr r5 /* Make it accessible */
|
||||
tlbsx r23,0,r5 /* Find entry we are in */
|
||||
li r4,0 /* Start at TLB entry 0 */
|
||||
|
|
@ -1045,7 +1045,7 @@ head_start_47x:
|
|||
sync
|
||||
|
||||
/* Find the entry we are running from */
|
||||
bl 1f
|
||||
bcl 20,31,$+4
|
||||
1: mflr r23
|
||||
tlbsx r23,0,r23
|
||||
tlbre r24,r23,0
|
||||
|
|
|
|||
|
|
@ -712,6 +712,8 @@ _GLOBAL(copy_and_flush)
|
|||
isync
|
||||
blr
|
||||
|
||||
_ASM_NOKPROBE_SYMBOL(copy_and_flush); /* Called in real mode */
|
||||
|
||||
.align 8
|
||||
copy_to_here:
|
||||
|
||||
|
|
|
|||
|
|
@ -79,7 +79,7 @@ _ENTRY(_start);
|
|||
mr r23,r3
|
||||
mr r25,r4
|
||||
|
||||
bl 0f
|
||||
bcl 20,31,$+4
|
||||
0: mflr r8
|
||||
addis r3,r8,(is_second_reloc - 0b)@ha
|
||||
lwz r19,(is_second_reloc - 0b)@l(r3)
|
||||
|
|
@ -1132,7 +1132,7 @@ _GLOBAL(switch_to_as1)
|
|||
bne 1b
|
||||
|
||||
/* Get the tlb entry used by the current running code */
|
||||
bl 0f
|
||||
bcl 20,31,$+4
|
||||
0: mflr r4
|
||||
tlbsx 0,r4
|
||||
|
||||
|
|
@ -1166,7 +1166,7 @@ _GLOBAL(switch_to_as1)
|
|||
_GLOBAL(restore_to_as0)
|
||||
mflr r0
|
||||
|
||||
bl 0f
|
||||
bcl 20,31,$+4
|
||||
0: mflr r9
|
||||
addi r9,r9,1f - 0b
|
||||
|
||||
|
|
|
|||
|
|
@ -22,7 +22,6 @@
|
|||
#include <asm/processor.h>
|
||||
#include <asm/sstep.h>
|
||||
#include <asm/debug.h>
|
||||
#include <asm/debugfs.h>
|
||||
#include <asm/hvcall.h>
|
||||
#include <asm/inst.h>
|
||||
#include <linux/uaccess.h>
|
||||
|
|
|
|||
|
|
@ -8,7 +8,6 @@
|
|||
#include <asm/asm-prototypes.h>
|
||||
#include <asm/kup.h>
|
||||
#include <asm/cputime.h>
|
||||
#include <asm/interrupt.h>
|
||||
#include <asm/hw_irq.h>
|
||||
#include <asm/interrupt.h>
|
||||
#include <asm/kprobes.h>
|
||||
|
|
@ -93,8 +92,7 @@ notrace long system_call_exception(long r3, long r4, long r5,
|
|||
CT_WARN_ON(ct_state() == CONTEXT_KERNEL);
|
||||
user_exit_irqoff();
|
||||
|
||||
if (!IS_ENABLED(CONFIG_BOOKE) && !IS_ENABLED(CONFIG_40x))
|
||||
BUG_ON(!(regs->msr & MSR_RI));
|
||||
BUG_ON(regs_is_unrecoverable(regs));
|
||||
BUG_ON(!(regs->msr & MSR_PR));
|
||||
BUG_ON(arch_irq_disabled_regs(regs));
|
||||
|
||||
|
|
@ -463,9 +461,7 @@ notrace unsigned long interrupt_exit_user_prepare(struct pt_regs *regs)
|
|||
{
|
||||
unsigned long ret;
|
||||
|
||||
if (!IS_ENABLED(CONFIG_BOOKE) && !IS_ENABLED(CONFIG_40x))
|
||||
BUG_ON(!(regs->msr & MSR_RI));
|
||||
BUG_ON(!(regs->msr & MSR_PR));
|
||||
BUG_ON(regs_is_unrecoverable(regs));
|
||||
BUG_ON(arch_irq_disabled_regs(regs));
|
||||
CT_WARN_ON(ct_state() == CONTEXT_USER);
|
||||
|
||||
|
|
@ -496,10 +492,8 @@ notrace unsigned long interrupt_exit_kernel_prepare(struct pt_regs *regs)
|
|||
bool stack_store = current_thread_info()->flags &
|
||||
_TIF_EMULATE_STACK_STORE;
|
||||
|
||||
if (!IS_ENABLED(CONFIG_BOOKE) && !IS_ENABLED(CONFIG_40x) &&
|
||||
unlikely(!(regs->msr & MSR_RI)))
|
||||
if (regs_is_unrecoverable(regs))
|
||||
unrecoverable_exception(regs);
|
||||
BUG_ON(regs->msr & MSR_PR);
|
||||
/*
|
||||
* CT_WARN_ON comes here via program_check_exception,
|
||||
* so avoid recursion.
|
||||
|
|
|
|||
|
|
@ -688,34 +688,26 @@ static void iommu_table_reserve_pages(struct iommu_table *tbl,
|
|||
if (tbl->it_offset == 0)
|
||||
set_bit(0, tbl->it_map);
|
||||
|
||||
if (res_start < tbl->it_offset)
|
||||
res_start = tbl->it_offset;
|
||||
|
||||
if (res_end > (tbl->it_offset + tbl->it_size))
|
||||
res_end = tbl->it_offset + tbl->it_size;
|
||||
|
||||
/* Check if res_start..res_end is a valid range in the table */
|
||||
if (res_start >= res_end) {
|
||||
tbl->it_reserved_start = tbl->it_offset;
|
||||
tbl->it_reserved_end = tbl->it_offset;
|
||||
return;
|
||||
}
|
||||
|
||||
tbl->it_reserved_start = res_start;
|
||||
tbl->it_reserved_end = res_end;
|
||||
|
||||
/* Check if res_start..res_end isn't empty and overlaps the table */
|
||||
if (res_start && res_end &&
|
||||
(tbl->it_offset + tbl->it_size < res_start ||
|
||||
res_end < tbl->it_offset))
|
||||
return;
|
||||
|
||||
for (i = tbl->it_reserved_start; i < tbl->it_reserved_end; ++i)
|
||||
set_bit(i - tbl->it_offset, tbl->it_map);
|
||||
}
|
||||
|
||||
static void iommu_table_release_pages(struct iommu_table *tbl)
|
||||
{
|
||||
int i;
|
||||
|
||||
/*
|
||||
* In case we have reserved the first bit, we should not emit
|
||||
* the warning below.
|
||||
*/
|
||||
if (tbl->it_offset == 0)
|
||||
clear_bit(0, tbl->it_map);
|
||||
|
||||
for (i = tbl->it_reserved_start; i < tbl->it_reserved_end; ++i)
|
||||
clear_bit(i - tbl->it_offset, tbl->it_map);
|
||||
}
|
||||
|
||||
/*
|
||||
* Build a iommu_table structure. This contains a bit map which
|
||||
* is used to manage allocation of the tce space.
|
||||
|
|
@ -777,6 +769,22 @@ struct iommu_table *iommu_init_table(struct iommu_table *tbl, int nid,
|
|||
return tbl;
|
||||
}
|
||||
|
||||
bool iommu_table_in_use(struct iommu_table *tbl)
|
||||
{
|
||||
unsigned long start = 0, end;
|
||||
|
||||
/* ignore reserved bit0 */
|
||||
if (tbl->it_offset == 0)
|
||||
start = 1;
|
||||
end = tbl->it_reserved_start - tbl->it_offset;
|
||||
if (find_next_bit(tbl->it_map, end, start) != end)
|
||||
return true;
|
||||
|
||||
start = tbl->it_reserved_end - tbl->it_offset;
|
||||
end = tbl->it_size;
|
||||
return find_next_bit(tbl->it_map, end, start) != end;
|
||||
}
|
||||
|
||||
static void iommu_table_free(struct kref *kref)
|
||||
{
|
||||
struct iommu_table *tbl;
|
||||
|
|
@ -793,10 +801,8 @@ static void iommu_table_free(struct kref *kref)
|
|||
|
||||
iommu_debugfs_del(tbl);
|
||||
|
||||
iommu_table_release_pages(tbl);
|
||||
|
||||
/* verify that table contains no entries */
|
||||
if (!bitmap_empty(tbl->it_map, tbl->it_size))
|
||||
if (iommu_table_in_use(tbl))
|
||||
pr_warn("%s: Unexpected TCEs\n", __func__);
|
||||
|
||||
/* free bitmap */
|
||||
|
|
@ -1097,14 +1103,9 @@ int iommu_take_ownership(struct iommu_table *tbl)
|
|||
for (i = 0; i < tbl->nr_pools; i++)
|
||||
spin_lock_nest_lock(&tbl->pools[i].lock, &tbl->large_pool.lock);
|
||||
|
||||
iommu_table_release_pages(tbl);
|
||||
|
||||
if (!bitmap_empty(tbl->it_map, tbl->it_size)) {
|
||||
if (iommu_table_in_use(tbl)) {
|
||||
pr_err("iommu_tce: it_map is not empty");
|
||||
ret = -EBUSY;
|
||||
/* Undo iommu_table_release_pages, i.e. restore bit#0, etc */
|
||||
iommu_table_reserve_pages(tbl, tbl->it_reserved_start,
|
||||
tbl->it_reserved_end);
|
||||
} else {
|
||||
memset(tbl->it_map, 0xff, sz);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -0,0 +1,14 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
#include <linux/debugfs.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/init.h>
|
||||
|
||||
struct dentry *arch_debugfs_dir;
|
||||
EXPORT_SYMBOL(arch_debugfs_dir);
|
||||
|
||||
static int __init arch_kdebugfs_init(void)
|
||||
{
|
||||
arch_debugfs_dir = debugfs_create_dir("powerpc", NULL);
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(arch_kdebugfs_init);
|
||||
|
|
@ -29,7 +29,7 @@ _GLOBAL(reloc_offset)
|
|||
li r3, 0
|
||||
_GLOBAL(add_reloc_offset)
|
||||
mflr r0
|
||||
bl 1f
|
||||
bcl 20,31,$+4
|
||||
1: mflr r5
|
||||
PPC_LL r4,(2f-1b)(r5)
|
||||
subf r5,r4,r5
|
||||
|
|
|
|||
|
|
@ -67,7 +67,7 @@ _GLOBAL(reloc_got2)
|
|||
srwi. r8,r8,2
|
||||
beqlr
|
||||
mtctr r8
|
||||
bl 1f
|
||||
bcl 20,31,$+4
|
||||
1: mflr r0
|
||||
lis r4,1b@ha
|
||||
addi r4,r4,1b@l
|
||||
|
|
@ -237,7 +237,7 @@ _GLOBAL(copy_page)
|
|||
addi r3,r3,-4
|
||||
|
||||
0: twnei r5, 0 /* WARN if r3 is not cache aligned */
|
||||
EMIT_BUG_ENTRY 0b,__FILE__,__LINE__, BUGFLAG_WARNING
|
||||
EMIT_WARN_ENTRY 0b,__FILE__,__LINE__, BUGFLAG_WARNING
|
||||
|
||||
addi r4,r4,-4
|
||||
|
||||
|
|
|
|||
|
|
@ -255,7 +255,7 @@ _GLOBAL(scom970_write)
|
|||
* Physical (hardware) cpu id should be in r3.
|
||||
*/
|
||||
_GLOBAL(kexec_wait)
|
||||
bl 1f
|
||||
bcl 20,31,$+4
|
||||
1: mflr r5
|
||||
addi r5,r5,kexec_flag-1b
|
||||
|
||||
|
|
|
|||
|
|
@ -29,6 +29,7 @@
|
|||
#include <linux/slab.h>
|
||||
#include <linux/vgaarb.h>
|
||||
#include <linux/numa.h>
|
||||
#include <linux/msi.h>
|
||||
|
||||
#include <asm/processor.h>
|
||||
#include <asm/io.h>
|
||||
|
|
@ -1060,11 +1061,16 @@ void pcibios_bus_add_device(struct pci_dev *dev)
|
|||
|
||||
int pcibios_add_device(struct pci_dev *dev)
|
||||
{
|
||||
struct irq_domain *d;
|
||||
|
||||
#ifdef CONFIG_PCI_IOV
|
||||
if (ppc_md.pcibios_fixup_sriov)
|
||||
ppc_md.pcibios_fixup_sriov(dev);
|
||||
#endif /* CONFIG_PCI_IOV */
|
||||
|
||||
d = dev_get_msi_domain(&dev->bus->dev);
|
||||
if (d)
|
||||
dev_set_msi_domain(&dev->dev, d);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1499,7 +1499,7 @@ static void __show_regs(struct pt_regs *regs)
|
|||
trap == INTERRUPT_DATA_STORAGE ||
|
||||
trap == INTERRUPT_ALIGNMENT) {
|
||||
if (IS_ENABLED(CONFIG_4xx) || IS_ENABLED(CONFIG_BOOKE))
|
||||
pr_cont("DEAR: "REG" ESR: "REG" ", regs->dar, regs->dsisr);
|
||||
pr_cont("DEAR: "REG" ESR: "REG" ", regs->dear, regs->esr);
|
||||
else
|
||||
pr_cont("DAR: "REG" DSISR: %08lx ", regs->dar, regs->dsisr);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -640,7 +640,9 @@ static void __init early_reserve_mem(void)
|
|||
}
|
||||
#endif /* CONFIG_BLK_DEV_INITRD */
|
||||
|
||||
#ifdef CONFIG_PPC32
|
||||
if (!IS_ENABLED(CONFIG_PPC32))
|
||||
return;
|
||||
|
||||
/*
|
||||
* Handle the case where we might be booting from an old kexec
|
||||
* image that setup the mem_rsvmap as pairs of 32-bit values
|
||||
|
|
@ -661,7 +663,6 @@ static void __init early_reserve_mem(void)
|
|||
}
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
|
||||
|
|
|
|||
|
|
@ -1096,7 +1096,8 @@ static const struct ibm_arch_vec ibm_architecture_vec_template __initconst = {
|
|||
#else
|
||||
0,
|
||||
#endif
|
||||
.associativity = OV5_FEAT(OV5_TYPE1_AFFINITY) | OV5_FEAT(OV5_PRRN),
|
||||
.associativity = OV5_FEAT(OV5_FORM1_AFFINITY) | OV5_FEAT(OV5_PRRN) |
|
||||
OV5_FEAT(OV5_FORM2_AFFINITY),
|
||||
.bin_opts = OV5_FEAT(OV5_RESIZE_HPT) | OV5_FEAT(OV5_HP_EVT),
|
||||
.micro_checkpoint = 0,
|
||||
.reserved0 = 0,
|
||||
|
|
|
|||
|
|
@ -373,8 +373,12 @@ void __init pt_regs_check(void)
|
|||
offsetof(struct user_pt_regs, trap));
|
||||
BUILD_BUG_ON(offsetof(struct pt_regs, dar) !=
|
||||
offsetof(struct user_pt_regs, dar));
|
||||
BUILD_BUG_ON(offsetof(struct pt_regs, dear) !=
|
||||
offsetof(struct user_pt_regs, dar));
|
||||
BUILD_BUG_ON(offsetof(struct pt_regs, dsisr) !=
|
||||
offsetof(struct user_pt_regs, dsisr));
|
||||
BUILD_BUG_ON(offsetof(struct pt_regs, esr) !=
|
||||
offsetof(struct user_pt_regs, dsisr));
|
||||
BUILD_BUG_ON(offsetof(struct pt_regs, result) !=
|
||||
offsetof(struct user_pt_regs, result));
|
||||
|
||||
|
|
|
|||
|
|
@ -30,7 +30,7 @@ R_PPC_RELATIVE = 22
|
|||
_GLOBAL(relocate)
|
||||
|
||||
mflr r0 /* Save our LR */
|
||||
bl 0f /* Find our current runtime address */
|
||||
bcl 20,31,$+4 /* Find our current runtime address */
|
||||
0: mflr r12 /* Make it accessible */
|
||||
mtlr r0
|
||||
|
||||
|
|
|
|||
|
|
@ -429,7 +429,7 @@ static void rtas_event_scan(struct work_struct *w)
|
|||
|
||||
do_event_scan();
|
||||
|
||||
get_online_cpus();
|
||||
cpus_read_lock();
|
||||
|
||||
/* raw_ OK because just using CPU as starting point. */
|
||||
cpu = cpumask_next(raw_smp_processor_id(), cpu_online_mask);
|
||||
|
|
@ -451,7 +451,7 @@ static void rtas_event_scan(struct work_struct *w)
|
|||
schedule_delayed_work_on(cpu, &event_scan_work,
|
||||
__round_jiffies_relative(event_scan_delay, cpu));
|
||||
|
||||
put_online_cpus();
|
||||
cpus_read_unlock();
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
|
|
|
|||
|
|
@ -11,10 +11,10 @@
|
|||
#include <linux/nospec.h>
|
||||
#include <linux/prctl.h>
|
||||
#include <linux/seq_buf.h>
|
||||
#include <linux/debugfs.h>
|
||||
|
||||
#include <asm/asm-prototypes.h>
|
||||
#include <asm/code-patching.h>
|
||||
#include <asm/debugfs.h>
|
||||
#include <asm/security_features.h>
|
||||
#include <asm/setup.h>
|
||||
#include <asm/inst.h>
|
||||
|
|
@ -106,7 +106,7 @@ DEFINE_DEBUGFS_ATTRIBUTE(fops_barrier_nospec, barrier_nospec_get,
|
|||
static __init int barrier_nospec_debugfs_init(void)
|
||||
{
|
||||
debugfs_create_file_unsafe("barrier_nospec", 0600,
|
||||
powerpc_debugfs_root, NULL,
|
||||
arch_debugfs_dir, NULL,
|
||||
&fops_barrier_nospec);
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -114,7 +114,7 @@ device_initcall(barrier_nospec_debugfs_init);
|
|||
|
||||
static __init int security_feature_debugfs_init(void)
|
||||
{
|
||||
debugfs_create_x64("security_features", 0400, powerpc_debugfs_root,
|
||||
debugfs_create_x64("security_features", 0400, arch_debugfs_dir,
|
||||
&powerpc_security_features);
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -420,7 +420,7 @@ DEFINE_DEBUGFS_ATTRIBUTE(fops_stf_barrier, stf_barrier_get, stf_barrier_set,
|
|||
|
||||
static __init int stf_barrier_debugfs_init(void)
|
||||
{
|
||||
debugfs_create_file_unsafe("stf_barrier", 0600, powerpc_debugfs_root,
|
||||
debugfs_create_file_unsafe("stf_barrier", 0600, arch_debugfs_dir,
|
||||
NULL, &fops_stf_barrier);
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -748,7 +748,7 @@ DEFINE_DEBUGFS_ATTRIBUTE(fops_count_cache_flush, count_cache_flush_get,
|
|||
static __init int count_cache_flush_debugfs_init(void)
|
||||
{
|
||||
debugfs_create_file_unsafe("count_cache_flush", 0600,
|
||||
powerpc_debugfs_root, NULL,
|
||||
arch_debugfs_dir, NULL,
|
||||
&fops_count_cache_flush);
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -834,9 +834,9 @@ DEFINE_SIMPLE_ATTRIBUTE(fops_uaccess_flush, uaccess_flush_get, uaccess_flush_set
|
|||
|
||||
static __init int rfi_flush_debugfs_init(void)
|
||||
{
|
||||
debugfs_create_file("rfi_flush", 0600, powerpc_debugfs_root, NULL, &fops_rfi_flush);
|
||||
debugfs_create_file("entry_flush", 0600, powerpc_debugfs_root, NULL, &fops_entry_flush);
|
||||
debugfs_create_file("uaccess_flush", 0600, powerpc_debugfs_root, NULL, &fops_uaccess_flush);
|
||||
debugfs_create_file("rfi_flush", 0600, arch_debugfs_dir, NULL, &fops_rfi_flush);
|
||||
debugfs_create_file("entry_flush", 0600, arch_debugfs_dir, NULL, &fops_entry_flush);
|
||||
debugfs_create_file("uaccess_flush", 0600, arch_debugfs_dir, NULL, &fops_uaccess_flush);
|
||||
return 0;
|
||||
}
|
||||
device_initcall(rfi_flush_debugfs_init);
|
||||
|
|
|
|||
|
|
@ -33,7 +33,6 @@
|
|||
#include <linux/of_platform.h>
|
||||
#include <linux/hugetlb.h>
|
||||
#include <linux/pgtable.h>
|
||||
#include <asm/debugfs.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/paca.h>
|
||||
#include <asm/prom.h>
|
||||
|
|
@ -773,18 +772,6 @@ static int __init check_cache_coherency(void)
|
|||
late_initcall(check_cache_coherency);
|
||||
#endif /* CONFIG_CHECK_CACHE_COHERENCY */
|
||||
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
struct dentry *powerpc_debugfs_root;
|
||||
EXPORT_SYMBOL(powerpc_debugfs_root);
|
||||
|
||||
static int powerpc_debugfs_init(void)
|
||||
{
|
||||
powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(powerpc_debugfs_init);
|
||||
#endif
|
||||
|
||||
void ppc_printk_progress(char *s, unsigned short hex)
|
||||
{
|
||||
pr_info("%s\n", s);
|
||||
|
|
|
|||
|
|
@ -32,7 +32,6 @@
|
|||
#include <linux/nmi.h>
|
||||
#include <linux/pgtable.h>
|
||||
|
||||
#include <asm/debugfs.h>
|
||||
#include <asm/kvm_guest.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/kdump.h>
|
||||
|
|
|
|||
|
|
@ -78,6 +78,7 @@ struct task_struct *secondary_current;
|
|||
bool has_big_cores;
|
||||
bool coregroup_enabled;
|
||||
bool thread_group_shares_l2;
|
||||
bool thread_group_shares_l3;
|
||||
|
||||
DEFINE_PER_CPU(cpumask_var_t, cpu_sibling_map);
|
||||
DEFINE_PER_CPU(cpumask_var_t, cpu_smallcore_map);
|
||||
|
|
@ -101,7 +102,7 @@ enum {
|
|||
|
||||
#define MAX_THREAD_LIST_SIZE 8
|
||||
#define THREAD_GROUP_SHARE_L1 1
|
||||
#define THREAD_GROUP_SHARE_L2 2
|
||||
#define THREAD_GROUP_SHARE_L2_L3 2
|
||||
struct thread_groups {
|
||||
unsigned int property;
|
||||
unsigned int nr_groups;
|
||||
|
|
@ -122,14 +123,20 @@ static struct thread_groups_list tgl[NR_CPUS] __initdata;
|
|||
* On big-cores system, thread_group_l1_cache_map for each CPU corresponds to
|
||||
* the set its siblings that share the L1-cache.
|
||||
*/
|
||||
static DEFINE_PER_CPU(cpumask_var_t, thread_group_l1_cache_map);
|
||||
DEFINE_PER_CPU(cpumask_var_t, thread_group_l1_cache_map);
|
||||
|
||||
/*
|
||||
* On some big-cores system, thread_group_l2_cache_map for each CPU
|
||||
* corresponds to the set its siblings within the core that share the
|
||||
* L2-cache.
|
||||
*/
|
||||
static DEFINE_PER_CPU(cpumask_var_t, thread_group_l2_cache_map);
|
||||
DEFINE_PER_CPU(cpumask_var_t, thread_group_l2_cache_map);
|
||||
|
||||
/*
|
||||
* On P10, thread_group_l3_cache_map for each CPU is equal to the
|
||||
* thread_group_l2_cache_map
|
||||
*/
|
||||
DEFINE_PER_CPU(cpumask_var_t, thread_group_l3_cache_map);
|
||||
|
||||
/* SMP operations for this machine */
|
||||
struct smp_ops_t *smp_ops;
|
||||
|
|
@ -889,33 +896,10 @@ out:
|
|||
return tg;
|
||||
}
|
||||
|
||||
static int __init init_thread_group_cache_map(int cpu, int cache_property)
|
||||
|
||||
static int update_mask_from_threadgroup(cpumask_var_t *mask, struct thread_groups *tg, int cpu, int cpu_group_start)
|
||||
{
|
||||
int first_thread = cpu_first_thread_sibling(cpu);
|
||||
int i, cpu_group_start = -1, err = 0;
|
||||
struct thread_groups *tg = NULL;
|
||||
cpumask_var_t *mask = NULL;
|
||||
|
||||
if (cache_property != THREAD_GROUP_SHARE_L1 &&
|
||||
cache_property != THREAD_GROUP_SHARE_L2)
|
||||
return -EINVAL;
|
||||
|
||||
tg = get_thread_groups(cpu, cache_property, &err);
|
||||
if (!tg)
|
||||
return err;
|
||||
|
||||
cpu_group_start = get_cpu_thread_group_start(cpu, tg);
|
||||
|
||||
if (unlikely(cpu_group_start == -1)) {
|
||||
WARN_ON_ONCE(1);
|
||||
return -ENODATA;
|
||||
}
|
||||
|
||||
if (cache_property == THREAD_GROUP_SHARE_L1)
|
||||
mask = &per_cpu(thread_group_l1_cache_map, cpu);
|
||||
else if (cache_property == THREAD_GROUP_SHARE_L2)
|
||||
mask = &per_cpu(thread_group_l2_cache_map, cpu);
|
||||
int i;
|
||||
|
||||
zalloc_cpumask_var_node(mask, GFP_KERNEL, cpu_to_node(cpu));
|
||||
|
||||
|
|
@ -934,6 +918,44 @@ static int __init init_thread_group_cache_map(int cpu, int cache_property)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int __init init_thread_group_cache_map(int cpu, int cache_property)
|
||||
|
||||
{
|
||||
int cpu_group_start = -1, err = 0;
|
||||
struct thread_groups *tg = NULL;
|
||||
cpumask_var_t *mask = NULL;
|
||||
|
||||
if (cache_property != THREAD_GROUP_SHARE_L1 &&
|
||||
cache_property != THREAD_GROUP_SHARE_L2_L3)
|
||||
return -EINVAL;
|
||||
|
||||
tg = get_thread_groups(cpu, cache_property, &err);
|
||||
|
||||
if (!tg)
|
||||
return err;
|
||||
|
||||
cpu_group_start = get_cpu_thread_group_start(cpu, tg);
|
||||
|
||||
if (unlikely(cpu_group_start == -1)) {
|
||||
WARN_ON_ONCE(1);
|
||||
return -ENODATA;
|
||||
}
|
||||
|
||||
if (cache_property == THREAD_GROUP_SHARE_L1) {
|
||||
mask = &per_cpu(thread_group_l1_cache_map, cpu);
|
||||
update_mask_from_threadgroup(mask, tg, cpu, cpu_group_start);
|
||||
}
|
||||
else if (cache_property == THREAD_GROUP_SHARE_L2_L3) {
|
||||
mask = &per_cpu(thread_group_l2_cache_map, cpu);
|
||||
update_mask_from_threadgroup(mask, tg, cpu, cpu_group_start);
|
||||
mask = &per_cpu(thread_group_l3_cache_map, cpu);
|
||||
update_mask_from_threadgroup(mask, tg, cpu, cpu_group_start);
|
||||
}
|
||||
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static bool shared_caches;
|
||||
|
||||
#ifdef CONFIG_SCHED_SMT
|
||||
|
|
@ -1020,14 +1042,16 @@ static int __init init_big_cores(void)
|
|||
has_big_cores = true;
|
||||
|
||||
for_each_possible_cpu(cpu) {
|
||||
int err = init_thread_group_cache_map(cpu, THREAD_GROUP_SHARE_L2);
|
||||
int err = init_thread_group_cache_map(cpu, THREAD_GROUP_SHARE_L2_L3);
|
||||
|
||||
if (err)
|
||||
return err;
|
||||
}
|
||||
|
||||
thread_group_shares_l2 = true;
|
||||
pr_debug("L2 cache only shared by the threads in the small core\n");
|
||||
thread_group_shares_l3 = true;
|
||||
pr_debug("L2/L3 cache only shared by the threads in the small core\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -1085,7 +1109,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
|
|||
}
|
||||
|
||||
if (cpu_to_chip_id(boot_cpuid) != -1) {
|
||||
int idx = num_possible_cpus() / threads_per_core;
|
||||
int idx = DIV_ROUND_UP(num_possible_cpus(), threads_per_core);
|
||||
|
||||
/*
|
||||
* All threads of a core will all belong to the same core,
|
||||
|
|
@ -1376,7 +1400,7 @@ static bool update_mask_by_l2(int cpu, cpumask_var_t *mask)
|
|||
l2_cache = cpu_to_l2cache(cpu);
|
||||
if (!l2_cache || !*mask) {
|
||||
/* Assume only core siblings share cache with this CPU */
|
||||
for_each_cpu(i, submask_fn(cpu))
|
||||
for_each_cpu(i, cpu_sibling_mask(cpu))
|
||||
set_cpus_related(cpu, i, cpu_l2_cache_mask);
|
||||
|
||||
return false;
|
||||
|
|
@ -1418,6 +1442,8 @@ static void remove_cpu_from_masks(int cpu)
|
|||
struct cpumask *(*mask_fn)(int) = cpu_sibling_mask;
|
||||
int i;
|
||||
|
||||
unmap_cpu_from_node(cpu);
|
||||
|
||||
if (shared_caches)
|
||||
mask_fn = cpu_l2_cache_mask;
|
||||
|
||||
|
|
@ -1502,7 +1528,9 @@ static void add_cpu_to_masks(int cpu)
|
|||
* This CPU will not be in the online mask yet so we need to manually
|
||||
* add it to it's own thread sibling mask.
|
||||
*/
|
||||
map_cpu_to_node(cpu, cpu_to_node(cpu));
|
||||
cpumask_set_cpu(cpu, cpu_sibling_mask(cpu));
|
||||
cpumask_set_cpu(cpu, cpu_core_mask(cpu));
|
||||
|
||||
for (i = first_thread; i < first_thread + threads_per_core; i++)
|
||||
if (cpu_online(i))
|
||||
|
|
@ -1520,11 +1548,6 @@ static void add_cpu_to_masks(int cpu)
|
|||
if (chip_id_lookup_table && ret)
|
||||
chip_id = cpu_to_chip_id(cpu);
|
||||
|
||||
if (chip_id == -1) {
|
||||
cpumask_copy(per_cpu(cpu_core_map, cpu), cpu_cpu_mask(cpu));
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (shared_caches)
|
||||
submask_fn = cpu_l2_cache_mask;
|
||||
|
||||
|
|
@ -1534,6 +1557,10 @@ static void add_cpu_to_masks(int cpu)
|
|||
/* Skip all CPUs already part of current CPU core mask */
|
||||
cpumask_andnot(mask, cpu_online_mask, cpu_core_mask(cpu));
|
||||
|
||||
/* If chip_id is -1; limit the cpu_core_mask to within DIE*/
|
||||
if (chip_id == -1)
|
||||
cpumask_and(mask, mask, cpu_cpu_mask(cpu));
|
||||
|
||||
for_each_cpu(i, mask) {
|
||||
if (chip_id == cpu_to_chip_id(i)) {
|
||||
or_cpumasks_related(cpu, i, submask_fn, cpu_core_mask);
|
||||
|
|
@ -1543,7 +1570,6 @@ static void add_cpu_to_masks(int cpu)
|
|||
}
|
||||
}
|
||||
|
||||
out:
|
||||
free_cpumask_var(mask);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -8,6 +8,7 @@
|
|||
* Copyright 2018 Nick Piggin, Michael Ellerman, IBM Corp.
|
||||
*/
|
||||
|
||||
#include <linux/delay.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/kallsyms.h>
|
||||
#include <linux/module.h>
|
||||
|
|
|
|||
|
|
@ -41,20 +41,13 @@ static inline long do_mmap2(unsigned long addr, size_t len,
|
|||
unsigned long prot, unsigned long flags,
|
||||
unsigned long fd, unsigned long off, int shift)
|
||||
{
|
||||
long ret = -EINVAL;
|
||||
|
||||
if (!arch_validate_prot(prot, addr))
|
||||
goto out;
|
||||
return -EINVAL;
|
||||
|
||||
if (shift) {
|
||||
if (off & ((1 << shift) - 1))
|
||||
goto out;
|
||||
off >>= shift;
|
||||
}
|
||||
if (!IS_ALIGNED(off, 1 << shift))
|
||||
return -EINVAL;
|
||||
|
||||
ret = ksys_mmap_pgoff(addr, len, prot, flags, fd, off);
|
||||
out:
|
||||
return ret;
|
||||
return ksys_mmap_pgoff(addr, len, prot, flags, fd, off >> shift);
|
||||
}
|
||||
|
||||
SYSCALL_DEFINE6(mmap2, unsigned long, addr, size_t, len,
|
||||
|
|
|
|||
|
|
@ -164,7 +164,7 @@ static void tau_work_func(struct work_struct *work)
|
|||
queue_work(tau_workq, work);
|
||||
}
|
||||
|
||||
DECLARE_WORK(tau_work, tau_work_func);
|
||||
static DECLARE_WORK(tau_work, tau_work_func);
|
||||
|
||||
/*
|
||||
* setup the TAU
|
||||
|
|
|
|||
|
|
@ -31,6 +31,7 @@
|
|||
#include <linux/export.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/sched/clock.h>
|
||||
#include <linux/sched/cputime.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/param.h>
|
||||
#include <linux/string.h>
|
||||
|
|
@ -52,8 +53,6 @@
|
|||
#include <linux/irq_work.h>
|
||||
#include <linux/of_clk.h>
|
||||
#include <linux/suspend.h>
|
||||
#include <linux/sched/cputime.h>
|
||||
#include <linux/sched/clock.h>
|
||||
#include <linux/processor.h>
|
||||
#include <asm/trace.h>
|
||||
|
||||
|
|
|
|||
|
|
@ -37,10 +37,10 @@
|
|||
#include <linux/smp.h>
|
||||
#include <linux/console.h>
|
||||
#include <linux/kmsg_dump.h>
|
||||
#include <linux/debugfs.h>
|
||||
|
||||
#include <asm/emulated_ops.h>
|
||||
#include <linux/uaccess.h>
|
||||
#include <asm/debugfs.h>
|
||||
#include <asm/interrupt.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/machdep.h>
|
||||
|
|
@ -427,7 +427,7 @@ void hv_nmi_check_nonrecoverable(struct pt_regs *regs)
|
|||
return;
|
||||
|
||||
nonrecoverable:
|
||||
regs_set_return_msr(regs, regs->msr & ~MSR_RI);
|
||||
regs_set_unrecoverable(regs);
|
||||
#endif
|
||||
}
|
||||
DEFINE_INTERRUPT_HANDLER_NMI(system_reset_exception)
|
||||
|
|
@ -497,7 +497,7 @@ out:
|
|||
die("Unrecoverable nested System Reset", regs, SIGABRT);
|
||||
#endif
|
||||
/* Must die if the interrupt is not recoverable */
|
||||
if (!(regs->msr & MSR_RI)) {
|
||||
if (regs_is_unrecoverable(regs)) {
|
||||
/* For the reason explained in die_mce, nmi_exit before die */
|
||||
nmi_exit();
|
||||
die("Unrecoverable System Reset", regs, SIGABRT);
|
||||
|
|
@ -549,7 +549,7 @@ static inline int check_io_access(struct pt_regs *regs)
|
|||
printk(KERN_DEBUG "%s bad port %lx at %p\n",
|
||||
(*nip & 0x100)? "OUT to": "IN from",
|
||||
regs->gpr[rb] - _IO_BASE, nip);
|
||||
regs_set_return_msr(regs, regs->msr | MSR_RI);
|
||||
regs_set_recoverable(regs);
|
||||
regs_set_return_ip(regs, extable_fixup(entry));
|
||||
return 1;
|
||||
}
|
||||
|
|
@ -561,7 +561,7 @@ static inline int check_io_access(struct pt_regs *regs)
|
|||
#ifdef CONFIG_PPC_ADV_DEBUG_REGS
|
||||
/* On 4xx, the reason for the machine check or program exception
|
||||
is in the ESR. */
|
||||
#define get_reason(regs) ((regs)->dsisr)
|
||||
#define get_reason(regs) ((regs)->esr)
|
||||
#define REASON_FP ESR_FP
|
||||
#define REASON_ILLEGAL (ESR_PIL | ESR_PUO)
|
||||
#define REASON_PRIVILEGED ESR_PPR
|
||||
|
|
@ -839,7 +839,7 @@ DEFINE_INTERRUPT_HANDLER_NMI(machine_check_exception)
|
|||
|
||||
bail:
|
||||
/* Must die if the interrupt is not recoverable */
|
||||
if (!(regs->msr & MSR_RI))
|
||||
if (regs_is_unrecoverable(regs))
|
||||
die_mce("Unrecoverable Machine check", regs, SIGBUS);
|
||||
|
||||
#ifdef CONFIG_PPC_BOOK3S_64
|
||||
|
|
@ -1481,8 +1481,13 @@ static void do_program_check(struct pt_regs *regs)
|
|||
|
||||
if (!(regs->msr & MSR_PR) && /* not user-mode */
|
||||
report_bug(bugaddr, regs) == BUG_TRAP_TYPE_WARN) {
|
||||
regs_add_return_ip(regs, 4);
|
||||
return;
|
||||
const struct exception_table_entry *entry;
|
||||
|
||||
entry = search_exception_tables(bugaddr);
|
||||
if (entry) {
|
||||
regs_set_return_ip(regs, extable_fixup(entry) + regs->nip - bugaddr);
|
||||
return;
|
||||
}
|
||||
}
|
||||
_exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
|
||||
return;
|
||||
|
|
@ -2271,7 +2276,7 @@ static int __init ppc_warn_emulated_init(void)
|
|||
struct ppc_emulated_entry *entries = (void *)&ppc_emulated;
|
||||
|
||||
dir = debugfs_create_dir("emulated_instructions",
|
||||
powerpc_debugfs_root);
|
||||
arch_debugfs_dir);
|
||||
|
||||
debugfs_create_u32("do_warn", 0644, dir, &ppc_warn_emulated);
|
||||
|
||||
|
|
|
|||
|
|
@ -65,9 +65,8 @@ _GLOBAL(load_up_altivec)
|
|||
1:
|
||||
/* enable use of VMX after return */
|
||||
#ifdef CONFIG_PPC32
|
||||
mfspr r5,SPRN_SPRG_THREAD /* current task's THREAD (phys) */
|
||||
addi r5,r2,THREAD
|
||||
oris r9,r9,MSR_VEC@h
|
||||
tovirt(r5, r5)
|
||||
#else
|
||||
ld r4,PACACURRENT(r13)
|
||||
addi r5,r4,THREAD /* Get THREAD */
|
||||
|
|
@ -81,7 +80,6 @@ _GLOBAL(load_up_altivec)
|
|||
li r4,1
|
||||
stb r4,THREAD_LOAD_VEC(r5)
|
||||
addi r6,r5,THREAD_VRSTATE
|
||||
li r4,1
|
||||
li r10,VRSTATE_VSCR
|
||||
stw r4,THREAD_USED_VR(r5)
|
||||
lvx v0,r10,r6
|
||||
|
|
|
|||
|
|
@ -64,15 +64,18 @@ int default_machine_kexec_prepare(struct kimage *image)
|
|||
begin = image->segment[i].mem;
|
||||
end = begin + image->segment[i].memsz;
|
||||
|
||||
if ((begin < high) && (end > low))
|
||||
if ((begin < high) && (end > low)) {
|
||||
of_node_put(node);
|
||||
return -ETXTBSY;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void copy_segments(unsigned long ind)
|
||||
/* Called during kexec sequence with MMU off */
|
||||
static notrace void copy_segments(unsigned long ind)
|
||||
{
|
||||
unsigned long entry;
|
||||
unsigned long *ptr;
|
||||
|
|
@ -105,7 +108,8 @@ static void copy_segments(unsigned long ind)
|
|||
}
|
||||
}
|
||||
|
||||
void kexec_copy_flush(struct kimage *image)
|
||||
/* Called during kexec sequence with MMU off */
|
||||
notrace void kexec_copy_flush(struct kimage *image)
|
||||
{
|
||||
long i, nr_segments = image->nr_segments;
|
||||
struct kexec_segment ranges[KEXEC_SEGMENT_MAX];
|
||||
|
|
|
|||
|
|
@ -93,7 +93,7 @@ wmmucr:
|
|||
* Invalidate all the TLB entries except the current entry
|
||||
* where we are running from
|
||||
*/
|
||||
bl 0f /* Find our address */
|
||||
bcl 20,31,$+4 /* Find our address */
|
||||
0: mflr r5 /* Make it accessible */
|
||||
tlbsx r23,0,r5 /* Find entry we are in */
|
||||
li r4,0 /* Start at TLB entry 0 */
|
||||
|
|
@ -158,7 +158,7 @@ write_out:
|
|||
/* Switch to other address space in MSR */
|
||||
insrwi r9, r7, 1, 26 /* Set MSR[IS] = r7 */
|
||||
|
||||
bl 1f
|
||||
bcl 20,31,$+4
|
||||
1: mflr r8
|
||||
addi r8, r8, (2f-1b) /* Find the target offset */
|
||||
|
||||
|
|
@ -202,7 +202,7 @@ next_tlb:
|
|||
li r9,0
|
||||
insrwi r9, r7, 1, 26 /* Set MSR[IS] = r7 */
|
||||
|
||||
bl 1f
|
||||
bcl 20,31,$+4
|
||||
1: mflr r8
|
||||
and r8, r8, r11 /* Get our offset within page */
|
||||
addi r8, r8, (2f-1b)
|
||||
|
|
@ -240,7 +240,7 @@ setup_map_47x:
|
|||
sync
|
||||
|
||||
/* Find the entry we are running from */
|
||||
bl 2f
|
||||
bcl 20,31,$+4
|
||||
2: mflr r23
|
||||
tlbsx r23, 0, r23
|
||||
tlbre r24, r23, 0 /* TLB Word 0 */
|
||||
|
|
@ -296,7 +296,7 @@ clear_utlb_entry:
|
|||
/* Update the msr to the new TS */
|
||||
insrwi r5, r7, 1, 26
|
||||
|
||||
bl 1f
|
||||
bcl 20,31,$+4
|
||||
1: mflr r6
|
||||
addi r6, r6, (2f-1b)
|
||||
|
||||
|
|
@ -355,7 +355,7 @@ write_utlb:
|
|||
/* Defaults to 256M */
|
||||
lis r10, 0x1000
|
||||
|
||||
bl 1f
|
||||
bcl 20,31,$+4
|
||||
1: mflr r4
|
||||
addi r4, r4, (2f-1b) /* virtual address of 2f */
|
||||
|
||||
|
|
|
|||
|
|
@ -38,7 +38,6 @@ config KVM_BOOK3S_32_HANDLER
|
|||
config KVM_BOOK3S_64_HANDLER
|
||||
bool
|
||||
select KVM_BOOK3S_HANDLER
|
||||
select PPC_DAWR_FORCE_ENABLE
|
||||
|
||||
config KVM_BOOK3S_PR_POSSIBLE
|
||||
bool
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue