qla2xxx: ISP27xx queue index shadow registers.
For ISP27xx use the request/response queue index shadow registers to avoid directly access them on the PCI bus. Signed-off-by: Joe Carnuccio <joe.carnuccio@qlogic.com> Signed-off-by: Saurav Kashyap <saurav.kashyap@qlogic.com> Signed-off-by: Christoph Hellwig <hch@lst.de>
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c04964017a
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@ -2685,6 +2685,7 @@ struct rsp_que {
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uint32_t __iomem *rsp_q_out;
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uint32_t __iomem *rsp_q_out;
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uint16_t ring_index;
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uint16_t ring_index;
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uint16_t out_ptr;
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uint16_t out_ptr;
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uint16_t *in_ptr; /* queue shadow in index */
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uint16_t length;
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uint16_t length;
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uint16_t options;
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uint16_t options;
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uint16_t rid;
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uint16_t rid;
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@ -2711,6 +2712,7 @@ struct req_que {
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uint32_t __iomem *req_q_out;
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uint32_t __iomem *req_q_out;
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uint16_t ring_index;
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uint16_t ring_index;
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uint16_t in_ptr;
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uint16_t in_ptr;
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uint16_t *out_ptr; /* queue shadow out index */
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uint16_t cnt;
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uint16_t cnt;
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uint16_t length;
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uint16_t length;
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uint16_t options;
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uint16_t options;
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@ -3019,6 +3021,7 @@ struct qla_hw_data {
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(((ha)->fw_attributes_h << 16 | (ha)->fw_attributes) & BIT_22))
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(((ha)->fw_attributes_h << 16 | (ha)->fw_attributes) & BIT_22))
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#define IS_ATIO_MSIX_CAPABLE(ha) (IS_QLA83XX(ha))
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#define IS_ATIO_MSIX_CAPABLE(ha) (IS_QLA83XX(ha))
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#define IS_TGT_MODE_CAPABLE(ha) (ha->tgt.atio_q_length)
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#define IS_TGT_MODE_CAPABLE(ha) (ha->tgt.atio_q_length)
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#define IS_SHADOW_REG_CAPABLE(ha) (IS_QLA27XX(ha))
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/* HBA serial number */
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/* HBA serial number */
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uint8_t serial0;
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uint8_t serial0;
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@ -371,7 +371,10 @@ struct init_cb_24xx {
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* BIT 14 = Data Rate bit 1
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* BIT 14 = Data Rate bit 1
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* BIT 15 = Data Rate bit 2
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* BIT 15 = Data Rate bit 2
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* BIT 16 = Enable 75 ohm Termination Select
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* BIT 16 = Enable 75 ohm Termination Select
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* BIT 17-31 = Reserved
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* BIT 17-28 = Reserved
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* BIT 29 = Enable response queue 0 in index shadowing
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* BIT 30 = Enable request queue 0 out index shadowing
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* BIT 31 = Reserved
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*/
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*/
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uint32_t firmware_options_3;
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uint32_t firmware_options_3;
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uint16_t qos;
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uint16_t qos;
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@ -2062,6 +2062,10 @@ qla24xx_config_rings(struct scsi_qla_host *vha)
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icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma));
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icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma));
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icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma));
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icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma));
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if (IS_SHADOW_REG_CAPABLE(ha))
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icb->firmware_options_2 |=
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__constant_cpu_to_le32(BIT_30|BIT_29);
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if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
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if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
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icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
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icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
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icb->rid = __constant_cpu_to_le16(rid);
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icb->rid = __constant_cpu_to_le16(rid);
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@ -2139,6 +2143,8 @@ qla2x00_init_rings(scsi_qla_host_t *vha)
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req = ha->req_q_map[que];
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req = ha->req_q_map[que];
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if (!req)
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if (!req)
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continue;
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continue;
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req->out_ptr = (void *)(req->ring + req->length);
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*req->out_ptr = 0;
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for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++)
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for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++)
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req->outstanding_cmds[cnt] = NULL;
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req->outstanding_cmds[cnt] = NULL;
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@ -2154,6 +2160,8 @@ qla2x00_init_rings(scsi_qla_host_t *vha)
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rsp = ha->rsp_q_map[que];
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rsp = ha->rsp_q_map[que];
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if (!rsp)
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if (!rsp)
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continue;
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continue;
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rsp->in_ptr = (void *)(rsp->ring + rsp->length);
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*rsp->in_ptr = 0;
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/* Initialize response queue entries */
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/* Initialize response queue entries */
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if (IS_QLAFX00(ha))
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if (IS_QLAFX00(ha))
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qlafx00_init_response_q_entries(rsp);
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qlafx00_init_response_q_entries(rsp);
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@ -1478,8 +1478,8 @@ qla24xx_start_scsi(srb_t *sp)
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tot_dsds = nseg;
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tot_dsds = nseg;
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req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
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req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
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if (req->cnt < (req_cnt + 2)) {
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if (req->cnt < (req_cnt + 2)) {
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cnt = RD_REG_DWORD_RELAXED(req->req_q_out);
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cnt = IS_SHADOW_REG_CAPABLE(ha) ? *req->out_ptr :
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RD_REG_DWORD_RELAXED(req->req_q_out);
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if (req->ring_index < cnt)
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if (req->ring_index < cnt)
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req->cnt = cnt - req->ring_index;
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req->cnt = cnt - req->ring_index;
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else
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else
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@ -1697,8 +1697,8 @@ qla24xx_dif_start_scsi(srb_t *sp)
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tot_prot_dsds = nseg;
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tot_prot_dsds = nseg;
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tot_dsds += nseg;
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tot_dsds += nseg;
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if (req->cnt < (req_cnt + 2)) {
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if (req->cnt < (req_cnt + 2)) {
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cnt = RD_REG_DWORD_RELAXED(req->req_q_out);
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cnt = IS_SHADOW_REG_CAPABLE(ha) ? *req->out_ptr :
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RD_REG_DWORD_RELAXED(req->req_q_out);
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if (req->ring_index < cnt)
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if (req->ring_index < cnt)
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req->cnt = cnt - req->ring_index;
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req->cnt = cnt - req->ring_index;
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else
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else
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@ -2825,8 +2825,8 @@ qla2x00_start_bidir(srb_t *sp, struct scsi_qla_host *vha, uint32_t tot_dsds)
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/* Check for room on request queue. */
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/* Check for room on request queue. */
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if (req->cnt < req_cnt + 2) {
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if (req->cnt < req_cnt + 2) {
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cnt = RD_REG_DWORD_RELAXED(req->req_q_out);
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cnt = IS_SHADOW_REG_CAPABLE(ha) ? *req->out_ptr :
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RD_REG_DWORD_RELAXED(req->req_q_out);
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if (req->ring_index < cnt)
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if (req->ring_index < cnt)
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req->cnt = cnt - req->ring_index;
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req->cnt = cnt - req->ring_index;
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else
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else
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@ -3735,6 +3735,9 @@ qla25xx_init_req_que(struct scsi_qla_host *vha, struct req_que *req)
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ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d3,
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ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d3,
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"Entered %s.\n", __func__);
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"Entered %s.\n", __func__);
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if (IS_SHADOW_REG_CAPABLE(ha))
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req->options |= BIT_13;
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mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
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mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
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mcp->mb[1] = req->options;
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mcp->mb[1] = req->options;
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mcp->mb[2] = MSW(LSD(req->dma));
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mcp->mb[2] = MSW(LSD(req->dma));
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@ -3754,7 +3757,7 @@ qla25xx_init_req_que(struct scsi_qla_host *vha, struct req_que *req)
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/* que in ptr index */
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/* que in ptr index */
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mcp->mb[8] = 0;
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mcp->mb[8] = 0;
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/* que out ptr index */
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/* que out ptr index */
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mcp->mb[9] = 0;
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mcp->mb[9] = *req->out_ptr = 0;
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mcp->out_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|MBX_7|
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mcp->out_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|MBX_7|
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MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
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MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
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mcp->in_mb = MBX_0;
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mcp->in_mb = MBX_0;
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@ -3801,6 +3804,9 @@ qla25xx_init_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp)
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ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d6,
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ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d6,
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"Entered %s.\n", __func__);
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"Entered %s.\n", __func__);
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if (IS_SHADOW_REG_CAPABLE(ha))
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rsp->options |= BIT_13;
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mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
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mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
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mcp->mb[1] = rsp->options;
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mcp->mb[1] = rsp->options;
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mcp->mb[2] = MSW(LSD(rsp->dma));
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mcp->mb[2] = MSW(LSD(rsp->dma));
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@ -3815,7 +3821,7 @@ qla25xx_init_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp)
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mcp->mb[4] = rsp->id;
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mcp->mb[4] = rsp->id;
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/* que in ptr index */
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/* que in ptr index */
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mcp->mb[8] = 0;
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mcp->mb[8] = *rsp->in_ptr = 0;
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/* que out ptr index */
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/* que out ptr index */
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mcp->mb[9] = 0;
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mcp->mb[9] = 0;
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mcp->out_mb = MBX_14|MBX_13|MBX_9|MBX_8|MBX_7
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mcp->out_mb = MBX_14|MBX_13|MBX_9|MBX_8|MBX_7
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@ -679,7 +679,8 @@ qla27xx_fwdt_entry_t274(struct scsi_qla_host *vha,
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if (req || !buf) {
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if (req || !buf) {
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qla27xx_insert16(i, buf, len);
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qla27xx_insert16(i, buf, len);
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qla27xx_insert16(1, buf, len);
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qla27xx_insert16(1, buf, len);
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qla27xx_insert32(0, buf, len);
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qla27xx_insert32(req && req->out_ptr ?
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*req->out_ptr : 0, buf, len);
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count++;
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count++;
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}
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}
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}
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}
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@ -689,7 +690,8 @@ qla27xx_fwdt_entry_t274(struct scsi_qla_host *vha,
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if (rsp || !buf) {
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if (rsp || !buf) {
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qla27xx_insert16(i, buf, len);
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qla27xx_insert16(i, buf, len);
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qla27xx_insert16(1, buf, len);
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qla27xx_insert16(1, buf, len);
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qla27xx_insert32(0, buf, len);
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qla27xx_insert32(rsp && rsp->in_ptr ?
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*rsp->in_ptr : 0, buf, len);
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count++;
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count++;
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}
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}
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}
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}
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