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net/mlx5e: Enable all available stats for uplink reps 

Extend stats group array of uplink representor with all stats that are
available for PF in legacy mode, besides ipsec and TLS which are not
supported.

Don't output vport stats for uplink representor because they are already
handled by 802_3 group (with different names: {tx|rx}_{bytes|packets}_phy).

Signed-off-by: Vlad Buslov <vladbu@mellanox.com>
Reviewed-by: Roi Dayan <roid@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
This commit is contained in:
Vlad Buslov 2020-01-21 20:08:42 +02:00 committed by Saeed Mahameed
parent 8520fa57a4
commit 7c453526dc
3 changed files with 18 additions and 33 deletions
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44
drivers/net/ethernet/mellanox/mlx5/core/en_rep.c
View File

@ -181,7 +181,7 @@ static MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(vport_rep)
return idx;
}
static void mlx5e_vf_rep_update_hw_counters(struct mlx5e_priv *priv)
static MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(vport_rep)
{
struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
struct mlx5e_rep_priv *rpriv = priv->ppriv;
@ -204,32 +204,6 @@ static void mlx5e_vf_rep_update_hw_counters(struct mlx5e_priv *priv)
vport_stats->tx_bytes = vf_stats.rx_bytes;
}
static void mlx5e_uplink_rep_update_hw_counters(struct mlx5e_priv *priv)
{
struct mlx5e_pport_stats *pstats = &priv->stats.pport;
struct rtnl_link_stats64 *vport_stats;
MLX5E_STATS_GRP_OP(802_3, update_stats)(priv);
vport_stats = &priv->stats.vf_vport;
vport_stats->rx_packets = PPORT_802_3_GET(pstats, a_frames_received_ok);
vport_stats->rx_bytes = PPORT_802_3_GET(pstats, a_octets_received_ok);
vport_stats->tx_packets = PPORT_802_3_GET(pstats, a_frames_transmitted_ok);
vport_stats->tx_bytes = PPORT_802_3_GET(pstats, a_octets_transmitted_ok);
}
static MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(vport_rep)
{
struct mlx5e_rep_priv *rpriv = priv->ppriv;
struct mlx5_eswitch_rep *rep = rpriv->rep;
if (rep->vport == MLX5_VPORT_UPLINK)
mlx5e_uplink_rep_update_hw_counters(priv);
else
mlx5e_vf_rep_update_hw_counters(priv);
}
static void mlx5e_rep_get_strings(struct net_device *dev,
u32 stringset, uint8_t *data)
{
@ -1908,8 +1882,20 @@ static unsigned int mlx5e_rep_stats_grps_num(struct mlx5e_priv *priv)
/* The stats groups order is opposite to the update_stats() order calls */
static mlx5e_stats_grp_t mlx5e_ul_rep_stats_grps[] = {
&MLX5E_STATS_GRP(sw_rep),
&MLX5E_STATS_GRP(vport_rep),
&MLX5E_STATS_GRP(sw),
&MLX5E_STATS_GRP(qcnt),
&MLX5E_STATS_GRP(vnic_env),
&MLX5E_STATS_GRP(vport),
&MLX5E_STATS_GRP(802_3),
&MLX5E_STATS_GRP(2863),
&MLX5E_STATS_GRP(2819),
&MLX5E_STATS_GRP(phy),
&MLX5E_STATS_GRP(eth_ext),
&MLX5E_STATS_GRP(pcie),
&MLX5E_STATS_GRP(per_prio),
&MLX5E_STATS_GRP(pme),
&MLX5E_STATS_GRP(channels),
&MLX5E_STATS_GRP(per_port_buff_congest),
};
static unsigned int mlx5e_ul_rep_stats_grps_num(struct mlx5e_priv *priv)

4
drivers/net/ethernet/mellanox/mlx5/core/en_stats.c
View File

@ -630,7 +630,7 @@ static MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(802_3)
#define MLX5_BASIC_PPCNT_SUPPORTED(mdev) \
(MLX5_CAP_GEN(mdev, pcam_reg) ? MLX5_CAP_PCAM_REG(mdev, ppcnt) : 1)
MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(802_3)
static MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(802_3)
{
struct mlx5e_pport_stats *pstats = &priv->stats.pport;
struct mlx5_core_dev *mdev = priv->mdev;
@ -1713,7 +1713,7 @@ MLX5E_DEFINE_STATS_GRP(per_prio, 0);
MLX5E_DEFINE_STATS_GRP(pme, 0);
MLX5E_DEFINE_STATS_GRP(channels, 0);
MLX5E_DEFINE_STATS_GRP(per_port_buff_congest, 0);
static MLX5E_DEFINE_STATS_GRP(eth_ext, 0);
MLX5E_DEFINE_STATS_GRP(eth_ext, 0);
static MLX5E_DEFINE_STATS_GRP(ipsec, 0);
static MLX5E_DEFINE_STATS_GRP(tls, 0);

3
drivers/net/ethernet/mellanox/mlx5/core/en_stats.h
View File

@ -376,8 +376,6 @@ struct mlx5e_stats {
extern mlx5e_stats_grp_t mlx5e_nic_stats_grps[];
unsigned int mlx5e_nic_stats_grps_num(struct mlx5e_priv *priv);
MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(802_3);
extern MLX5E_DECLARE_STATS_GRP(sw);
extern MLX5E_DECLARE_STATS_GRP(qcnt);
extern MLX5E_DECLARE_STATS_GRP(vnic_env);
@ -386,6 +384,7 @@ extern MLX5E_DECLARE_STATS_GRP(802_3);
extern MLX5E_DECLARE_STATS_GRP(2863);
extern MLX5E_DECLARE_STATS_GRP(2819);
extern MLX5E_DECLARE_STATS_GRP(phy);
extern MLX5E_DECLARE_STATS_GRP(eth_ext);
extern MLX5E_DECLARE_STATS_GRP(pcie);
extern MLX5E_DECLARE_STATS_GRP(per_prio);
extern MLX5E_DECLARE_STATS_GRP(pme);