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gpio: gpio-wcove: fix irq pending status bit width 

Whiskey cove PMIC has three GPIO banks with total number of 13 GPIO
pins. But when checking for the pending status, for_each_set_bit() uses
bit width of 7 and hence it only checks the status for first 7 GPIO pins
missing to check/clear the status of rest of the GPIO pins. This patch
fixes this issue.

Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Kuppuswamy Sathyanarayanan 2017-04-14 10:29:25 -07:00 committed by Linus Walleij
parent 5664aa1c9e
commit 7c2d176fe3
1 changed files with 1 additions and 1 deletions
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2
drivers/gpio/gpio-wcove.c
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@ -317,7 +317,7 @@ static irqreturn_t wcove_gpio_irq_handler(int irq, void *data)
while (pending) { while (pending) {
/* One iteration is for all pending bits */ /* One iteration is for all pending bits */
for_each_set_bit(gpio, (const unsigned long *)&pending, for_each_set_bit(gpio, (const unsigned long *)&pending,
GROUP0_NR_IRQS) { WCOVE_GPIO_NUM) {
offset = (gpio > GROUP0_NR_IRQS) ? 1 : 0; offset = (gpio > GROUP0_NR_IRQS) ? 1 : 0;
mask = (offset == 1) ? BIT(gpio - GROUP0_NR_IRQS) : mask = (offset == 1) ? BIT(gpio - GROUP0_NR_IRQS) :
BIT(gpio); BIT(gpio);