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staging: mt7621-pci: reagroup reset related macros all together 

Reset bits related macros are in different parts. Reagroup
all of them together to  improve readability.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Sergio Paracuellos 2018-11-04 11:49:35 +01:00 committed by Greg Kroah-Hartman
parent d9ecdd396c
commit 7bf10a7261
1 changed files with 3 additions and 2 deletions
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5
drivers/staging/mt7621-pci/pci-mt7621.c
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@ -45,6 +45,9 @@
#define RALINK_PCI_CONFIG_DATA 0x24 #define RALINK_PCI_CONFIG_DATA 0x24
#define RALINK_PCI_MEMBASE 0x28 #define RALINK_PCI_MEMBASE 0x28
#define RALINK_PCI_IOBASE 0x2C #define RALINK_PCI_IOBASE 0x2C
/* RALINK_RSTCTRL bits */
#define RALINK_PCIE_RST BIT(23)
#define RALINK_PCIE0_RST BIT(24) #define RALINK_PCIE0_RST BIT(24)
#define RALINK_PCIE1_RST BIT(25) #define RALINK_PCIE1_RST BIT(25)
#define RALINK_PCIE2_RST BIT(26) #define RALINK_PCIE2_RST BIT(26)
@ -74,8 +77,6 @@
#define RALINK_GPIOMODE 0x60 #define RALINK_GPIOMODE 0x60
#define RALINK_PCIE_CLK_GEN 0x7c #define RALINK_PCIE_CLK_GEN 0x7c
#define RALINK_PCIE_CLK_GEN1 0x80 #define RALINK_PCIE_CLK_GEN1 0x80
//RALINK_RSTCTRL bit
#define RALINK_PCIE_RST BIT(23)
#define MEMORY_BASE 0x0 #define MEMORY_BASE 0x0
static int pcie_link_status; static int pcie_link_status;