openrisc: provide dma_map_ops
This switches OpenRISC over to fully using the generic dma-mapping framework. This was almost already the case as the architecture's implementation was essentially a copy of the generic header. This also brings this architecture in line with the recent changes to dma_map_ops (adding attributes to ops->alloc). Signed-off-by: Jonas Bonn <jonas@southpole.se>
This commit is contained in:
parent
b0e026f4dc
commit
7b903e6c02
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@ -20,150 +20,71 @@
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/*
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* See Documentation/DMA-API-HOWTO.txt and
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* Documentation/DMA-API.txt for documentation.
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*
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* This file is written with the intention of eventually moving over
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* to largely using asm-generic/dma-mapping-common.h in its place.
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*/
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#include <linux/dma-debug.h>
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#include <asm-generic/dma-coherent.h>
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#include <linux/kmemcheck.h>
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#include <linux/dma-mapping.h>
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#define DMA_ERROR_CODE (~(dma_addr_t)0x0)
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extern struct dma_map_ops or1k_dma_map_ops;
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#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
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#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
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void *or1k_dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flag);
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void or1k_dma_free_coherent(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle);
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dma_addr_t or1k_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction dir,
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struct dma_attrs *attrs);
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void or1k_unmap_page(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction dir,
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struct dma_attrs *attrs);
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int or1k_map_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir,
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struct dma_attrs *attrs);
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void or1k_unmap_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir,
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struct dma_attrs *attrs);
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void or1k_sync_single_for_cpu(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction dir);
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void or1k_sync_single_for_device(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction dir);
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static inline void *dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flag)
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static inline struct dma_map_ops *get_dma_ops(struct device *dev)
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{
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return &or1k_dma_map_ops;
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}
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#include <asm-generic/dma-mapping-common.h>
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#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL)
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static inline void *dma_alloc_attrs(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp,
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struct dma_attrs *attrs)
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{
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struct dma_map_ops *ops = get_dma_ops(dev);
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void *memory;
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memory = or1k_dma_alloc_coherent(dev, size, dma_handle, flag);
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memory = ops->alloc(dev, size, dma_handle, gfp, attrs);
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debug_dma_alloc_coherent(dev, size, *dma_handle, memory);
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return memory;
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}
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static inline void dma_free_coherent(struct device *dev, size_t size,
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void *cpu_addr, dma_addr_t dma_handle)
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#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL)
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static inline void dma_free_attrs(struct device *dev, size_t size,
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void *cpu_addr, dma_addr_t dma_handle,
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struct dma_attrs *attrs)
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{
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struct dma_map_ops *ops = get_dma_ops(dev);
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debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
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or1k_dma_free_coherent(dev, size, cpu_addr, dma_handle);
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ops->free(dev, size, cpu_addr, dma_handle, attrs);
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}
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static inline dma_addr_t dma_map_single(struct device *dev, void *ptr,
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size_t size,
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enum dma_data_direction dir)
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static inline void *dma_alloc_noncoherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp)
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{
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dma_addr_t addr;
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struct dma_attrs attrs;
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kmemcheck_mark_initialized(ptr, size);
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BUG_ON(!valid_dma_direction(dir));
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addr = or1k_map_page(dev, virt_to_page(ptr),
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(unsigned long)ptr & ~PAGE_MASK, size,
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dir, NULL);
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debug_dma_map_page(dev, virt_to_page(ptr),
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(unsigned long)ptr & ~PAGE_MASK, size,
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dir, addr, true);
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return addr;
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dma_set_attr(DMA_ATTR_NON_CONSISTENT, &attrs);
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return dma_alloc_attrs(dev, size, dma_handle, gfp, &attrs);
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}
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static inline void dma_unmap_single(struct device *dev, dma_addr_t addr,
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size_t size,
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enum dma_data_direction dir)
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static inline void dma_free_noncoherent(struct device *dev, size_t size,
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void *cpu_addr, dma_addr_t dma_handle)
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{
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BUG_ON(!valid_dma_direction(dir));
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or1k_unmap_page(dev, addr, size, dir, NULL);
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debug_dma_unmap_page(dev, addr, size, dir, true);
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}
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struct dma_attrs attrs;
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static inline int dma_map_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir)
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{
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int i, ents;
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struct scatterlist *s;
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dma_set_attr(DMA_ATTR_NON_CONSISTENT, &attrs);
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for_each_sg(sg, s, nents, i)
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kmemcheck_mark_initialized(sg_virt(s), s->length);
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BUG_ON(!valid_dma_direction(dir));
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ents = or1k_map_sg(dev, sg, nents, dir, NULL);
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debug_dma_map_sg(dev, sg, nents, ents, dir);
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return ents;
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}
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static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir)
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{
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BUG_ON(!valid_dma_direction(dir));
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debug_dma_unmap_sg(dev, sg, nents, dir);
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or1k_unmap_sg(dev, sg, nents, dir, NULL);
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}
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static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
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size_t offset, size_t size,
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enum dma_data_direction dir)
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{
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dma_addr_t addr;
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kmemcheck_mark_initialized(page_address(page) + offset, size);
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BUG_ON(!valid_dma_direction(dir));
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addr = or1k_map_page(dev, page, offset, size, dir, NULL);
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debug_dma_map_page(dev, page, offset, size, dir, addr, false);
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return addr;
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}
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static inline void dma_unmap_page(struct device *dev, dma_addr_t addr,
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size_t size, enum dma_data_direction dir)
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{
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BUG_ON(!valid_dma_direction(dir));
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or1k_unmap_page(dev, addr, size, dir, NULL);
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debug_dma_unmap_page(dev, addr, size, dir, true);
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}
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static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr,
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size_t size,
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enum dma_data_direction dir)
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{
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BUG_ON(!valid_dma_direction(dir));
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or1k_sync_single_for_cpu(dev, addr, size, dir);
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debug_dma_sync_single_for_cpu(dev, addr, size, dir);
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}
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static inline void dma_sync_single_for_device(struct device *dev,
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dma_addr_t addr, size_t size,
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enum dma_data_direction dir)
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{
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BUG_ON(!valid_dma_direction(dir));
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or1k_sync_single_for_device(dev, addr, size, dir);
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debug_dma_sync_single_for_device(dev, addr, size, dir);
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dma_free_attrs(dev, size, cpu_addr, dma_handle, &attrs);
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}
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static inline int dma_supported(struct device *dev, u64 dma_mask)
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@ -21,13 +21,16 @@
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#include <linux/dma-mapping.h>
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#include <linux/dma-debug.h>
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#include <linux/export.h>
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#include <linux/dma-attrs.h>
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#include <asm/cpuinfo.h>
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#include <asm/spr_defs.h>
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#include <asm/tlbflush.h>
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static int page_set_nocache(pte_t *pte, unsigned long addr,
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unsigned long next, struct mm_walk *walk)
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static int
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page_set_nocache(pte_t *pte, unsigned long addr,
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unsigned long next, struct mm_walk *walk)
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{
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unsigned long cl;
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return 0;
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}
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static int page_clear_nocache(pte_t *pte, unsigned long addr,
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unsigned long next, struct mm_walk *walk)
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static int
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page_clear_nocache(pte_t *pte, unsigned long addr,
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unsigned long next, struct mm_walk *walk)
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{
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pte_val(*pte) &= ~_PAGE_CI;
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* cache-inhibit bit on those pages, and makes sure that the pages are
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* flushed out of the cache before they are used.
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*
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* If the NON_CONSISTENT attribute is set, then this function just
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* returns "normal", cachable memory.
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*
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* There are additional flags WEAK_ORDERING and WRITE_COMBINE to take
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* into consideration here, too. All current known implementations of
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* the OR1K support only strongly ordered memory accesses, so that flag
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* is being ignored for now; uncached but write-combined memory is a
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* missing feature of the OR1K.
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*/
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void *or1k_dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp)
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static void *
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or1k_dma_alloc(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp,
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struct dma_attrs *attrs)
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{
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unsigned long va;
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void *page;
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va = (unsigned long)page;
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/*
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* We need to iterate through the pages, clearing the dcache for
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* them and setting the cache-inhibit bit.
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*/
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if (walk_page_range(va, va + size, &walk)) {
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free_pages_exact(page, size);
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return NULL;
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if (!dma_get_attr(DMA_ATTR_NON_CONSISTENT, attrs)) {
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/*
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* We need to iterate through the pages, clearing the dcache for
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* them and setting the cache-inhibit bit.
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*/
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if (walk_page_range(va, va + size, &walk)) {
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free_pages_exact(page, size);
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return NULL;
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}
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}
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return (void *)va;
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}
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void or1k_dma_free_coherent(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle)
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static void
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or1k_dma_free(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle, struct dma_attrs *attrs)
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{
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unsigned long va = (unsigned long)vaddr;
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struct mm_walk walk = {
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.mm = &init_mm
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};
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/* walk_page_range shouldn't be able to fail here */
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WARN_ON(walk_page_range(va, va + size, &walk));
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if (!dma_get_attr(DMA_ATTR_NON_CONSISTENT, attrs)) {
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/* walk_page_range shouldn't be able to fail here */
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WARN_ON(walk_page_range(va, va + size, &walk));
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}
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free_pages_exact(vaddr, size);
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}
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dma_addr_t or1k_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction dir,
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struct dma_attrs *attrs)
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static dma_addr_t
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or1k_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction dir,
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struct dma_attrs *attrs)
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{
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unsigned long cl;
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dma_addr_t addr = page_to_phys(page) + offset;
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return addr;
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}
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void or1k_unmap_page(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction dir,
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struct dma_attrs *attrs)
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static void
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or1k_unmap_page(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction dir,
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struct dma_attrs *attrs)
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{
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/* Nothing special to do here... */
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}
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int or1k_map_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir,
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struct dma_attrs *attrs)
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static int
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or1k_map_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir,
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struct dma_attrs *attrs)
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{
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struct scatterlist *s;
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int i;
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return nents;
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}
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void or1k_unmap_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir,
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struct dma_attrs *attrs)
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static void
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or1k_unmap_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir,
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struct dma_attrs *attrs)
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{
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struct scatterlist *s;
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int i;
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}
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}
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void or1k_sync_single_for_cpu(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction dir)
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static void
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or1k_sync_single_for_cpu(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction dir)
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{
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unsigned long cl;
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dma_addr_t addr = dma_handle;
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mtspr(SPR_DCBIR, cl);
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}
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void or1k_sync_single_for_device(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction dir)
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static void
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or1k_sync_single_for_device(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction dir)
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{
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unsigned long cl;
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dma_addr_t addr = dma_handle;
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mtspr(SPR_DCBFR, cl);
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}
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struct dma_map_ops or1k_dma_map_ops = {
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.alloc = or1k_dma_alloc,
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.free = or1k_dma_free,
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.map_page = or1k_map_page,
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.unmap_page = or1k_unmap_page,
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.map_sg = or1k_map_sg,
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.unmap_sg = or1k_unmap_sg,
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.sync_single_for_cpu = or1k_sync_single_for_cpu,
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.sync_single_for_device = or1k_sync_single_for_device,
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};
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EXPORT_SYMBOL(or1k_dma_map_ops);
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/* Number of entries preallocated for DMA-API debugging */
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#define PREALLOC_DMA_DEBUG_ENTRIES (1 << 16)
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