PCI: remove printks about disabled bridge windows
I don't think there's enough value in the fact of a bridge window being disabled to justify cluttering the dmesg log with it. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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@ -288,10 +288,6 @@ static void __devinit pci_read_bridge_io(struct pci_bus *child)
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if (!res->end)
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res->end = limit + 0xfff;
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dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res);
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} else {
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dev_printk(KERN_DEBUG, &dev->dev,
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" bridge window [io %#06lx-%#06lx] (disabled)\n",
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base, limit);
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}
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}
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@ -312,10 +308,6 @@ static void __devinit pci_read_bridge_mmio(struct pci_bus *child)
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res->start = base;
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res->end = limit + 0xfffff;
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dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res);
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} else {
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dev_printk(KERN_DEBUG, &dev->dev,
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" bridge window [mem %#010lx-%#010lx] (disabled)\n",
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base, limit + 0xfffff);
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}
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}
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@ -363,10 +355,6 @@ static void __devinit pci_read_bridge_mmio_pref(struct pci_bus *child)
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res->start = base;
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res->end = limit + 0xfffff;
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dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res);
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} else {
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dev_printk(KERN_DEBUG, &dev->dev,
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" bridge window [mem %#010lx-%#010lx pref] (disabled)\n",
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base, limit + 0xfffff);
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}
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}
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@ -336,7 +336,6 @@ static void pci_setup_bridge_io(struct pci_bus *bus)
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/* Clear upper 16 bits of I/O base/limit. */
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io_upper16 = 0;
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l = 0x00f0;
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dev_info(&bridge->dev, " bridge window [io disabled]\n");
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}
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/* Temporarily disable the I/O range before updating PCI_IO_BASE. */
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pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, 0x0000ffff);
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@ -362,7 +361,6 @@ static void pci_setup_bridge_mmio(struct pci_bus *bus)
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dev_info(&bridge->dev, " bridge window %pR\n", res);
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} else {
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l = 0x0000fff0;
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dev_info(&bridge->dev, " bridge window [mem disabled]\n");
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}
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pci_write_config_dword(bridge, PCI_MEMORY_BASE, l);
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}
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@ -393,7 +391,6 @@ static void pci_setup_bridge_mmio_pref(struct pci_bus *bus)
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dev_info(&bridge->dev, " bridge window %pR\n", res);
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} else {
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l = 0x0000fff0;
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dev_info(&bridge->dev, " bridge window [mem pref disabled]\n");
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}
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pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, l);
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