ARM: dts: uniphier: fix size of sdctrl nodes
All registers are located within 0x400 size from the base address. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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@ -292,7 +292,7 @@
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sdctrl@59810000 {
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sdctrl@59810000 {
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compatible = "socionext,uniphier-pro5-sdctrl",
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compatible = "socionext,uniphier-pro5-sdctrl",
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"simple-mfd", "syscon";
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"simple-mfd", "syscon";
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reg = <0x59810000 0x800>;
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reg = <0x59810000 0x400>;
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sd_clk: clock {
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sd_clk: clock {
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compatible = "socionext,uniphier-pro5-sd-clock";
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compatible = "socionext,uniphier-pro5-sd-clock";
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@ -276,7 +276,7 @@
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sdctrl@59810000 {
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sdctrl@59810000 {
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compatible = "socionext,uniphier-pxs2-sdctrl",
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compatible = "socionext,uniphier-pxs2-sdctrl",
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"simple-mfd", "syscon";
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"simple-mfd", "syscon";
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reg = <0x59810000 0x800>;
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reg = <0x59810000 0x400>;
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sd_clk: clock {
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sd_clk: clock {
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compatible = "socionext,uniphier-pxs2-sd-clock";
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compatible = "socionext,uniphier-pxs2-sd-clock";
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