MIPS: io: fix sparse flood on asm/io.h
MIPS MMIO macros for byteswapping from/to hardware endianness are a bit tricky because they use cpu_to_le{16,32,64}() in both directions. This generates a lot of questions from sparse as __le{16,32,64} types are 'restricted' and direct cast is forbidden in order to prevent messing up the byteorder. As MMIO ops are used in almost every single driver, this leads to console flooding and complicates bug hunting. We could fix it in a more proper way, i.e. separate from device / to device byteswap macros and expand __BUILD_MEMORY_*(), but this seems redundant and will produce code duplication. Instead, just expand the existing *ioswab*() macros with forced typecasting to stop floods. Signed-off-by: Alexander Lobakin <alobakin@pm.me> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
This commit is contained in:
parent
3612485bf4
commit
7b5f96949d
|
@ -48,11 +48,17 @@ static inline bool __should_swizzle_addr(u64 p)
|
|||
|
||||
# define ioswabb(a, x) (x)
|
||||
# define __mem_ioswabb(a, x) (x)
|
||||
# define ioswabw(a, x) (__should_swizzle_bits(a) ? le16_to_cpu(x) : x)
|
||||
# define ioswabw(a, x) (__should_swizzle_bits(a) ? \
|
||||
le16_to_cpu((__force __le16)(x)) : \
|
||||
(x))
|
||||
# define __mem_ioswabw(a, x) (x)
|
||||
# define ioswabl(a, x) (__should_swizzle_bits(a) ? le32_to_cpu(x) : x)
|
||||
# define ioswabl(a, x) (__should_swizzle_bits(a) ? \
|
||||
le32_to_cpu((__force __le32)(x)) : \
|
||||
(x))
|
||||
# define __mem_ioswabl(a, x) (x)
|
||||
# define ioswabq(a, x) (__should_swizzle_bits(a) ? le64_to_cpu(x) : x)
|
||||
# define ioswabq(a, x) (__should_swizzle_bits(a) ? \
|
||||
le64_to_cpu((__force __le64)(x)) : \
|
||||
(x))
|
||||
# define __mem_ioswabq(a, x) (x)
|
||||
|
||||
#endif /* __ASM_MACH_GENERIC_MANGLE_PORT_H */
|
||||
|
|
|
@ -29,11 +29,11 @@
|
|||
|
||||
# define ioswabb(a, x) (x)
|
||||
# define __mem_ioswabb(a, x) (x)
|
||||
# define ioswabw(a, x) le16_to_cpu(x)
|
||||
# define ioswabw(a, x) le16_to_cpu((__force __le16)(x))
|
||||
# define __mem_ioswabw(a, x) (x)
|
||||
# define ioswabl(a, x) le32_to_cpu(x)
|
||||
# define ioswabl(a, x) le32_to_cpu((__force __le32)(x))
|
||||
# define __mem_ioswabl(a, x) (x)
|
||||
# define ioswabq(a, x) le64_to_cpu(x)
|
||||
# define ioswabq(a, x) le64_to_cpu((__force __le64)(x))
|
||||
# define __mem_ioswabq(a, x) (x)
|
||||
|
||||
#else
|
||||
|
@ -41,11 +41,11 @@
|
|||
# define ioswabb(a, x) (x)
|
||||
# define __mem_ioswabb(a, x) (x)
|
||||
# define ioswabw(a, x) (x)
|
||||
# define __mem_ioswabw(a, x) cpu_to_le16(x)
|
||||
# define __mem_ioswabw(a, x) ((__force u16)cpu_to_le16(x))
|
||||
# define ioswabl(a, x) (x)
|
||||
# define __mem_ioswabl(a, x) cpu_to_le32(x)
|
||||
# define __mem_ioswabl(a, x) ((__force u32)cpu_to_le32(x))
|
||||
# define ioswabq(a, x) (x)
|
||||
# define __mem_ioswabq(a, x) cpu_to_le64(x)
|
||||
# define __mem_ioswabq(a, x) ((__force u64)cpu_to_le64(x))
|
||||
|
||||
#endif
|
||||
|
||||
|
|
|
@ -16,10 +16,10 @@
|
|||
# define ioswabb(a, x) (x)
|
||||
# define __mem_ioswabb(a, x) (x)
|
||||
# define ioswabw(a, x) (x)
|
||||
# define __mem_ioswabw(a, x) cpu_to_le16(x)
|
||||
# define __mem_ioswabw(a, x) ((__force u16)cpu_to_le16(x))
|
||||
# define ioswabl(a, x) (x)
|
||||
# define __mem_ioswabl(a, x) cpu_to_le32(x)
|
||||
# define __mem_ioswabl(a, x) ((__force u32)cpu_to_le32(x))
|
||||
# define ioswabq(a, x) (x)
|
||||
# define __mem_ioswabq(a, x) cpu_to_le64(x)
|
||||
# define __mem_ioswabq(a, x) ((__force u64)cpu_to_le64(x))
|
||||
|
||||
#endif /* __ASM_MACH_IP27_MANGLE_PORT_H */
|
||||
|
|
|
@ -13,10 +13,10 @@
|
|||
#define ioswabb(a, x) (x)
|
||||
#define __mem_ioswabb(a, x) (x)
|
||||
#define ioswabw(a, x) (x)
|
||||
#define __mem_ioswabw(a, x) cpu_to_le16(x)
|
||||
#define __mem_ioswabw(a, x) ((__force u16)cpu_to_le16(x))
|
||||
#define ioswabl(a, x) (x)
|
||||
#define __mem_ioswabl(a, x) cpu_to_le32(x)
|
||||
#define __mem_ioswabl(a, x) ((__force u32)cpu_to_le32(x))
|
||||
#define ioswabq(a, x) (x)
|
||||
#define __mem_ioswabq(a, x) cpu_to_le64(x)
|
||||
#define __mem_ioswabq(a, x) ((__force u64)cpu_to_le64(x))
|
||||
|
||||
#endif /* __ASM_MACH_IP30_MANGLE_PORT_H */
|
||||
|
|
|
@ -17,10 +17,10 @@
|
|||
# define ioswabb(a, x) (x)
|
||||
# define __mem_ioswabb(a, x) (x)
|
||||
# define ioswabw(a, x) (x)
|
||||
# define __mem_ioswabw(a, x) cpu_to_le16(x)
|
||||
# define __mem_ioswabw(a, x) ((__force u16)cpu_to_le16(x))
|
||||
# define ioswabl(a, x) (x)
|
||||
# define __mem_ioswabl(a, x) cpu_to_le32(x)
|
||||
# define __mem_ioswabl(a, x) ((__force u32)cpu_to_le32(x))
|
||||
# define ioswabq(a, x) (x)
|
||||
# define __mem_ioswabq(a, x) cpu_to_le64(x)
|
||||
# define __mem_ioswabq(a, x) ((__force u64)cpu_to_le64(x))
|
||||
|
||||
#endif /* __ASM_MACH_IP32_MANGLE_PORT_H */
|
||||
|
|
|
@ -14,11 +14,11 @@ extern unsigned long (*__swizzle_addr_b)(unsigned long port);
|
|||
|
||||
#define ioswabb(a, x) (x)
|
||||
#define __mem_ioswabb(a, x) (x)
|
||||
#define ioswabw(a, x) le16_to_cpu(x)
|
||||
#define ioswabw(a, x) le16_to_cpu((__force __le16)(x))
|
||||
#define __mem_ioswabw(a, x) (x)
|
||||
#define ioswabl(a, x) le32_to_cpu(x)
|
||||
#define ioswabl(a, x) le32_to_cpu((__force __le32)(x))
|
||||
#define __mem_ioswabl(a, x) (x)
|
||||
#define ioswabq(a, x) le64_to_cpu(x)
|
||||
#define ioswabq(a, x) le64_to_cpu((__force __le64)(x))
|
||||
#define __mem_ioswabq(a, x) (x)
|
||||
|
||||
#endif /* __ASM_MACH_TX39XX_MANGLE_PORT_H */
|
||||
|
|
|
@ -16,12 +16,12 @@
|
|||
extern u16 (*ioswabw)(volatile u16 *a, u16 x);
|
||||
extern u16 (*__mem_ioswabw)(volatile u16 *a, u16 x);
|
||||
#else
|
||||
#define ioswabw(a, x) le16_to_cpu(x)
|
||||
#define ioswabw(a, x) le16_to_cpu((__force __le16)(x))
|
||||
#define __mem_ioswabw(a, x) (x)
|
||||
#endif
|
||||
#define ioswabl(a, x) le32_to_cpu(x)
|
||||
#define ioswabl(a, x) le32_to_cpu((__force __le32)(x))
|
||||
#define __mem_ioswabl(a, x) (x)
|
||||
#define ioswabq(a, x) le64_to_cpu(x)
|
||||
#define ioswabq(a, x) le64_to_cpu((__force __le64)(x))
|
||||
#define __mem_ioswabq(a, x) (x)
|
||||
|
||||
#endif /* __ASM_MACH_TX49XX_MANGLE_PORT_H */
|
||||
|
|
Loading…
Reference in New Issue