clk: renesas: rcar-gen2: Switch Z clock to .determine_rate()
As the .round_rate() callback returns a long clock rate, it cannot return clock rates that do not fit in signed long, but do fit in unsigned long. Hence switch the Z clock on R-Car Gen2 from the old .round_rate() callback to the newer .determine_rate() callback, which does not suffer from this limitation. This includes implementing range checking. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20190830134515.11925-7-geert+renesas@glider.be
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@ -63,19 +63,22 @@ static unsigned long cpg_z_clk_recalc_rate(struct clk_hw *hw,
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return div_u64((u64)parent_rate * mult, 32);
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}
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static long cpg_z_clk_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *parent_rate)
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static int cpg_z_clk_determine_rate(struct clk_hw *hw,
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struct clk_rate_request *req)
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{
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unsigned long prate = *parent_rate;
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unsigned int mult;
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unsigned long prate = req->best_parent_rate;
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unsigned int min_mult, max_mult, mult;
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if (!prate)
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prate = 1;
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min_mult = max(div64_ul(req->min_rate * 32ULL, prate), 1ULL);
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max_mult = min(div64_ul(req->max_rate * 32ULL, prate), 32ULL);
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if (max_mult < min_mult)
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return -EINVAL;
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mult = div64_ul(rate * 32ULL, prate);
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mult = clamp(mult, 1U, 32U);
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mult = div64_ul(req->rate * 32ULL, prate);
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mult = clamp(mult, min_mult, max_mult);
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return div_u64((u64)*parent_rate * mult, 32);
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req->rate = div_u64((u64)prate * mult, 32);
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return 0;
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}
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static int cpg_z_clk_set_rate(struct clk_hw *hw, unsigned long rate,
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@ -126,7 +129,7 @@ static int cpg_z_clk_set_rate(struct clk_hw *hw, unsigned long rate,
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static const struct clk_ops cpg_z_clk_ops = {
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.recalc_rate = cpg_z_clk_recalc_rate,
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.round_rate = cpg_z_clk_round_rate,
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.determine_rate = cpg_z_clk_determine_rate,
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.set_rate = cpg_z_clk_set_rate,
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};
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