ixgbe: Drop unused code for setting up unicast addresses
This change removes the unused code that was setting up the uc_addr_list. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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80960ab040
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79d5892521
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@ -1198,7 +1198,6 @@ static struct ixgbe_mac_operations mac_ops_82598 = {
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.set_vmdq = &ixgbe_set_vmdq_82598,
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.clear_vmdq = &ixgbe_clear_vmdq_82598,
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.init_rx_addrs = &ixgbe_init_rx_addrs_generic,
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.update_uc_addr_list = &ixgbe_update_uc_addr_list_generic,
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.update_mc_addr_list = &ixgbe_update_mc_addr_list_generic,
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.enable_mc = &ixgbe_enable_mc_generic,
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.disable_mc = &ixgbe_disable_mc_generic,
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@ -2035,7 +2035,6 @@ static struct ixgbe_mac_operations mac_ops_82599 = {
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.set_vmdq = &ixgbe_set_vmdq_generic,
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.clear_vmdq = &ixgbe_clear_vmdq_generic,
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.init_rx_addrs = &ixgbe_init_rx_addrs_generic,
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.update_uc_addr_list = &ixgbe_update_uc_addr_list_generic,
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.update_mc_addr_list = &ixgbe_update_mc_addr_list_generic,
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.enable_mc = &ixgbe_enable_mc_generic,
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.disable_mc = &ixgbe_disable_mc_generic,
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@ -47,7 +47,6 @@ static void ixgbe_lower_eeprom_clk(struct ixgbe_hw *hw, u32 *eec);
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static void ixgbe_release_eeprom(struct ixgbe_hw *hw);
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static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr);
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static void ixgbe_add_uc_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq);
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static s32 ixgbe_setup_fc(struct ixgbe_hw *hw, s32 packetbuf_num);
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/**
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@ -1366,104 +1365,6 @@ s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw)
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return 0;
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}
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/**
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* ixgbe_add_uc_addr - Adds a secondary unicast address.
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* @hw: pointer to hardware structure
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* @addr: new address
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*
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* Adds it to unused receive address register or goes into promiscuous mode.
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**/
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static void ixgbe_add_uc_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
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{
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u32 rar_entries = hw->mac.num_rar_entries;
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u32 rar;
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hw_dbg(hw, " UC Addr = %.2X %.2X %.2X %.2X %.2X %.2X\n",
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addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]);
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/*
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* Place this address in the RAR if there is room,
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* else put the controller into promiscuous mode
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*/
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if (hw->addr_ctrl.rar_used_count < rar_entries) {
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rar = hw->addr_ctrl.rar_used_count;
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hw->mac.ops.set_rar(hw, rar, addr, vmdq, IXGBE_RAH_AV);
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hw_dbg(hw, "Added a secondary address to RAR[%d]\n", rar);
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hw->addr_ctrl.rar_used_count++;
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} else {
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hw->addr_ctrl.overflow_promisc++;
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}
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hw_dbg(hw, "ixgbe_add_uc_addr Complete\n");
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}
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/**
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* ixgbe_update_uc_addr_list_generic - Updates MAC list of secondary addresses
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* @hw: pointer to hardware structure
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* @netdev: pointer to net device structure
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*
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* The given list replaces any existing list. Clears the secondary addrs from
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* receive address registers. Uses unused receive address registers for the
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* first secondary addresses, and falls back to promiscuous mode as needed.
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*
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* Drivers using secondary unicast addresses must set user_set_promisc when
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* manually putting the device into promiscuous mode.
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**/
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s32 ixgbe_update_uc_addr_list_generic(struct ixgbe_hw *hw,
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struct net_device *netdev)
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{
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u32 i;
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u32 old_promisc_setting = hw->addr_ctrl.overflow_promisc;
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u32 uc_addr_in_use;
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u32 fctrl;
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struct netdev_hw_addr *ha;
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/*
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* Clear accounting of old secondary address list,
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* don't count RAR[0]
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*/
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uc_addr_in_use = hw->addr_ctrl.rar_used_count - 1;
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hw->addr_ctrl.rar_used_count -= uc_addr_in_use;
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hw->addr_ctrl.overflow_promisc = 0;
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/* Zero out the other receive addresses */
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hw_dbg(hw, "Clearing RAR[1-%d]\n", uc_addr_in_use + 1);
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for (i = 0; i < uc_addr_in_use; i++) {
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IXGBE_WRITE_REG(hw, IXGBE_RAL(1+i), 0);
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IXGBE_WRITE_REG(hw, IXGBE_RAH(1+i), 0);
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}
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/* Add the new addresses */
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netdev_for_each_uc_addr(ha, netdev) {
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hw_dbg(hw, " Adding the secondary addresses:\n");
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ixgbe_add_uc_addr(hw, ha->addr, 0);
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}
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if (hw->addr_ctrl.overflow_promisc) {
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/* enable promisc if not already in overflow or set by user */
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if (!old_promisc_setting && !hw->addr_ctrl.user_set_promisc) {
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hw_dbg(hw, " Entering address overflow promisc mode\n");
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fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
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fctrl |= IXGBE_FCTRL_UPE;
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IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
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hw->addr_ctrl.uc_set_promisc = true;
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}
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} else {
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/* only disable if set by overflow, not by user */
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if ((old_promisc_setting && hw->addr_ctrl.uc_set_promisc) &&
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!(hw->addr_ctrl.user_set_promisc)) {
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hw_dbg(hw, " Leaving address overflow promisc mode\n");
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fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
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fctrl &= ~IXGBE_FCTRL_UPE;
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IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
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hw->addr_ctrl.uc_set_promisc = false;
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}
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}
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hw_dbg(hw, "ixgbe_update_uc_addr_list_generic Complete\n");
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return 0;
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}
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/**
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* ixgbe_mta_vector - Determines bit-vector in multicast table to set
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* @hw: pointer to hardware structure
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@ -63,8 +63,6 @@ s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index);
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s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw);
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s32 ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw,
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struct net_device *netdev);
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s32 ixgbe_update_uc_addr_list_generic(struct ixgbe_hw *hw,
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struct net_device *netdev);
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s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw);
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s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw);
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s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval);
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@ -2517,7 +2517,6 @@ struct ixgbe_mac_operations {
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s32 (*set_vmdq)(struct ixgbe_hw *, u32, u32);
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s32 (*clear_vmdq)(struct ixgbe_hw *, u32, u32);
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s32 (*init_rx_addrs)(struct ixgbe_hw *);
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s32 (*update_uc_addr_list)(struct ixgbe_hw *, struct net_device *);
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s32 (*update_mc_addr_list)(struct ixgbe_hw *, struct net_device *);
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s32 (*enable_mc)(struct ixgbe_hw *);
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s32 (*disable_mc)(struct ixgbe_hw *);
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@ -686,7 +686,6 @@ static struct ixgbe_mac_operations mac_ops_X540 = {
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.set_vmdq = &ixgbe_set_vmdq_generic,
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.clear_vmdq = &ixgbe_clear_vmdq_generic,
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.init_rx_addrs = &ixgbe_init_rx_addrs_generic,
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.update_uc_addr_list = &ixgbe_update_uc_addr_list_generic,
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.update_mc_addr_list = &ixgbe_update_mc_addr_list_generic,
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.enable_mc = &ixgbe_enable_mc_generic,
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.disable_mc = &ixgbe_disable_mc_generic,
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