x86, realmode: Mask out EFER.LMA when saving trampoline EFER
Some AMD processors apparently #GP(0) if EFER.LMA is set in WRMSR, rather than ignoring it. Thus, we need to mask it out. Reported-by: Ingo Molnar <mingo@kernel.org> Tested-by: Borislav Petkov <bp@alien8.de> Cc: Jarkko Sakkinen <jarkko.sakkinen@intel.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> Link: http://lkml.kernel.org/r/1336501366-28617-24-git-send-email-jarkko.sakkinen@intel.com
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@ -22,6 +22,7 @@ void __init setup_real_mode(void)
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size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob);
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size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob);
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#ifdef CONFIG_X86_64
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#ifdef CONFIG_X86_64
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u64 *trampoline_pgd;
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u64 *trampoline_pgd;
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u32 efer_low, efer_high;
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#endif
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#endif
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/* Has to be in very low memory so we can execute real-mode AP code. */
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/* Has to be in very low memory so we can execute real-mode AP code. */
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@ -65,9 +66,13 @@ void __init setup_real_mode(void)
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trampoline_header->gdt_limit = __BOOT_DS + 7;
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trampoline_header->gdt_limit = __BOOT_DS + 7;
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trampoline_header->gdt_base = __pa(boot_gdt);
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trampoline_header->gdt_base = __pa(boot_gdt);
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#else
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#else
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if (rdmsr_safe(MSR_EFER, &trampoline_header->efer_low,
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/*
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&trampoline_header->efer_high))
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* Some AMD processors will #GP(0) if EFER.LMA is set in WRMSR
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BUG();
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* so we need to mask it out.
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*/
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rdmsr(MSR_EFER, efer_low, efer_high);
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trampoline_header->efer_low = efer_low & ~EFER_LMA;
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trampoline_header->efer_high = efer_high;
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trampoline_header->start = (u64) secondary_startup_64;
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trampoline_header->start = (u64) secondary_startup_64;
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trampoline_cr4_features = &trampoline_header->cr4;
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trampoline_cr4_features = &trampoline_header->cr4;
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