sparc64: remove macro indirection in io_64.h
Most likely for historical reasons io_64.h used an
extra layer of macro indirections.
Fix it so we no longer use these indirections.
In the process we loose a cast to the addr argument for in*()/out*()
but all known affected users has already been fixed so
no warnings are triggered.
For each of the IO functions add a proper define like this:
#define inb inb
This is done to make the code compatible with the way these
functions are defined in asm-generic/io.h with the objective
to later introduce the generic io.h for sparc64.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Sam Ravnborg
David S. Miller
parent
6b8b5507ed
commit
79294d7eff
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@ -16,7 +16,8 @@
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/* BIO layer definitions. */
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extern unsigned long kern_base, kern_size;
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static inline u8 _inb(unsigned long addr)
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#define inb inb
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static inline u8 inb(unsigned long addr)
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{
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u8 ret;
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@ -28,7 +29,8 @@ static inline u8 _inb(unsigned long addr)
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return ret;
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}
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static inline u16 _inw(unsigned long addr)
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#define inw inw
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static inline u16 inw(unsigned long addr)
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{
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u16 ret;
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@ -40,7 +42,8 @@ static inline u16 _inw(unsigned long addr)
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return ret;
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}
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static inline u32 _inl(unsigned long addr)
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#define inl inl
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static inline u32 inl(unsigned long addr)
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{
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u32 ret;
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@ -52,7 +55,8 @@ static inline u32 _inl(unsigned long addr)
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return ret;
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}
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static inline void _outb(u8 b, unsigned long addr)
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#define outb outb
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static inline void outb(u8 b, unsigned long addr)
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{
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__asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_outb */"
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: /* no outputs */
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@ -60,7 +64,8 @@ static inline void _outb(u8 b, unsigned long addr)
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: "memory");
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}
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static inline void _outw(u16 w, unsigned long addr)
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#define outw outw
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static inline void outw(u16 w, unsigned long addr)
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{
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__asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_outw */"
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: /* no outputs */
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@ -68,7 +73,8 @@ static inline void _outw(u16 w, unsigned long addr)
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: "memory");
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}
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static inline void _outl(u32 l, unsigned long addr)
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#define outl outl
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static inline void outl(u32 l, unsigned long addr)
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{
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__asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_outl */"
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: /* no outputs */
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@ -76,12 +82,6 @@ static inline void _outl(u32 l, unsigned long addr)
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: "memory");
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}
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#define inb(__addr) (_inb((unsigned long)(__addr)))
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#define inw(__addr) (_inw((unsigned long)(__addr)))
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#define inl(__addr) (_inl((unsigned long)(__addr)))
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#define outb(__b, __addr) (_outb((u8)(__b), (unsigned long)(__addr)))
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#define outw(__w, __addr) (_outw((u16)(__w), (unsigned long)(__addr)))
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#define outl(__l, __addr) (_outl((u32)(__l), (unsigned long)(__addr)))
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#define inb_p(__addr) inb(__addr)
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#define outb_p(__b, __addr) outb(__b, __addr)
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@ -127,7 +127,8 @@ static inline void iowrite32_rep(void __iomem *port, const void *buf, unsigned l
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}
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/* Memory functions, same as I/O accesses on Ultra. */
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static inline u8 _readb(const volatile void __iomem *addr)
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#define readb readb
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static inline u8 readb(const volatile void __iomem *addr)
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{ u8 ret;
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__asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_readb */"
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@ -137,7 +138,8 @@ static inline u8 _readb(const volatile void __iomem *addr)
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return ret;
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}
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static inline u16 _readw(const volatile void __iomem *addr)
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#define readw readw
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static inline u16 readw(const volatile void __iomem *addr)
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{ u16 ret;
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__asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_readw */"
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@ -148,7 +150,8 @@ static inline u16 _readw(const volatile void __iomem *addr)
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return ret;
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}
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static inline u32 _readl(const volatile void __iomem *addr)
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#define readl readl
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static inline u32 readl(const volatile void __iomem *addr)
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{ u32 ret;
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__asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_readl */"
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@ -159,7 +162,8 @@ static inline u32 _readl(const volatile void __iomem *addr)
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return ret;
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}
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static inline u64 _readq(const volatile void __iomem *addr)
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#define readq readq
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static inline u64 readq(const volatile void __iomem *addr)
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{ u64 ret;
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__asm__ __volatile__("ldxa\t[%1] %2, %0\t/* pci_readq */"
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@ -170,7 +174,8 @@ static inline u64 _readq(const volatile void __iomem *addr)
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return ret;
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}
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static inline void _writeb(u8 b, volatile void __iomem *addr)
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#define writeb writeb
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static inline void writeb(u8 b, volatile void __iomem *addr)
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{
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__asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_writeb */"
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: /* no outputs */
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@ -178,7 +183,8 @@ static inline void _writeb(u8 b, volatile void __iomem *addr)
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: "memory");
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}
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static inline void _writew(u16 w, volatile void __iomem *addr)
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#define writew writew
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static inline void writew(u16 w, volatile void __iomem *addr)
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{
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__asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_writew */"
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: /* no outputs */
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@ -186,7 +192,8 @@ static inline void _writew(u16 w, volatile void __iomem *addr)
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: "memory");
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}
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static inline void _writel(u32 l, volatile void __iomem *addr)
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#define writel writel
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static inline void writel(u32 l, volatile void __iomem *addr)
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{
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__asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_writel */"
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: /* no outputs */
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@ -194,7 +201,8 @@ static inline void _writel(u32 l, volatile void __iomem *addr)
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: "memory");
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}
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static inline void _writeq(u64 q, volatile void __iomem *addr)
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#define writeq writeq
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static inline void writeq(u64 q, volatile void __iomem *addr)
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{
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__asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_writeq */"
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: /* no outputs */
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@ -202,21 +210,14 @@ static inline void _writeq(u64 q, volatile void __iomem *addr)
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: "memory");
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}
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#define readb(__addr) _readb(__addr)
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#define readw(__addr) _readw(__addr)
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#define readl(__addr) _readl(__addr)
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#define readq(__addr) _readq(__addr)
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#define readb_relaxed(__addr) _readb(__addr)
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#define readw_relaxed(__addr) _readw(__addr)
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#define readl_relaxed(__addr) _readl(__addr)
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#define readq_relaxed(__addr) _readq(__addr)
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#define writeb(__b, __addr) _writeb(__b, __addr)
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#define writew(__w, __addr) _writew(__w, __addr)
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#define writel(__l, __addr) _writel(__l, __addr)
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#define writeq(__q, __addr) _writeq(__q, __addr)
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#define readb_relaxed(__addr) readb(__addr)
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#define readw_relaxed(__addr) readw(__addr)
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#define readl_relaxed(__addr) readl(__addr)
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#define readq_relaxed(__addr) readq(__addr)
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/* Now versions without byte-swapping. */
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static inline u8 _raw_readb(unsigned long addr)
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#define __raw_readb __raw_readb
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static inline u8 __raw_readb(const volatile void __iomem *addr)
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{
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u8 ret;
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@ -227,7 +228,8 @@ static inline u8 _raw_readb(unsigned long addr)
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return ret;
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}
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static inline u16 _raw_readw(unsigned long addr)
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#define __raw_readw __raw_readw
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static inline u16 __raw_readw(const volatile void __iomem *addr)
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{
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u16 ret;
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@ -238,7 +240,8 @@ static inline u16 _raw_readw(unsigned long addr)
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return ret;
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}
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static inline u32 _raw_readl(unsigned long addr)
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#define __raw_readl __raw_readl
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static inline u32 __raw_readl(const volatile void __iomem *addr)
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{
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u32 ret;
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@ -249,7 +252,8 @@ static inline u32 _raw_readl(unsigned long addr)
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return ret;
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}
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static inline u64 _raw_readq(unsigned long addr)
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#define __raw_readq __raw_readq
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static inline u64 __raw_readq(const volatile void __iomem *addr)
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{
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u64 ret;
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@ -260,42 +264,38 @@ static inline u64 _raw_readq(unsigned long addr)
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return ret;
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}
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static inline void _raw_writeb(u8 b, unsigned long addr)
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#define __raw_writeb __raw_writeb
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static inline void __raw_writeb(u8 b, const volatile void __iomem *addr)
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{
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__asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_raw_writeb */"
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: /* no outputs */
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: "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
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}
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static inline void _raw_writew(u16 w, unsigned long addr)
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#define __raw_writew __raw_writew
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static inline void __raw_writew(u16 w, const volatile void __iomem *addr)
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{
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__asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_raw_writew */"
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: /* no outputs */
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: "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
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}
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static inline void _raw_writel(u32 l, unsigned long addr)
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#define __raw_writel __raw_writel
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static inline void __raw_writel(u32 l, const volatile void __iomem *addr)
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{
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__asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_raw_writel */"
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: /* no outputs */
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: "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
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}
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static inline void _raw_writeq(u64 q, unsigned long addr)
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#define __raw_writeq __raw_writeq
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static inline void __raw_writeq(u64 q, const volatile void __iomem *addr)
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{
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__asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_raw_writeq */"
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: /* no outputs */
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: "Jr" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
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}
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#define __raw_readb(__addr) (_raw_readb((unsigned long)(__addr)))
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#define __raw_readw(__addr) (_raw_readw((unsigned long)(__addr)))
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#define __raw_readl(__addr) (_raw_readl((unsigned long)(__addr)))
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#define __raw_readq(__addr) (_raw_readq((unsigned long)(__addr)))
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#define __raw_writeb(__b, __addr) (_raw_writeb((u8)(__b), (unsigned long)(__addr)))
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#define __raw_writew(__w, __addr) (_raw_writew((u16)(__w), (unsigned long)(__addr)))
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#define __raw_writel(__l, __addr) (_raw_writel((u32)(__l), (unsigned long)(__addr)))
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#define __raw_writeq(__q, __addr) (_raw_writeq((u64)(__q), (unsigned long)(__addr)))
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/* Valid I/O Space regions are anywhere, because each PCI bus supported
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* can live in an arbitrary area of the physical address range.
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@ -305,7 +305,7 @@ static inline void _raw_writeq(u64 q, unsigned long addr)
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/* Now, SBUS variants, only difference from PCI is that we do
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* not use little-endian ASIs.
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*/
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static inline u8 _sbus_readb(const volatile void __iomem *addr)
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static inline u8 sbus_readb(const volatile void __iomem *addr)
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{
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u8 ret;
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@ -317,7 +317,7 @@ static inline u8 _sbus_readb(const volatile void __iomem *addr)
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return ret;
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}
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static inline u16 _sbus_readw(const volatile void __iomem *addr)
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static inline u16 sbus_readw(const volatile void __iomem *addr)
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{
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u16 ret;
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@ -329,7 +329,7 @@ static inline u16 _sbus_readw(const volatile void __iomem *addr)
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return ret;
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}
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static inline u32 _sbus_readl(const volatile void __iomem *addr)
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static inline u32 sbus_readl(const volatile void __iomem *addr)
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{
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u32 ret;
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@ -341,7 +341,7 @@ static inline u32 _sbus_readl(const volatile void __iomem *addr)
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return ret;
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}
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static inline u64 _sbus_readq(const volatile void __iomem *addr)
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static inline u64 sbus_readq(const volatile void __iomem *addr)
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{
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u64 ret;
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@ -353,7 +353,7 @@ static inline u64 _sbus_readq(const volatile void __iomem *addr)
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return ret;
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}
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static inline void _sbus_writeb(u8 b, volatile void __iomem *addr)
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static inline void sbus_writeb(u8 b, volatile void __iomem *addr)
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{
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__asm__ __volatile__("stba\t%r0, [%1] %2\t/* sbus_writeb */"
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: /* no outputs */
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@ -361,7 +361,7 @@ static inline void _sbus_writeb(u8 b, volatile void __iomem *addr)
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: "memory");
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}
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static inline void _sbus_writew(u16 w, volatile void __iomem *addr)
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static inline void sbus_writew(u16 w, volatile void __iomem *addr)
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{
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__asm__ __volatile__("stha\t%r0, [%1] %2\t/* sbus_writew */"
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: /* no outputs */
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@ -369,7 +369,7 @@ static inline void _sbus_writew(u16 w, volatile void __iomem *addr)
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: "memory");
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}
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static inline void _sbus_writel(u32 l, volatile void __iomem *addr)
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static inline void sbus_writel(u32 l, volatile void __iomem *addr)
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{
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__asm__ __volatile__("stwa\t%r0, [%1] %2\t/* sbus_writel */"
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: /* no outputs */
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@ -377,7 +377,7 @@ static inline void _sbus_writel(u32 l, volatile void __iomem *addr)
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: "memory");
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}
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static inline void _sbus_writeq(u64 l, volatile void __iomem *addr)
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static inline void sbus_writeq(u64 l, volatile void __iomem *addr)
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{
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__asm__ __volatile__("stxa\t%r0, [%1] %2\t/* sbus_writeq */"
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: /* no outputs */
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@ -385,16 +385,7 @@ static inline void _sbus_writeq(u64 l, volatile void __iomem *addr)
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: "memory");
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}
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#define sbus_readb(__addr) _sbus_readb(__addr)
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#define sbus_readw(__addr) _sbus_readw(__addr)
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#define sbus_readl(__addr) _sbus_readl(__addr)
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#define sbus_readq(__addr) _sbus_readq(__addr)
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#define sbus_writeb(__b, __addr) _sbus_writeb(__b, __addr)
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#define sbus_writew(__w, __addr) _sbus_writew(__w, __addr)
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#define sbus_writel(__l, __addr) _sbus_writel(__l, __addr)
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#define sbus_writeq(__l, __addr) _sbus_writeq(__l, __addr)
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static inline void _sbus_memset_io(volatile void __iomem *dst, int c, __kernel_size_t n)
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static inline void sbus_memset_io(volatile void __iomem *dst, int c, __kernel_size_t n)
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{
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while(n--) {
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sbus_writeb(c, dst);
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@ -402,10 +393,7 @@ static inline void _sbus_memset_io(volatile void __iomem *dst, int c, __kernel_s
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}
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}
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#define sbus_memset_io(d,c,sz) _sbus_memset_io(d,c,sz)
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static inline void
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_memset_io(volatile void __iomem *dst, int c, __kernel_size_t n)
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static inline void memset_io(volatile void __iomem *dst, int c, __kernel_size_t n)
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{
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volatile void __iomem *d = dst;
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@ -415,11 +403,8 @@ _memset_io(volatile void __iomem *dst, int c, __kernel_size_t n)
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}
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}
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#define memset_io(d,c,sz) _memset_io(d,c,sz)
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static inline void
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_sbus_memcpy_fromio(void *dst, const volatile void __iomem *src,
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__kernel_size_t n)
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static inline void sbus_memcpy_fromio(void *dst, const volatile void __iomem *src,
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__kernel_size_t n)
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{
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char *d = dst;
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@ -430,10 +415,9 @@ _sbus_memcpy_fromio(void *dst, const volatile void __iomem *src,
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}
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}
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#define sbus_memcpy_fromio(d, s, sz) _sbus_memcpy_fromio(d, s, sz)
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static inline void
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_memcpy_fromio(void *dst, const volatile void __iomem *src, __kernel_size_t n)
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||||
static inline void memcpy_fromio(void *dst, const volatile void __iomem *src,
|
||||
__kernel_size_t n)
|
||||
{
|
||||
char *d = dst;
|
||||
|
||||
|
|
@ -444,11 +428,8 @@ _memcpy_fromio(void *dst, const volatile void __iomem *src, __kernel_size_t n)
|
|||
}
|
||||
}
|
||||
|
||||
#define memcpy_fromio(d,s,sz) _memcpy_fromio(d,s,sz)
|
||||
|
||||
static inline void
|
||||
_sbus_memcpy_toio(volatile void __iomem *dst, const void *src,
|
||||
__kernel_size_t n)
|
||||
static inline void sbus_memcpy_toio(volatile void __iomem *dst, const void *src,
|
||||
__kernel_size_t n)
|
||||
{
|
||||
const char *s = src;
|
||||
volatile void __iomem *d = dst;
|
||||
|
|
@ -460,10 +441,8 @@ _sbus_memcpy_toio(volatile void __iomem *dst, const void *src,
|
|||
}
|
||||
}
|
||||
|
||||
#define sbus_memcpy_toio(d, s, sz) _sbus_memcpy_toio(d, s, sz)
|
||||
|
||||
static inline void
|
||||
_memcpy_toio(volatile void __iomem *dst, const void *src, __kernel_size_t n)
|
||||
static inline void memcpy_toio(volatile void __iomem *dst, const void *src,
|
||||
__kernel_size_t n)
|
||||
{
|
||||
const char *s = src;
|
||||
volatile void __iomem *d = dst;
|
||||
|
|
@ -475,8 +454,6 @@ _memcpy_toio(volatile void __iomem *dst, const void *src, __kernel_size_t n)
|
|||
}
|
||||
}
|
||||
|
||||
#define memcpy_toio(d,s,sz) _memcpy_toio(d,s,sz)
|
||||
|
||||
#define mmiowb()
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
|
|
|||
Loading…
Reference in New Issue