dt-bindings: PCI: kirin: Convert kirin-pcie.txt to yaml
Convert the file into a JSON description at the yaml format. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Link: https://lore.kernel.org/r/081c179ef2e0ddf11566144cd5967b15268565b4.1628061310.git.mchehab+huawei@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
This commit is contained in:
Mauro Carvalho Chehab
Rob Herring
parent
2de207f5ff
commit
78e29356d6
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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pci/hisilicon,kirin-pcie.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: HiSilicon Kirin SoCs PCIe host DT description
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maintainers:
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- Xiaowei Song <songxiaowei@hisilicon.com>
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- Binghui Wang <wangbinghui@hisilicon.com>
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description: |
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Kirin PCIe host controller is based on the Synopsys DesignWare PCI core.
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It shares common functions with the PCIe DesignWare core driver and
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inherits common properties defined in
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Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml.
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allOf:
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- $ref: /schemas/pci/snps,dw-pcie.yaml#
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properties:
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compatible:
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contains:
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enum:
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- hisilicon,kirin960-pcie
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reg:
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description: |
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Should contain dbi, apb, config registers location and length.
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For HiKey960, it should also contain phy.
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minItems: 3
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maxItems: 4
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reg-names:
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minItems: 3
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maxItems: 4
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required:
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- compatible
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- reg
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- reg-names
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/hi3660-clock.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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pcie@f4000000 {
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compatible = "hisilicon,kirin960-pcie";
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reg = <0x0 0xf4000000 0x0 0x1000>,
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<0x0 0xff3fe000 0x0 0x1000>,
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<0x0 0xf3f20000 0x0 0x40000>,
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<0x0 0xf5000000 0x0 0x2000>;
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reg-names = "dbi", "apb", "phy", "config";
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bus-range = <0x0 0xff>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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ranges = <0x02000000 0x0 0x00000000
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0x0 0xf6000000
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0x0 0x02000000>;
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num-lanes = <1>;
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#interrupt-cells = <1>;
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interrupts = <0 283 4>;
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interrupt-names = "msi";
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <0x0 0 0 1 &gic GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
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<0x0 0 0 2 &gic GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
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<0x0 0 0 3 &gic GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
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<0x0 0 0 4 &gic GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&crg_ctrl HI3660_PCIEPHY_REF>,
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<&crg_ctrl HI3660_CLK_GATE_PCIEAUX>,
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<&crg_ctrl HI3660_PCLK_GATE_PCIE_PHY>,
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<&crg_ctrl HI3660_PCLK_GATE_PCIE_SYS>,
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<&crg_ctrl HI3660_ACLK_GATE_PCIE>;
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clock-names = "pcie_phy_ref", "pcie_aux", "pcie_apb_phy",
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"pcie_apb_sys", "pcie_aclk";
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};
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};
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@ -1,50 +0,0 @@
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HiSilicon Kirin SoCs PCIe host DT description
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Kirin PCIe host controller is based on the Synopsys DesignWare PCI core.
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It shares common functions with the PCIe DesignWare core driver and
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inherits common properties defined in
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Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml.
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Additional properties are described here:
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Required properties
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- compatible:
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"hisilicon,kirin960-pcie"
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- reg: Should contain rc_dbi, apb, phy, config registers location and length.
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- reg-names: Must include the following entries:
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"dbi": controller configuration registers;
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"apb": apb Ctrl register defined by Kirin;
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"phy": apb PHY register defined by Kirin;
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"config": PCIe configuration space registers.
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- reset-gpios: The GPIO to generate PCIe PERST# assert and deassert signal.
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Optional properties:
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Example based on kirin960:
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pcie@f4000000 {
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compatible = "hisilicon,kirin960-pcie";
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reg = <0x0 0xf4000000 0x0 0x1000>, <0x0 0xff3fe000 0x0 0x1000>,
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<0x0 0xf3f20000 0x0 0x40000>, <0x0 0xF4000000 0 0x2000>;
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reg-names = "dbi","apb","phy", "config";
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bus-range = <0x0 0x1>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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ranges = <0x02000000 0x0 0x00000000 0x0 0xf5000000 0x0 0x2000000>;
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num-lanes = <1>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <0x0 0 0 1 &gic 0 0 0 282 4>,
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<0x0 0 0 2 &gic 0 0 0 283 4>,
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<0x0 0 0 3 &gic 0 0 0 284 4>,
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<0x0 0 0 4 &gic 0 0 0 285 4>;
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clocks = <&crg_ctrl HI3660_PCIEPHY_REF>,
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<&crg_ctrl HI3660_CLK_GATE_PCIEAUX>,
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<&crg_ctrl HI3660_PCLK_GATE_PCIE_PHY>,
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<&crg_ctrl HI3660_PCLK_GATE_PCIE_SYS>,
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<&crg_ctrl HI3660_ACLK_GATE_PCIE>;
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clock-names = "pcie_phy_ref", "pcie_aux",
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"pcie_apb_phy", "pcie_apb_sys", "pcie_aclk";
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reset-gpios = <&gpio11 1 0 >;
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};
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@ -35,7 +35,7 @@ properties:
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maxItems: 5
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items:
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enum: [ dbi, dbi2, config, atu, app, elbi, mgmt, ctrl, parf, cfg, link,
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ulreg, smu, mpu ]
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ulreg, smu, mpu, apb, phy ]
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num-lanes:
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description: |
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@ -14413,7 +14413,7 @@ M: Xiaowei Song <songxiaowei@hisilicon.com>
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M: Binghui Wang <wangbinghui@hisilicon.com>
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L: linux-pci@vger.kernel.org
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S: Maintained
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F: Documentation/devicetree/bindings/pci/kirin-pcie.txt
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F: Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml
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F: drivers/pci/controller/dwc/pcie-kirin.c
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PCIE DRIVER FOR HISILICON STB
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