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i40e: add support for triggering EMPR 

Allow debugfs to trigger a reset called EMPR.

Change-Id: I2f6600a8242759ec60c8198d03f70c2b774e0740
Signed-off-by: Shannon Nelson <shannon.nelson@intel.com>
Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Tested-by: Kavindya Deegala <kavindya.s.deegala@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Shannon Nelson 2013-11-16 10:00:45 +00:00 committed by Jeff Kirsher
parent cd92e72f2d
commit 7823fe341d
3 changed files with 23 additions and 0 deletions
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1
drivers/net/ethernet/intel/i40e/i40e.h
View File

@ -130,6 +130,7 @@ enum i40e_state_t {
__I40E_PF_RESET_REQUESTED,
__I40E_CORE_RESET_REQUESTED,
__I40E_GLOBAL_RESET_REQUESTED,
__I40E_EMP_RESET_REQUESTED,
__I40E_FILTER_OVERFLOW_PROMISC,
};

4
drivers/net/ethernet/intel/i40e/i40e_debugfs.c
View File

@ -1472,6 +1472,10 @@ static ssize_t i40e_dbg_command_write(struct file *filp,
dev_info(&pf->pdev->dev, "forcing GlobR\n");
i40e_do_reset(pf, (1 << __I40E_GLOBAL_RESET_REQUESTED));
} else if (strncmp(cmd_buf, "empr", 4) == 0) {
dev_info(&pf->pdev->dev, "forcing EMPR\n");
i40e_do_reset(pf, (1 << __I40E_EMP_RESET_REQUESTED));
} else if (strncmp(cmd_buf, "read", 4) == 0) {
u32 address;
u32 value;

18
drivers/net/ethernet/intel/i40e/i40e_main.c
View File

@ -4056,6 +4056,24 @@ void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
i40e_flush(&pf->hw);
} else if (reset_flags & (1 << __I40E_EMP_RESET_REQUESTED)) {
/* Request a Firmware Reset
*
* Same as Global reset, plus restarting the
* embedded firmware engine.
*/
/* enable EMP Reset */
val = rd32(&pf->hw, I40E_GLGEN_RSTENA_EMP);
val |= I40E_GLGEN_RSTENA_EMP_EMP_RST_ENA_MASK;
wr32(&pf->hw, I40E_GLGEN_RSTENA_EMP, val);
/* force the reset */
val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
val |= I40E_GLGEN_RTRIG_EMPFWR_MASK;
wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
i40e_flush(&pf->hw);
} else if (reset_flags & (1 << __I40E_PF_RESET_REQUESTED)) {
/* Request a PF Reset