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drm/amd/powerplay: implement sensor of get_gfx_vdd for smu11 

add sensor interface of gfx vdd for hwmon

Signed-off-by: Kevin Wang <Kevin1.Wang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Kevin Wang 2019-01-16 13:31:12 +08:00 committed by Alex Deucher
parent 2c272452af
commit 77d1eef4e8
2 changed files with 32 additions and 0 deletions
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31
drivers/gpu/drm/amd/powerplay/smu_v11_0.c
View File

@ -38,6 +38,8 @@
#include "asic_reg/mp/mp_9_0_offset.h"
#include "asic_reg/mp/mp_9_0_sh_mask.h"
#include "asic_reg/nbio/nbio_7_4_offset.h"
#include "asic_reg/smuio/smuio_9_0_offset.h"
#include "asic_reg/smuio/smuio_9_0_sh_mask.h"
MODULE_FIRMWARE("amdgpu/vega20_smc.bin");
@ -46,6 +48,7 @@ MODULE_FIRMWARE("amdgpu/vega20_smc.bin");
#define SMU11_THERMAL_MAXIMUM_ALERT_TEMP 255
#define SMU11_TEMPERATURE_UNITS_PER_CENTIGRADES 1000
#define SMU11_VOLTAGE_SCALE 4
static int smu_v11_0_send_msg_without_waiting(struct smu_context *smu,
uint16_t msg)
@ -1049,6 +1052,30 @@ static int smu_v11_0_get_gpu_power(struct smu_context *smu, uint32_t *value)
return 0;
}
static uint16_t convert_to_vddc(uint8_t vid)
{
return (uint16_t) ((6200 - (vid * 25)) / SMU11_VOLTAGE_SCALE);
}
static int smu_v11_0_get_gfx_vdd(struct smu_context *smu, uint32_t *value)
{
struct amdgpu_device *adev = smu->adev;
uint32_t vdd = 0, val_vid = 0;
if (!value)
return -EINVAL;
val_vid = (RREG32_SOC15(SMUIO, 0, mmSMUSVI0_TEL_PLANE0) &
SMUSVI0_TEL_PLANE0__SVI0_PLANE0_VDDCOR_MASK) >>
SMUSVI0_TEL_PLANE0__SVI0_PLANE0_VDDCOR__SHIFT;
vdd = (uint32_t)convert_to_vddc((uint8_t)val_vid);
*value = vdd;
return 0;
}
static int smu_v11_0_read_sensor(struct smu_context *smu,
enum amd_pp_sensors sensor,
void *data, uint32_t *size)
@ -1076,6 +1103,10 @@ static int smu_v11_0_read_sensor(struct smu_context *smu,
ret = smu_v11_0_get_gpu_power(smu, (uint32_t *)data);
*size = 4;
break;
case AMDGPU_PP_SENSOR_VDDGFX:
ret = smu_v11_0_get_gfx_vdd(smu, (uint32_t *)data);
*size = 4;
break;
default:
ret = -EINVAL;
break;

1
drivers/gpu/drm/amd/powerplay/vega20_ppt.h
View File

@ -28,6 +28,7 @@
#define MAX_REGULAR_DPM_NUMBER 16
#define MAX_PCIE_CONF 2
struct vega20_dpm_level {
bool enabled;
uint32_t value;