drm/i915/gen9: Verify and enforce dc6 state writes
It has been observed that sometimes disabling the dc6 fails and dc6 state pops back up, brief moment after disabling. This has to be dmc save/restore timing issue or other bug in the way dc states are handled. Try to work around this issue as we don't have firmware fix yet available. Verify that the value we wrote for the dmc sticks, and also enforce it by rewriting it, if it didn't. v2: Zero rereads on rewrite for extra paranoia (Imre) Testcase: kms_flip/basic-flip-vs-dpms References: https://bugs.freedesktop.org/show_bug.cgi?id=93768 Cc: Patrik Jakobsson <patrik.jakobsson@linux.intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Imre Deak <imre.deak@intel.com> Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1455811089-27884-1-git-send-email-mika.kuoppala@intel.com
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@ -470,6 +470,43 @@ static void gen9_set_dc_state_debugmask_memory_up(
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}
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}
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static void gen9_write_dc_state(struct drm_i915_private *dev_priv,
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u32 state)
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{
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int rewrites = 0;
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int rereads = 0;
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u32 v;
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I915_WRITE(DC_STATE_EN, state);
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/* It has been observed that disabling the dc6 state sometimes
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* doesn't stick and dmc keeps returning old value. Make sure
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* the write really sticks enough times and also force rewrite until
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* we are confident that state is exactly what we want.
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*/
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do {
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v = I915_READ(DC_STATE_EN);
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if (v != state) {
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I915_WRITE(DC_STATE_EN, state);
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rewrites++;
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rereads = 0;
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} else if (rereads++ > 5) {
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break;
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}
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} while (rewrites < 100);
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if (v != state)
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DRM_ERROR("Writing dc state to 0x%x failed, now 0x%x\n",
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state, v);
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/* Most of the times we need one retry, avoid spam */
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if (rewrites > 1)
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DRM_DEBUG_KMS("Rewrote dc state to 0x%x %d times\n",
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state, rewrites);
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}
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static void gen9_set_dc_state(struct drm_i915_private *dev_priv, uint32_t state)
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{
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uint32_t val;
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@ -502,8 +539,8 @@ static void gen9_set_dc_state(struct drm_i915_private *dev_priv, uint32_t state)
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val &= ~mask;
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val |= state;
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I915_WRITE(DC_STATE_EN, val);
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POSTING_READ(DC_STATE_EN);
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gen9_write_dc_state(dev_priv, val);
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dev_priv->csr.dc_state = val & mask;
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}
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