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arm64: tegra: Fix GIC400 missing GICH/GICV register regions 

GIC400 has full support for virtualization, and yet the tegra186
DT doesn't expose the GICH/GICV regions (despite exposing the
maintenance interrupt that only makes sense for virtualization).

Add the missing regions, based on the hunch that the HW doesn't
use the CPU build-in interfaces, but instead the external ones
provided by the GIC. KVM's virtual GIC now works with this change.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Marc Zyngier 2020-10-05 14:32:56 +01:00 committed by Thierry Reding
parent 3b4c137856
commit 776a3c04da
1 changed files with 3 additions and 1 deletions
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4
arch/arm64/boot/dts/nvidia/tegra186.dtsi
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@ -845,7 +845,9 @@
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x0 0x03881000 0x0 0x1000>,
<0x0 0x03882000 0x0 0x2000>;
<0x0 0x03882000 0x0 0x2000>,
<0x0 0x03884000 0x0 0x2000>,
<0x0 0x03886000 0x0 0x2000>;
interrupts = <GIC_PPI 9
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
interrupt-parent = <&gic>;