wil6210: fix checkpatch CamelCase warnings
Signed-off-by: Vladimir Kondratiev <qca_vkondrat@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
parent
e08b5906cc
commit
7743882d6f
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@ -228,7 +228,7 @@ static int wil_cfg80211_scan(struct wiphy *wiphy,
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}
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}
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/* 0-based channel indexes */
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/* 0-based channel indexes */
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cmd.cmd.channel_list[cmd.cmd.num_channels++].channel = ch - 1;
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cmd.cmd.channel_list[cmd.cmd.num_channels++].channel = ch - 1;
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wil_dbg_MISC(wil, "Scan for ch %d : %d MHz\n", ch,
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wil_dbg_misc(wil, "Scan for ch %d : %d MHz\n", ch,
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request->channels[i]->center_freq);
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request->channels[i]->center_freq);
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}
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}
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@ -425,7 +425,7 @@ static int wil_cfg80211_start_ap(struct wiphy *wiphy,
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return -EINVAL;
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return -EINVAL;
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}
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}
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wil_dbg_MISC(wil, "AP on Channel %d %d MHz, %s\n", channel->hw_value,
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wil_dbg_misc(wil, "AP on Channel %d %d MHz, %s\n", channel->hw_value,
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channel->center_freq, info->privacy ? "secure" : "open");
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channel->center_freq, info->privacy ? "secure" : "open");
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print_hex_dump_bytes("SSID ", DUMP_PREFIX_OFFSET,
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print_hex_dump_bytes("SSID ", DUMP_PREFIX_OFFSET,
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info->ssid, info->ssid_len);
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info->ssid, info->ssid_len);
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@ -96,7 +96,7 @@ static void wil6210_mask_irq_misc(struct wil6210_priv *wil)
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static void wil6210_mask_irq_pseudo(struct wil6210_priv *wil)
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static void wil6210_mask_irq_pseudo(struct wil6210_priv *wil)
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{
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{
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wil_dbg_IRQ(wil, "%s()\n", __func__);
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wil_dbg_irq(wil, "%s()\n", __func__);
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iowrite32(WIL6210_IRQ_DISABLE, wil->csr +
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iowrite32(WIL6210_IRQ_DISABLE, wil->csr +
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HOSTADDR(RGF_DMA_PSEUDO_CAUSE_MASK_SW));
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HOSTADDR(RGF_DMA_PSEUDO_CAUSE_MASK_SW));
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@ -127,7 +127,7 @@ static void wil6210_unmask_irq_misc(struct wil6210_priv *wil)
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static void wil6210_unmask_irq_pseudo(struct wil6210_priv *wil)
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static void wil6210_unmask_irq_pseudo(struct wil6210_priv *wil)
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{
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{
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wil_dbg_IRQ(wil, "%s()\n", __func__);
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wil_dbg_irq(wil, "%s()\n", __func__);
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set_bit(wil_status_irqen, &wil->status);
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set_bit(wil_status_irqen, &wil->status);
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@ -137,7 +137,7 @@ static void wil6210_unmask_irq_pseudo(struct wil6210_priv *wil)
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void wil6210_disable_irq(struct wil6210_priv *wil)
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void wil6210_disable_irq(struct wil6210_priv *wil)
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{
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{
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wil_dbg_IRQ(wil, "%s()\n", __func__);
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wil_dbg_irq(wil, "%s()\n", __func__);
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wil6210_mask_irq_tx(wil);
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wil6210_mask_irq_tx(wil);
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wil6210_mask_irq_rx(wil);
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wil6210_mask_irq_rx(wil);
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@ -147,7 +147,7 @@ void wil6210_disable_irq(struct wil6210_priv *wil)
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void wil6210_enable_irq(struct wil6210_priv *wil)
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void wil6210_enable_irq(struct wil6210_priv *wil)
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{
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{
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wil_dbg_IRQ(wil, "%s()\n", __func__);
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wil_dbg_irq(wil, "%s()\n", __func__);
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iowrite32(WIL_ICR_ICC_VALUE, wil->csr + HOSTADDR(RGF_DMA_EP_RX_ICR) +
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iowrite32(WIL_ICR_ICC_VALUE, wil->csr + HOSTADDR(RGF_DMA_EP_RX_ICR) +
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offsetof(struct RGF_ICR, ICC));
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offsetof(struct RGF_ICR, ICC));
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@ -169,7 +169,7 @@ static irqreturn_t wil6210_irq_rx(int irq, void *cookie)
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HOSTADDR(RGF_DMA_EP_RX_ICR) +
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HOSTADDR(RGF_DMA_EP_RX_ICR) +
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offsetof(struct RGF_ICR, ICR));
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offsetof(struct RGF_ICR, ICR));
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wil_dbg_IRQ(wil, "ISR RX 0x%08x\n", isr);
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wil_dbg_irq(wil, "ISR RX 0x%08x\n", isr);
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if (!isr) {
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if (!isr) {
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wil_err(wil, "spurious IRQ: RX\n");
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wil_err(wil, "spurious IRQ: RX\n");
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@ -179,7 +179,7 @@ static irqreturn_t wil6210_irq_rx(int irq, void *cookie)
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wil6210_mask_irq_rx(wil);
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wil6210_mask_irq_rx(wil);
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if (isr & BIT_DMA_EP_RX_ICR_RX_DONE) {
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if (isr & BIT_DMA_EP_RX_ICR_RX_DONE) {
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wil_dbg_IRQ(wil, "RX done\n");
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wil_dbg_irq(wil, "RX done\n");
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isr &= ~BIT_DMA_EP_RX_ICR_RX_DONE;
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isr &= ~BIT_DMA_EP_RX_ICR_RX_DONE;
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wil_rx_handle(wil);
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wil_rx_handle(wil);
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}
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}
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@ -199,7 +199,7 @@ static irqreturn_t wil6210_irq_tx(int irq, void *cookie)
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HOSTADDR(RGF_DMA_EP_TX_ICR) +
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HOSTADDR(RGF_DMA_EP_TX_ICR) +
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offsetof(struct RGF_ICR, ICR));
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offsetof(struct RGF_ICR, ICR));
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wil_dbg_IRQ(wil, "ISR TX 0x%08x\n", isr);
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wil_dbg_irq(wil, "ISR TX 0x%08x\n", isr);
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if (!isr) {
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if (!isr) {
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wil_err(wil, "spurious IRQ: TX\n");
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wil_err(wil, "spurious IRQ: TX\n");
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@ -210,13 +210,13 @@ static irqreturn_t wil6210_irq_tx(int irq, void *cookie)
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if (isr & BIT_DMA_EP_TX_ICR_TX_DONE) {
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if (isr & BIT_DMA_EP_TX_ICR_TX_DONE) {
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uint i;
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uint i;
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wil_dbg_IRQ(wil, "TX done\n");
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wil_dbg_irq(wil, "TX done\n");
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isr &= ~BIT_DMA_EP_TX_ICR_TX_DONE;
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isr &= ~BIT_DMA_EP_TX_ICR_TX_DONE;
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for (i = 0; i < 24; i++) {
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for (i = 0; i < 24; i++) {
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u32 mask = BIT_DMA_EP_TX_ICR_TX_DONE_N(i);
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u32 mask = BIT_DMA_EP_TX_ICR_TX_DONE_N(i);
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if (isr & mask) {
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if (isr & mask) {
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isr &= ~mask;
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isr &= ~mask;
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wil_dbg_IRQ(wil, "TX done(%i)\n", i);
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wil_dbg_irq(wil, "TX done(%i)\n", i);
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wil_tx_complete(wil, i);
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wil_tx_complete(wil, i);
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}
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}
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}
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}
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@ -248,7 +248,7 @@ static irqreturn_t wil6210_irq_misc(int irq, void *cookie)
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HOSTADDR(RGF_DMA_EP_MISC_ICR) +
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HOSTADDR(RGF_DMA_EP_MISC_ICR) +
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offsetof(struct RGF_ICR, ICR));
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offsetof(struct RGF_ICR, ICR));
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wil_dbg_IRQ(wil, "ISR MISC 0x%08x\n", isr);
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wil_dbg_irq(wil, "ISR MISC 0x%08x\n", isr);
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if (!isr) {
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if (!isr) {
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wil_err(wil, "spurious IRQ: MISC\n");
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wil_err(wil, "spurious IRQ: MISC\n");
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@ -258,14 +258,14 @@ static irqreturn_t wil6210_irq_misc(int irq, void *cookie)
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wil6210_mask_irq_misc(wil);
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wil6210_mask_irq_misc(wil);
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if (isr & ISR_MISC_FW_ERROR) {
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if (isr & ISR_MISC_FW_ERROR) {
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wil_dbg_IRQ(wil, "IRQ: Firmware error\n");
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wil_dbg_irq(wil, "IRQ: Firmware error\n");
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clear_bit(wil_status_fwready, &wil->status);
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clear_bit(wil_status_fwready, &wil->status);
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wil_notify_fw_error(wil);
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wil_notify_fw_error(wil);
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isr &= ~ISR_MISC_FW_ERROR;
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isr &= ~ISR_MISC_FW_ERROR;
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}
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}
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if (isr & ISR_MISC_FW_READY) {
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if (isr & ISR_MISC_FW_READY) {
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wil_dbg_IRQ(wil, "IRQ: FW ready\n");
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wil_dbg_irq(wil, "IRQ: FW ready\n");
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/**
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/**
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* Actual FW ready indicated by the
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* Actual FW ready indicated by the
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* WMI_FW_READY_EVENTID
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* WMI_FW_READY_EVENTID
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@ -288,10 +288,10 @@ static irqreturn_t wil6210_irq_misc_thread(int irq, void *cookie)
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struct wil6210_priv *wil = cookie;
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struct wil6210_priv *wil = cookie;
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u32 isr = wil->isr_misc;
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u32 isr = wil->isr_misc;
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wil_dbg_IRQ(wil, "Thread ISR MISC 0x%08x\n", isr);
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wil_dbg_irq(wil, "Thread ISR MISC 0x%08x\n", isr);
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if (isr & ISR_MISC_MBOX_EVT) {
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if (isr & ISR_MISC_MBOX_EVT) {
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wil_dbg_IRQ(wil, "MBOX event\n");
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wil_dbg_irq(wil, "MBOX event\n");
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wmi_recv_cmd(wil);
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wmi_recv_cmd(wil);
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isr &= ~ISR_MISC_MBOX_EVT;
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isr &= ~ISR_MISC_MBOX_EVT;
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}
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}
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@ -313,7 +313,7 @@ static irqreturn_t wil6210_thread_irq(int irq, void *cookie)
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{
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{
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struct wil6210_priv *wil = cookie;
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struct wil6210_priv *wil = cookie;
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wil_dbg_IRQ(wil, "Thread IRQ\n");
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wil_dbg_irq(wil, "Thread IRQ\n");
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/* Discover real IRQ cause */
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/* Discover real IRQ cause */
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if (wil->isr_misc)
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if (wil->isr_misc)
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wil6210_irq_misc_thread(irq, cookie);
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wil6210_irq_misc_thread(irq, cookie);
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@ -390,7 +390,7 @@ static irqreturn_t wil6210_hardirq(int irq, void *cookie)
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if (wil6210_debug_irq_mask(wil, pseudo_cause))
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if (wil6210_debug_irq_mask(wil, pseudo_cause))
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return IRQ_NONE;
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return IRQ_NONE;
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wil_dbg_IRQ(wil, "Pseudo IRQ 0x%08x\n", pseudo_cause);
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wil_dbg_irq(wil, "Pseudo IRQ 0x%08x\n", pseudo_cause);
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wil6210_mask_irq_pseudo(wil);
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wil6210_mask_irq_pseudo(wil);
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@ -64,7 +64,7 @@ static void _wil6210_disconnect(struct wil6210_priv *wil, void *bssid)
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struct net_device *ndev = wil_to_ndev(wil);
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struct net_device *ndev = wil_to_ndev(wil);
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struct wireless_dev *wdev = wil->wdev;
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struct wireless_dev *wdev = wil->wdev;
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wil_dbg_MISC(wil, "%s()\n", __func__);
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wil_dbg_misc(wil, "%s()\n", __func__);
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wil_link_off(wil);
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wil_link_off(wil);
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clear_bit(wil_status_fwconnected, &wil->status);
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clear_bit(wil_status_fwconnected, &wil->status);
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@ -101,7 +101,7 @@ static void wil_connect_timer_fn(ulong x)
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{
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{
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struct wil6210_priv *wil = (void *)x;
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struct wil6210_priv *wil = (void *)x;
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wil_dbg_MISC(wil, "Connect timeout\n");
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wil_dbg_misc(wil, "Connect timeout\n");
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/* reschedule to thread context - disconnect won't
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/* reschedule to thread context - disconnect won't
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* run from atomic context
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* run from atomic context
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@ -120,7 +120,7 @@ static void wil_cache_mbox_regs(struct wil6210_priv *wil)
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int wil_priv_init(struct wil6210_priv *wil)
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int wil_priv_init(struct wil6210_priv *wil)
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{
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{
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wil_dbg_MISC(wil, "%s()\n", __func__);
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wil_dbg_misc(wil, "%s()\n", __func__);
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mutex_init(&wil->mutex);
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mutex_init(&wil->mutex);
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mutex_init(&wil->wmi_mutex);
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mutex_init(&wil->wmi_mutex);
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@ -169,7 +169,7 @@ void wil_priv_deinit(struct wil6210_priv *wil)
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static void wil_target_reset(struct wil6210_priv *wil)
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static void wil_target_reset(struct wil6210_priv *wil)
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{
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{
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wil_dbg_MISC(wil, "Resetting...\n");
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wil_dbg_misc(wil, "Resetting...\n");
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/* register write */
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/* register write */
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#define W(a, v) iowrite32(v, wil->csr + HOSTADDR(a))
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#define W(a, v) iowrite32(v, wil->csr + HOSTADDR(a))
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@ -209,7 +209,7 @@ static void wil_target_reset(struct wil6210_priv *wil)
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msleep(2000);
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msleep(2000);
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wil_dbg_MISC(wil, "Reset completed\n");
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wil_dbg_misc(wil, "Reset completed\n");
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#undef W
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#undef W
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#undef S
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#undef S
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@ -232,7 +232,7 @@ static int wil_wait_for_fw_ready(struct wil6210_priv *wil)
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wil_err(wil, "Firmware not ready\n");
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wil_err(wil, "Firmware not ready\n");
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return -ETIME;
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return -ETIME;
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} else {
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} else {
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wil_dbg_MISC(wil, "FW ready after %d ms\n",
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wil_dbg_misc(wil, "FW ready after %d ms\n",
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jiffies_to_msecs(to-left));
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jiffies_to_msecs(to-left));
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}
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}
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return 0;
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return 0;
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@ -281,7 +281,7 @@ void wil_link_on(struct wil6210_priv *wil)
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{
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{
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struct net_device *ndev = wil_to_ndev(wil);
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struct net_device *ndev = wil_to_ndev(wil);
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wil_dbg_MISC(wil, "%s()\n", __func__);
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wil_dbg_misc(wil, "%s()\n", __func__);
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netif_carrier_on(ndev);
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netif_carrier_on(ndev);
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netif_tx_wake_all_queues(ndev);
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netif_tx_wake_all_queues(ndev);
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@ -291,7 +291,7 @@ void wil_link_off(struct wil6210_priv *wil)
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{
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{
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struct net_device *ndev = wil_to_ndev(wil);
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struct net_device *ndev = wil_to_ndev(wil);
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wil_dbg_MISC(wil, "%s()\n", __func__);
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wil_dbg_misc(wil, "%s()\n", __func__);
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netif_tx_stop_all_queues(ndev);
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netif_tx_stop_all_queues(ndev);
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netif_carrier_off(ndev);
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netif_carrier_off(ndev);
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@ -314,27 +314,27 @@ static int __wil_up(struct wil6210_priv *wil)
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wmi_nettype = wil_iftype_nl2wmi(NL80211_IFTYPE_ADHOC);
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wmi_nettype = wil_iftype_nl2wmi(NL80211_IFTYPE_ADHOC);
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switch (wdev->iftype) {
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switch (wdev->iftype) {
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case NL80211_IFTYPE_STATION:
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case NL80211_IFTYPE_STATION:
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wil_dbg_MISC(wil, "type: STATION\n");
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wil_dbg_misc(wil, "type: STATION\n");
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bi = 0;
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bi = 0;
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ndev->type = ARPHRD_ETHER;
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ndev->type = ARPHRD_ETHER;
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break;
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break;
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case NL80211_IFTYPE_AP:
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case NL80211_IFTYPE_AP:
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wil_dbg_MISC(wil, "type: AP\n");
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wil_dbg_misc(wil, "type: AP\n");
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bi = 100;
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bi = 100;
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ndev->type = ARPHRD_ETHER;
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ndev->type = ARPHRD_ETHER;
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break;
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break;
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case NL80211_IFTYPE_P2P_CLIENT:
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case NL80211_IFTYPE_P2P_CLIENT:
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wil_dbg_MISC(wil, "type: P2P_CLIENT\n");
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wil_dbg_misc(wil, "type: P2P_CLIENT\n");
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bi = 0;
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bi = 0;
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ndev->type = ARPHRD_ETHER;
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ndev->type = ARPHRD_ETHER;
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break;
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break;
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case NL80211_IFTYPE_P2P_GO:
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case NL80211_IFTYPE_P2P_GO:
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wil_dbg_MISC(wil, "type: P2P_GO\n");
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wil_dbg_misc(wil, "type: P2P_GO\n");
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bi = 100;
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bi = 100;
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ndev->type = ARPHRD_ETHER;
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ndev->type = ARPHRD_ETHER;
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break;
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break;
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case NL80211_IFTYPE_MONITOR:
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case NL80211_IFTYPE_MONITOR:
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wil_dbg_MISC(wil, "type: Monitor\n");
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wil_dbg_misc(wil, "type: Monitor\n");
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bi = 0;
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bi = 0;
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ndev->type = ARPHRD_IEEE80211_RADIOTAP;
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ndev->type = ARPHRD_IEEE80211_RADIOTAP;
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/* ARPHRD_IEEE80211 or ARPHRD_IEEE80211_RADIOTAP ? */
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/* ARPHRD_IEEE80211 or ARPHRD_IEEE80211_RADIOTAP ? */
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@ -53,7 +53,7 @@ static int wil_if_pcie_enable(struct wil6210_priv *wil)
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}
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}
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wil->n_msi = use_msi;
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wil->n_msi = use_msi;
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if (wil->n_msi) {
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if (wil->n_msi) {
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wil_dbg_MISC(wil, "Setup %d MSI interrupts\n", use_msi);
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wil_dbg_misc(wil, "Setup %d MSI interrupts\n", use_msi);
|
||||||
rc = pci_enable_msi_block(pdev, wil->n_msi);
|
rc = pci_enable_msi_block(pdev, wil->n_msi);
|
||||||
if (rc && (wil->n_msi == 3)) {
|
if (rc && (wil->n_msi == 3)) {
|
||||||
wil_err(wil, "3 MSI mode failed, try 1 MSI\n");
|
wil_err(wil, "3 MSI mode failed, try 1 MSI\n");
|
||||||
|
@ -65,7 +65,7 @@ static int wil_if_pcie_enable(struct wil6210_priv *wil)
|
||||||
wil->n_msi = 0;
|
wil->n_msi = 0;
|
||||||
}
|
}
|
||||||
} else {
|
} else {
|
||||||
wil_dbg_MISC(wil, "MSI interrupts disabled, use INTx\n");
|
wil_dbg_misc(wil, "MSI interrupts disabled, use INTx\n");
|
||||||
}
|
}
|
||||||
|
|
||||||
rc = wil6210_init_irq(wil, pdev->irq);
|
rc = wil6210_init_irq(wil, pdev->irq);
|
||||||
|
|
|
@ -100,7 +100,7 @@ static int wil_vring_alloc(struct wil6210_priv *wil, struct vring *vring)
|
||||||
d->dma.status = TX_DMA_STATUS_DU;
|
d->dma.status = TX_DMA_STATUS_DU;
|
||||||
}
|
}
|
||||||
|
|
||||||
wil_dbg_MISC(wil, "vring[%d] 0x%p:0x%016llx 0x%p\n", vring->size,
|
wil_dbg_misc(wil, "vring[%d] 0x%p:0x%016llx 0x%p\n", vring->size,
|
||||||
vring->va, (unsigned long long)vring->pa, vring->ctx);
|
vring->va, (unsigned long long)vring->pa, vring->ctx);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
@ -353,8 +353,8 @@ static struct sk_buff *wil_vring_reap_rx(struct wil6210_priv *wil,
|
||||||
if (ndev->type == ARPHRD_IEEE80211_RADIOTAP)
|
if (ndev->type == ARPHRD_IEEE80211_RADIOTAP)
|
||||||
wil_rx_add_radiotap_header(wil, skb, d);
|
wil_rx_add_radiotap_header(wil, skb, d);
|
||||||
|
|
||||||
wil_dbg_TXRX(wil, "Rx[%3d] : %d bytes\n", vring->swhead, d->dma.length);
|
wil_dbg_txrx(wil, "Rx[%3d] : %d bytes\n", vring->swhead, d->dma.length);
|
||||||
wil_hex_dump_TXRX("Rx ", DUMP_PREFIX_NONE, 32, 4,
|
wil_hex_dump_txrx("Rx ", DUMP_PREFIX_NONE, 32, 4,
|
||||||
(const void *)d, sizeof(*d), false);
|
(const void *)d, sizeof(*d), false);
|
||||||
|
|
||||||
wil_vring_advance_head(vring, 1);
|
wil_vring_advance_head(vring, 1);
|
||||||
|
@ -369,7 +369,7 @@ static struct sk_buff *wil_vring_reap_rx(struct wil6210_priv *wil,
|
||||||
*/
|
*/
|
||||||
ftype = wil_rxdesc_ftype(d) << 2;
|
ftype = wil_rxdesc_ftype(d) << 2;
|
||||||
if (ftype != IEEE80211_FTYPE_DATA) {
|
if (ftype != IEEE80211_FTYPE_DATA) {
|
||||||
wil_dbg_TXRX(wil, "Non-data frame ftype 0x%08x\n", ftype);
|
wil_dbg_txrx(wil, "Non-data frame ftype 0x%08x\n", ftype);
|
||||||
/* TODO: process it */
|
/* TODO: process it */
|
||||||
kfree_skb(skb);
|
kfree_skb(skb);
|
||||||
return NULL;
|
return NULL;
|
||||||
|
@ -461,9 +461,9 @@ void wil_rx_handle(struct wil6210_priv *wil)
|
||||||
wil_err(wil, "Rx IRQ while Rx not yet initialized\n");
|
wil_err(wil, "Rx IRQ while Rx not yet initialized\n");
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
wil_dbg_TXRX(wil, "%s()\n", __func__);
|
wil_dbg_txrx(wil, "%s()\n", __func__);
|
||||||
while (NULL != (skb = wil_vring_reap_rx(wil, v))) {
|
while (NULL != (skb = wil_vring_reap_rx(wil, v))) {
|
||||||
wil_hex_dump_TXRX("Rx ", DUMP_PREFIX_OFFSET, 16, 1,
|
wil_hex_dump_txrx("Rx ", DUMP_PREFIX_OFFSET, 16, 1,
|
||||||
skb->data, skb_headlen(skb), false);
|
skb->data, skb_headlen(skb), false);
|
||||||
|
|
||||||
if (wil->wdev->iftype == NL80211_IFTYPE_MONITOR) {
|
if (wil->wdev->iftype == NL80211_IFTYPE_MONITOR) {
|
||||||
|
@ -639,7 +639,7 @@ static int wil_tx_vring(struct wil6210_priv *wil, struct vring *vring,
|
||||||
uint i = swhead;
|
uint i = swhead;
|
||||||
dma_addr_t pa;
|
dma_addr_t pa;
|
||||||
|
|
||||||
wil_dbg_TXRX(wil, "%s()\n", __func__);
|
wil_dbg_txrx(wil, "%s()\n", __func__);
|
||||||
|
|
||||||
if (avail < vring->size/8)
|
if (avail < vring->size/8)
|
||||||
netif_tx_stop_all_queues(wil_to_ndev(wil));
|
netif_tx_stop_all_queues(wil_to_ndev(wil));
|
||||||
|
@ -656,9 +656,9 @@ static int wil_tx_vring(struct wil6210_priv *wil, struct vring *vring,
|
||||||
pa = dma_map_single(dev, skb->data,
|
pa = dma_map_single(dev, skb->data,
|
||||||
skb_headlen(skb), DMA_TO_DEVICE);
|
skb_headlen(skb), DMA_TO_DEVICE);
|
||||||
|
|
||||||
wil_dbg_TXRX(wil, "Tx skb %d bytes %p -> %#08llx\n", skb_headlen(skb),
|
wil_dbg_txrx(wil, "Tx skb %d bytes %p -> %#08llx\n", skb_headlen(skb),
|
||||||
skb->data, (unsigned long long)pa);
|
skb->data, (unsigned long long)pa);
|
||||||
wil_hex_dump_TXRX("Tx ", DUMP_PREFIX_OFFSET, 16, 1,
|
wil_hex_dump_txrx("Tx ", DUMP_PREFIX_OFFSET, 16, 1,
|
||||||
skb->data, skb_headlen(skb), false);
|
skb->data, skb_headlen(skb), false);
|
||||||
|
|
||||||
if (unlikely(dma_mapping_error(dev, pa)))
|
if (unlikely(dma_mapping_error(dev, pa)))
|
||||||
|
@ -687,12 +687,12 @@ static int wil_tx_vring(struct wil6210_priv *wil, struct vring *vring,
|
||||||
d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_DMA_IT_POS);
|
d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_DMA_IT_POS);
|
||||||
d->dma.d0 |= (vring_index << DMA_CFG_DESC_TX_0_QID_POS);
|
d->dma.d0 |= (vring_index << DMA_CFG_DESC_TX_0_QID_POS);
|
||||||
|
|
||||||
wil_hex_dump_TXRX("Tx ", DUMP_PREFIX_NONE, 32, 4,
|
wil_hex_dump_txrx("Tx ", DUMP_PREFIX_NONE, 32, 4,
|
||||||
(const void *)d, sizeof(*d), false);
|
(const void *)d, sizeof(*d), false);
|
||||||
|
|
||||||
/* advance swhead */
|
/* advance swhead */
|
||||||
wil_vring_advance_head(vring, nr_frags + 1);
|
wil_vring_advance_head(vring, nr_frags + 1);
|
||||||
wil_dbg_TXRX(wil, "Tx swhead %d -> %d\n", swhead, vring->swhead);
|
wil_dbg_txrx(wil, "Tx swhead %d -> %d\n", swhead, vring->swhead);
|
||||||
iowrite32(vring->swhead, wil->csr + HOSTADDR(vring->hwtail));
|
iowrite32(vring->swhead, wil->csr + HOSTADDR(vring->hwtail));
|
||||||
/* hold reference to skb
|
/* hold reference to skb
|
||||||
* to prevent skb release before accounting
|
* to prevent skb release before accounting
|
||||||
|
@ -725,7 +725,7 @@ netdev_tx_t wil_start_xmit(struct sk_buff *skb, struct net_device *ndev)
|
||||||
struct vring *vring;
|
struct vring *vring;
|
||||||
int rc;
|
int rc;
|
||||||
|
|
||||||
wil_dbg_TXRX(wil, "%s()\n", __func__);
|
wil_dbg_txrx(wil, "%s()\n", __func__);
|
||||||
if (!test_bit(wil_status_fwready, &wil->status)) {
|
if (!test_bit(wil_status_fwready, &wil->status)) {
|
||||||
wil_err(wil, "FW not ready\n");
|
wil_err(wil, "FW not ready\n");
|
||||||
goto drop;
|
goto drop;
|
||||||
|
@ -785,7 +785,7 @@ void wil_tx_complete(struct wil6210_priv *wil, int ringid)
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
wil_dbg_TXRX(wil, "%s(%d)\n", __func__, ringid);
|
wil_dbg_txrx(wil, "%s(%d)\n", __func__, ringid);
|
||||||
|
|
||||||
while (!wil_vring_is_empty(vring)) {
|
while (!wil_vring_is_empty(vring)) {
|
||||||
volatile struct vring_tx_desc *d = &vring->va[vring->swtail].tx;
|
volatile struct vring_tx_desc *d = &vring->va[vring->swtail].tx;
|
||||||
|
@ -794,11 +794,11 @@ void wil_tx_complete(struct wil6210_priv *wil, int ringid)
|
||||||
if (!(d->dma.status & TX_DMA_STATUS_DU))
|
if (!(d->dma.status & TX_DMA_STATUS_DU))
|
||||||
break;
|
break;
|
||||||
|
|
||||||
wil_dbg_TXRX(wil,
|
wil_dbg_txrx(wil,
|
||||||
"Tx[%3d] : %d bytes, status 0x%02x err 0x%02x\n",
|
"Tx[%3d] : %d bytes, status 0x%02x err 0x%02x\n",
|
||||||
vring->swtail, d->dma.length, d->dma.status,
|
vring->swtail, d->dma.length, d->dma.status,
|
||||||
d->dma.error);
|
d->dma.error);
|
||||||
wil_hex_dump_TXRX("TxC ", DUMP_PREFIX_NONE, 32, 4,
|
wil_hex_dump_txrx("TxC ", DUMP_PREFIX_NONE, 32, 4,
|
||||||
(const void *)d, sizeof(*d), false);
|
(const void *)d, sizeof(*d), false);
|
||||||
|
|
||||||
pa = d->dma.addr_low | ((u64)d->dma.addr_high << 32);
|
pa = d->dma.addr_low | ((u64)d->dma.addr_high << 32);
|
||||||
|
|
|
@ -270,18 +270,18 @@ struct wil6210_priv {
|
||||||
#define wil_info(wil, fmt, arg...) netdev_info(wil_to_ndev(wil), fmt, ##arg)
|
#define wil_info(wil, fmt, arg...) netdev_info(wil_to_ndev(wil), fmt, ##arg)
|
||||||
#define wil_err(wil, fmt, arg...) netdev_err(wil_to_ndev(wil), fmt, ##arg)
|
#define wil_err(wil, fmt, arg...) netdev_err(wil_to_ndev(wil), fmt, ##arg)
|
||||||
|
|
||||||
#define wil_dbg_IRQ(wil, fmt, arg...) wil_dbg(wil, "DBG[ IRQ]" fmt, ##arg)
|
#define wil_dbg_irq(wil, fmt, arg...) wil_dbg(wil, "DBG[ IRQ]" fmt, ##arg)
|
||||||
#define wil_dbg_TXRX(wil, fmt, arg...) wil_dbg(wil, "DBG[TXRX]" fmt, ##arg)
|
#define wil_dbg_txrx(wil, fmt, arg...) wil_dbg(wil, "DBG[TXRX]" fmt, ##arg)
|
||||||
#define wil_dbg_WMI(wil, fmt, arg...) wil_dbg(wil, "DBG[ WMI]" fmt, ##arg)
|
#define wil_dbg_wmi(wil, fmt, arg...) wil_dbg(wil, "DBG[ WMI]" fmt, ##arg)
|
||||||
#define wil_dbg_MISC(wil, fmt, arg...) wil_dbg(wil, "DBG[MISC]" fmt, ##arg)
|
#define wil_dbg_misc(wil, fmt, arg...) wil_dbg(wil, "DBG[MISC]" fmt, ##arg)
|
||||||
|
|
||||||
#define wil_hex_dump_TXRX(prefix_str, prefix_type, rowsize, \
|
#define wil_hex_dump_txrx(prefix_str, prefix_type, rowsize, \
|
||||||
groupsize, buf, len, ascii) \
|
groupsize, buf, len, ascii) \
|
||||||
wil_print_hex_dump_debug("DBG[TXRX]" prefix_str,\
|
wil_print_hex_dump_debug("DBG[TXRX]" prefix_str,\
|
||||||
prefix_type, rowsize, \
|
prefix_type, rowsize, \
|
||||||
groupsize, buf, len, ascii)
|
groupsize, buf, len, ascii)
|
||||||
|
|
||||||
#define wil_hex_dump_WMI(prefix_str, prefix_type, rowsize, \
|
#define wil_hex_dump_wmi(prefix_str, prefix_type, rowsize, \
|
||||||
groupsize, buf, len, ascii) \
|
groupsize, buf, len, ascii) \
|
||||||
wil_print_hex_dump_debug("DBG[ WMI]" prefix_str,\
|
wil_print_hex_dump_debug("DBG[ WMI]" prefix_str,\
|
||||||
prefix_type, rowsize, \
|
prefix_type, rowsize, \
|
||||||
|
|
|
@ -215,7 +215,7 @@ static int __wmi_send(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len)
|
||||||
}
|
}
|
||||||
/* next head */
|
/* next head */
|
||||||
next_head = r->base + ((r->head - r->base + sizeof(d_head)) % r->size);
|
next_head = r->base + ((r->head - r->base + sizeof(d_head)) % r->size);
|
||||||
wil_dbg_WMI(wil, "Head 0x%08x -> 0x%08x\n", r->head, next_head);
|
wil_dbg_wmi(wil, "Head 0x%08x -> 0x%08x\n", r->head, next_head);
|
||||||
/* wait till FW finish with previous command */
|
/* wait till FW finish with previous command */
|
||||||
for (retry = 5; retry > 0; retry--) {
|
for (retry = 5; retry > 0; retry--) {
|
||||||
r->tail = ioread32(wil->csr + HOST_MBOX +
|
r->tail = ioread32(wil->csr + HOST_MBOX +
|
||||||
|
@ -236,10 +236,10 @@ static int __wmi_send(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len)
|
||||||
}
|
}
|
||||||
cmd.hdr.seq = cpu_to_le16(++wil->wmi_seq);
|
cmd.hdr.seq = cpu_to_le16(++wil->wmi_seq);
|
||||||
/* set command */
|
/* set command */
|
||||||
wil_dbg_WMI(wil, "WMI command 0x%04x [%d]\n", cmdid, len);
|
wil_dbg_wmi(wil, "WMI command 0x%04x [%d]\n", cmdid, len);
|
||||||
wil_hex_dump_WMI("Cmd ", DUMP_PREFIX_OFFSET, 16, 1, &cmd,
|
wil_hex_dump_wmi("Cmd ", DUMP_PREFIX_OFFSET, 16, 1, &cmd,
|
||||||
sizeof(cmd), true);
|
sizeof(cmd), true);
|
||||||
wil_hex_dump_WMI("cmd ", DUMP_PREFIX_OFFSET, 16, 1, buf,
|
wil_hex_dump_wmi("cmd ", DUMP_PREFIX_OFFSET, 16, 1, buf,
|
||||||
len, true);
|
len, true);
|
||||||
wil_memcpy_toio_32(dst, &cmd, sizeof(cmd));
|
wil_memcpy_toio_32(dst, &cmd, sizeof(cmd));
|
||||||
wil_memcpy_toio_32(dst + sizeof(cmd), buf, len);
|
wil_memcpy_toio_32(dst + sizeof(cmd), buf, len);
|
||||||
|
@ -275,7 +275,7 @@ static void wmi_evt_ready(struct wil6210_priv *wil, int id, void *d, int len)
|
||||||
struct wmi_ready_event *evt = d;
|
struct wmi_ready_event *evt = d;
|
||||||
u32 ver = le32_to_cpu(evt->sw_version);
|
u32 ver = le32_to_cpu(evt->sw_version);
|
||||||
|
|
||||||
wil_dbg_WMI(wil, "FW ver. %d; MAC %pM\n", ver, evt->mac);
|
wil_dbg_wmi(wil, "FW ver. %d; MAC %pM\n", ver, evt->mac);
|
||||||
|
|
||||||
if (!is_valid_ether_addr(ndev->dev_addr)) {
|
if (!is_valid_ether_addr(ndev->dev_addr)) {
|
||||||
memcpy(ndev->dev_addr, evt->mac, ETH_ALEN);
|
memcpy(ndev->dev_addr, evt->mac, ETH_ALEN);
|
||||||
|
@ -288,7 +288,7 @@ static void wmi_evt_ready(struct wil6210_priv *wil, int id, void *d, int len)
|
||||||
static void wmi_evt_fw_ready(struct wil6210_priv *wil, int id, void *d,
|
static void wmi_evt_fw_ready(struct wil6210_priv *wil, int id, void *d,
|
||||||
int len)
|
int len)
|
||||||
{
|
{
|
||||||
wil_dbg_WMI(wil, "WMI: FW ready\n");
|
wil_dbg_wmi(wil, "WMI: FW ready\n");
|
||||||
|
|
||||||
set_bit(wil_status_fwready, &wil->status);
|
set_bit(wil_status_fwready, &wil->status);
|
||||||
/* reuse wmi_ready for the firmware ready indication */
|
/* reuse wmi_ready for the firmware ready indication */
|
||||||
|
@ -311,11 +311,11 @@ static void wmi_evt_rx_mgmt(struct wil6210_priv *wil, int id, void *d, int len)
|
||||||
u32 d_len = le32_to_cpu(data->info.len);
|
u32 d_len = le32_to_cpu(data->info.len);
|
||||||
u16 d_status = le16_to_cpu(data->info.status);
|
u16 d_status = le16_to_cpu(data->info.status);
|
||||||
|
|
||||||
wil_dbg_WMI(wil, "MGMT: channel %d MCS %d SNR %d\n",
|
wil_dbg_wmi(wil, "MGMT: channel %d MCS %d SNR %d\n",
|
||||||
data->info.channel, data->info.mcs, data->info.snr);
|
data->info.channel, data->info.mcs, data->info.snr);
|
||||||
wil_dbg_WMI(wil, "status 0x%04x len %d stype %04x\n", d_status, d_len,
|
wil_dbg_wmi(wil, "status 0x%04x len %d stype %04x\n", d_status, d_len,
|
||||||
le16_to_cpu(data->info.stype));
|
le16_to_cpu(data->info.stype));
|
||||||
wil_dbg_WMI(wil, "qid %d mid %d cid %d\n",
|
wil_dbg_wmi(wil, "qid %d mid %d cid %d\n",
|
||||||
data->info.qid, data->info.mid, data->info.cid);
|
data->info.qid, data->info.mid, data->info.cid);
|
||||||
|
|
||||||
if (!channel) {
|
if (!channel) {
|
||||||
|
@ -331,13 +331,13 @@ static void wmi_evt_rx_mgmt(struct wil6210_priv *wil, int id, void *d, int len)
|
||||||
const u8 *ie_buf = rx_mgmt_frame->u.beacon.variable;
|
const u8 *ie_buf = rx_mgmt_frame->u.beacon.variable;
|
||||||
size_t ie_len = d_len - offsetof(struct ieee80211_mgmt,
|
size_t ie_len = d_len - offsetof(struct ieee80211_mgmt,
|
||||||
u.beacon.variable);
|
u.beacon.variable);
|
||||||
wil_dbg_WMI(wil, "Capability info : 0x%04x\n", cap);
|
wil_dbg_wmi(wil, "Capability info : 0x%04x\n", cap);
|
||||||
|
|
||||||
bss = cfg80211_inform_bss(wiphy, channel, rx_mgmt_frame->bssid,
|
bss = cfg80211_inform_bss(wiphy, channel, rx_mgmt_frame->bssid,
|
||||||
tsf, cap, bi, ie_buf, ie_len,
|
tsf, cap, bi, ie_buf, ie_len,
|
||||||
signal, GFP_KERNEL);
|
signal, GFP_KERNEL);
|
||||||
if (bss) {
|
if (bss) {
|
||||||
wil_dbg_WMI(wil, "Added BSS %pM\n",
|
wil_dbg_wmi(wil, "Added BSS %pM\n",
|
||||||
rx_mgmt_frame->bssid);
|
rx_mgmt_frame->bssid);
|
||||||
cfg80211_put_bss(bss);
|
cfg80211_put_bss(bss);
|
||||||
} else {
|
} else {
|
||||||
|
@ -353,7 +353,7 @@ static void wmi_evt_scan_complete(struct wil6210_priv *wil, int id,
|
||||||
struct wmi_scan_complete_event *data = d;
|
struct wmi_scan_complete_event *data = d;
|
||||||
bool aborted = (data->status != 0);
|
bool aborted = (data->status != 0);
|
||||||
|
|
||||||
wil_dbg_WMI(wil, "SCAN_COMPLETE(0x%08x)\n", data->status);
|
wil_dbg_wmi(wil, "SCAN_COMPLETE(0x%08x)\n", data->status);
|
||||||
cfg80211_scan_done(wil->scan_request, aborted);
|
cfg80211_scan_done(wil->scan_request, aborted);
|
||||||
wil->scan_request = NULL;
|
wil->scan_request = NULL;
|
||||||
} else {
|
} else {
|
||||||
|
@ -388,9 +388,9 @@ static void wmi_evt_connect(struct wil6210_priv *wil, int id, void *d, int len)
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
ch = evt->channel + 1;
|
ch = evt->channel + 1;
|
||||||
wil_dbg_WMI(wil, "Connect %pM channel [%d] cid %d\n",
|
wil_dbg_wmi(wil, "Connect %pM channel [%d] cid %d\n",
|
||||||
evt->bssid, ch, evt->cid);
|
evt->bssid, ch, evt->cid);
|
||||||
wil_hex_dump_WMI("connect AI : ", DUMP_PREFIX_OFFSET, 16, 1,
|
wil_hex_dump_wmi("connect AI : ", DUMP_PREFIX_OFFSET, 16, 1,
|
||||||
evt->assoc_info, len - sizeof(*evt), true);
|
evt->assoc_info, len - sizeof(*evt), true);
|
||||||
|
|
||||||
/* figure out IE's */
|
/* figure out IE's */
|
||||||
|
@ -452,7 +452,7 @@ static void wmi_evt_disconnect(struct wil6210_priv *wil, int id,
|
||||||
{
|
{
|
||||||
struct wmi_disconnect_event *evt = d;
|
struct wmi_disconnect_event *evt = d;
|
||||||
|
|
||||||
wil_dbg_WMI(wil, "Disconnect %pM reason %d proto %d wmi\n",
|
wil_dbg_wmi(wil, "Disconnect %pM reason %d proto %d wmi\n",
|
||||||
evt->bssid,
|
evt->bssid,
|
||||||
evt->protocol_reason_status, evt->disconnect_reason);
|
evt->protocol_reason_status, evt->disconnect_reason);
|
||||||
|
|
||||||
|
@ -477,7 +477,7 @@ static void wmi_evt_notify(struct wil6210_priv *wil, int id, void *d, int len)
|
||||||
wil->stats.my_tx_sector = le16_to_cpu(evt->my_tx_sector);
|
wil->stats.my_tx_sector = le16_to_cpu(evt->my_tx_sector);
|
||||||
wil->stats.peer_rx_sector = le16_to_cpu(evt->other_rx_sector);
|
wil->stats.peer_rx_sector = le16_to_cpu(evt->other_rx_sector);
|
||||||
wil->stats.peer_tx_sector = le16_to_cpu(evt->other_tx_sector);
|
wil->stats.peer_tx_sector = le16_to_cpu(evt->other_tx_sector);
|
||||||
wil_dbg_WMI(wil, "Link status, MCS %d TSF 0x%016llx\n"
|
wil_dbg_wmi(wil, "Link status, MCS %d TSF 0x%016llx\n"
|
||||||
"BF status 0x%08x SNR 0x%08x\n"
|
"BF status 0x%08x SNR 0x%08x\n"
|
||||||
"Tx Tpt %d goodput %d Rx goodput %d\n"
|
"Tx Tpt %d goodput %d Rx goodput %d\n"
|
||||||
"Sectors(rx:tx) my %d:%d peer %d:%d\n",
|
"Sectors(rx:tx) my %d:%d peer %d:%d\n",
|
||||||
|
@ -502,7 +502,7 @@ static void wmi_evt_eapol_rx(struct wil6210_priv *wil, int id,
|
||||||
struct sk_buff *skb;
|
struct sk_buff *skb;
|
||||||
struct ethhdr *eth;
|
struct ethhdr *eth;
|
||||||
|
|
||||||
wil_dbg_WMI(wil, "EAPOL len %d from %pM\n", eapol_len,
|
wil_dbg_wmi(wil, "EAPOL len %d from %pM\n", eapol_len,
|
||||||
evt->src_mac);
|
evt->src_mac);
|
||||||
|
|
||||||
if (eapol_len > 196) { /* TODO: revisit size limit */
|
if (eapol_len > 196) { /* TODO: revisit size limit */
|
||||||
|
@ -600,15 +600,15 @@ void wmi_recv_cmd(struct wil6210_priv *wil)
|
||||||
iowrite32(0, wil->csr + HOSTADDR(r->tail) +
|
iowrite32(0, wil->csr + HOSTADDR(r->tail) +
|
||||||
offsetof(struct wil6210_mbox_ring_desc, sync));
|
offsetof(struct wil6210_mbox_ring_desc, sync));
|
||||||
/* indicate */
|
/* indicate */
|
||||||
wil_dbg_WMI(wil, "Mbox evt %04x %04x %04x %02x\n",
|
wil_dbg_wmi(wil, "Mbox evt %04x %04x %04x %02x\n",
|
||||||
le16_to_cpu(hdr.seq), len, le16_to_cpu(hdr.type),
|
le16_to_cpu(hdr.seq), len, le16_to_cpu(hdr.type),
|
||||||
hdr.flags);
|
hdr.flags);
|
||||||
if ((hdr.type == WIL_MBOX_HDR_TYPE_WMI) &&
|
if ((hdr.type == WIL_MBOX_HDR_TYPE_WMI) &&
|
||||||
(len >= sizeof(struct wil6210_mbox_hdr_wmi))) {
|
(len >= sizeof(struct wil6210_mbox_hdr_wmi))) {
|
||||||
wil_dbg_WMI(wil, "WMI event 0x%04x\n",
|
wil_dbg_wmi(wil, "WMI event 0x%04x\n",
|
||||||
evt->event.wmi.id);
|
evt->event.wmi.id);
|
||||||
}
|
}
|
||||||
wil_hex_dump_WMI("evt ", DUMP_PREFIX_OFFSET, 16, 1,
|
wil_hex_dump_wmi("evt ", DUMP_PREFIX_OFFSET, 16, 1,
|
||||||
&evt->event.hdr, sizeof(hdr) + len, true);
|
&evt->event.hdr, sizeof(hdr) + len, true);
|
||||||
|
|
||||||
/* advance tail */
|
/* advance tail */
|
||||||
|
@ -624,7 +624,7 @@ void wmi_recv_cmd(struct wil6210_priv *wil)
|
||||||
{
|
{
|
||||||
int q = queue_work(wil->wmi_wq,
|
int q = queue_work(wil->wmi_wq,
|
||||||
&wil->wmi_event_worker);
|
&wil->wmi_event_worker);
|
||||||
wil_dbg_WMI(wil, "queue_work -> %d\n", q);
|
wil_dbg_wmi(wil, "queue_work -> %d\n", q);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -651,7 +651,7 @@ int wmi_call(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len,
|
||||||
cmdid, reply_id, to_msec);
|
cmdid, reply_id, to_msec);
|
||||||
rc = -ETIME;
|
rc = -ETIME;
|
||||||
} else {
|
} else {
|
||||||
wil_dbg_WMI(wil,
|
wil_dbg_wmi(wil,
|
||||||
"wmi_call(0x%04x->0x%04x) completed in %d msec\n",
|
"wmi_call(0x%04x->0x%04x) completed in %d msec\n",
|
||||||
cmdid, reply_id,
|
cmdid, reply_id,
|
||||||
to_msec - jiffies_to_msecs(remain));
|
to_msec - jiffies_to_msecs(remain));
|
||||||
|
@ -681,7 +681,7 @@ int wmi_set_mac_address(struct wil6210_priv *wil, void *addr)
|
||||||
|
|
||||||
memcpy(cmd.mac, addr, ETH_ALEN);
|
memcpy(cmd.mac, addr, ETH_ALEN);
|
||||||
|
|
||||||
wil_dbg_WMI(wil, "Set MAC %pM\n", addr);
|
wil_dbg_wmi(wil, "Set MAC %pM\n", addr);
|
||||||
|
|
||||||
return wmi_send(wil, WMI_SET_MAC_ADDRESS_CMDID, &cmd, sizeof(cmd));
|
return wmi_send(wil, WMI_SET_MAC_ADDRESS_CMDID, &cmd, sizeof(cmd));
|
||||||
}
|
}
|
||||||
|
@ -779,7 +779,7 @@ int wmi_tx_eapol(struct wil6210_priv *wil, struct sk_buff *skb)
|
||||||
|
|
||||||
skb_set_mac_header(skb, 0);
|
skb_set_mac_header(skb, 0);
|
||||||
eth = eth_hdr(skb);
|
eth = eth_hdr(skb);
|
||||||
wil_dbg_WMI(wil, "EAPOL %d bytes to %pM\n", eapol_len, eth->h_dest);
|
wil_dbg_wmi(wil, "EAPOL %d bytes to %pM\n", eapol_len, eth->h_dest);
|
||||||
for (i = 0; i < ARRAY_SIZE(wil->vring_tx); i++) {
|
for (i = 0; i < ARRAY_SIZE(wil->vring_tx); i++) {
|
||||||
if (memcmp(wil->dst_addr[i], eth->h_dest, ETH_ALEN) == 0)
|
if (memcmp(wil->dst_addr[i], eth->h_dest, ETH_ALEN) == 0)
|
||||||
goto found_dest;
|
goto found_dest;
|
||||||
|
@ -894,7 +894,7 @@ int wmi_rx_chain_add(struct wil6210_priv *wil, struct vring *vring)
|
||||||
|
|
||||||
vring->hwtail = le32_to_cpu(evt.evt.rx_ring_tail_ptr);
|
vring->hwtail = le32_to_cpu(evt.evt.rx_ring_tail_ptr);
|
||||||
|
|
||||||
wil_dbg_MISC(wil, "Rx init: status %d tail 0x%08x\n",
|
wil_dbg_misc(wil, "Rx init: status %d tail 0x%08x\n",
|
||||||
le32_to_cpu(evt.evt.status), vring->hwtail);
|
le32_to_cpu(evt.evt.status), vring->hwtail);
|
||||||
|
|
||||||
if (le32_to_cpu(evt.evt.status) != WMI_CFG_RX_CHAIN_SUCCESS)
|
if (le32_to_cpu(evt.evt.status) != WMI_CFG_RX_CHAIN_SUCCESS)
|
||||||
|
@ -929,7 +929,7 @@ void wmi_event_flush(struct wil6210_priv *wil)
|
||||||
{
|
{
|
||||||
struct pending_wmi_event *evt, *t;
|
struct pending_wmi_event *evt, *t;
|
||||||
|
|
||||||
wil_dbg_WMI(wil, "%s()\n", __func__);
|
wil_dbg_wmi(wil, "%s()\n", __func__);
|
||||||
|
|
||||||
list_for_each_entry_safe(evt, t, &wil->pending_wmi_ev, list) {
|
list_for_each_entry_safe(evt, t, &wil->pending_wmi_ev, list) {
|
||||||
list_del(&evt->list);
|
list_del(&evt->list);
|
||||||
|
@ -971,7 +971,7 @@ static void wmi_event_handle(struct wil6210_priv *wil,
|
||||||
wmi_evt_call_handler(wil, id, evt_data,
|
wmi_evt_call_handler(wil, id, evt_data,
|
||||||
len - sizeof(*wmi));
|
len - sizeof(*wmi));
|
||||||
}
|
}
|
||||||
wil_dbg_WMI(wil, "Complete WMI 0x%04x\n", id);
|
wil_dbg_wmi(wil, "Complete WMI 0x%04x\n", id);
|
||||||
complete(&wil->wmi_ready);
|
complete(&wil->wmi_ready);
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
@ -1036,7 +1036,7 @@ void wmi_connect_worker(struct work_struct *work)
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
wil_dbg_WMI(wil, "Configure for connection CID %d\n",
|
wil_dbg_wmi(wil, "Configure for connection CID %d\n",
|
||||||
wil->pending_connect_cid);
|
wil->pending_connect_cid);
|
||||||
|
|
||||||
rc = wil_vring_init_tx(wil, 0, WIL6210_TX_RING_SIZE,
|
rc = wil_vring_init_tx(wil, 0, WIL6210_TX_RING_SIZE,
|
||||||
|
|
Loading…
Reference in New Issue