drm/rockchip: Add support for afbc
This patch adds support for afbc handling. afbc is a compressed format which reduces the necessary memory bandwidth. Co-developed-by: Mark Yao <mark.yao@rock-chips.com> Signed-off-by: Mark Yao <mark.yao@rock-chips.com> Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@collabora.com> Reviewed-by: Sandy Huang <hjc@rock-chips.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200311145541.29186-7-andrzej.p@collabora.com
This commit is contained in:
Andrzej Pietrasiewicz
parent
7f60c4b9d9
commit
7707f7227f
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@ -30,6 +30,7 @@ struct rockchip_crtc_state {
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int output_mode;
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int output_bpc;
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int output_flags;
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bool enable_afbc;
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};
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#define to_rockchip_crtc_state(s) \
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container_of(s, struct rockchip_crtc_state, base)
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@ -57,8 +57,49 @@ static const struct drm_mode_config_helper_funcs rockchip_mode_config_helpers =
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.atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
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};
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static struct drm_framebuffer *
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rockchip_fb_create(struct drm_device *dev, struct drm_file *file,
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const struct drm_mode_fb_cmd2 *mode_cmd)
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{
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struct drm_afbc_framebuffer *afbc_fb;
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const struct drm_format_info *info;
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int ret;
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info = drm_get_format_info(dev, mode_cmd);
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if (!info)
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return ERR_PTR(-ENOMEM);
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afbc_fb = kzalloc(sizeof(*afbc_fb), GFP_KERNEL);
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if (!afbc_fb)
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return ERR_PTR(-ENOMEM);
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ret = drm_gem_fb_init_with_funcs(dev, &afbc_fb->base, file, mode_cmd,
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&rockchip_drm_fb_funcs);
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if (ret) {
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kfree(afbc_fb);
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return ERR_PTR(ret);
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}
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if (drm_is_afbc(mode_cmd->modifier[0])) {
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int ret, i;
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ret = drm_gem_fb_afbc_init(dev, mode_cmd, afbc_fb);
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if (ret) {
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struct drm_gem_object **obj = afbc_fb->base.obj;
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for (i = 0; i < info->num_planes; ++i)
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drm_gem_object_put_unlocked(obj[i]);
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kfree(afbc_fb);
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return ERR_PTR(ret);
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}
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}
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return &afbc_fb->base;
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}
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static const struct drm_mode_config_funcs rockchip_drm_mode_config_funcs = {
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.fb_create = drm_gem_fb_create_with_dirty,
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.fb_create = rockchip_fb_create,
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.output_poll_changed = drm_fb_helper_output_poll_changed,
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.atomic_check = drm_atomic_helper_check,
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.atomic_commit = drm_atomic_helper_commit,
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@ -91,9 +91,22 @@
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#define VOP_WIN_TO_INDEX(vop_win) \
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((vop_win) - (vop_win)->vop->win)
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#define VOP_AFBC_SET(vop, name, v) \
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do { \
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if ((vop)->data->afbc) \
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vop_reg_set((vop), &(vop)->data->afbc->name, \
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0, ~0, v, #name); \
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} while (0)
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#define to_vop(x) container_of(x, struct vop, crtc)
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#define to_vop_win(x) container_of(x, struct vop_win, base)
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#define AFBC_FMT_RGB565 0x0
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#define AFBC_FMT_U8U8U8U8 0x5
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#define AFBC_FMT_U8U8U8 0x4
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#define AFBC_TILE_16x16 BIT(4)
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/*
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* The coefficients of the following matrix are all fixed points.
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* The format is S2.10 for the 3x3 part of the matrix, and S9.12 for the offsets.
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@ -274,6 +287,29 @@ static enum vop_data_format vop_convert_format(uint32_t format)
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}
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}
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static int vop_convert_afbc_format(uint32_t format)
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{
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switch (format) {
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case DRM_FORMAT_XRGB8888:
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case DRM_FORMAT_ARGB8888:
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case DRM_FORMAT_XBGR8888:
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case DRM_FORMAT_ABGR8888:
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return AFBC_FMT_U8U8U8U8;
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case DRM_FORMAT_RGB888:
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case DRM_FORMAT_BGR888:
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return AFBC_FMT_U8U8U8;
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case DRM_FORMAT_RGB565:
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case DRM_FORMAT_BGR565:
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return AFBC_FMT_RGB565;
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/* either of the below should not be reachable */
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default:
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DRM_WARN_ONCE("unsupported AFBC format[%08x]\n", format);
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return -EINVAL;
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}
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return -EINVAL;
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}
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static uint16_t scl_vop_cal_scale(enum scale_mode mode, uint32_t src,
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uint32_t dst, bool is_horizontal,
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int vsu_mode, int *vskiplines)
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@ -598,6 +634,17 @@ static int vop_enable(struct drm_crtc *crtc, struct drm_crtc_state *old_state)
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vop_win_disable(vop, vop_win);
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}
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}
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if (vop->data->afbc) {
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struct rockchip_crtc_state *s;
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/*
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* Disable AFBC and forget there was a vop window with AFBC
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*/
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VOP_AFBC_SET(vop, enable, 0);
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s = to_rockchip_crtc_state(crtc->state);
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s->enable_afbc = false;
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}
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spin_unlock(&vop->reg_lock);
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vop_cfg_done(vop);
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@ -710,6 +757,26 @@ static void vop_plane_destroy(struct drm_plane *plane)
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drm_plane_cleanup(plane);
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}
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static inline bool rockchip_afbc(u64 modifier)
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{
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return modifier == ROCKCHIP_AFBC_MOD;
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}
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static bool rockchip_mod_supported(struct drm_plane *plane,
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u32 format, u64 modifier)
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{
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if (modifier == DRM_FORMAT_MOD_LINEAR)
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return true;
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if (!rockchip_afbc(modifier)) {
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DRM_DEBUG_KMS("Unsupported format modifer 0x%llx\n", modifier);
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return false;
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}
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return vop_convert_afbc_format(format) >= 0;
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}
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static int vop_plane_atomic_check(struct drm_plane *plane,
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struct drm_plane_state *state)
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{
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@ -758,6 +825,30 @@ static int vop_plane_atomic_check(struct drm_plane *plane,
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return -EINVAL;
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}
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if (rockchip_afbc(fb->modifier)) {
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struct vop *vop = to_vop(crtc);
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if (!vop->data->afbc) {
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DRM_ERROR("vop does not support AFBC\n");
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return -EINVAL;
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}
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ret = vop_convert_afbc_format(fb->format->format);
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if (ret < 0)
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return ret;
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if (state->src.x1 || state->src.y1) {
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DRM_ERROR("AFBC does not support offset display, xpos=%d, ypos=%d, offset=%d\n", state->src.x1, state->src.y1, fb->offsets[0]);
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return -EINVAL;
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}
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if (state->rotation && state->rotation != DRM_MODE_ROTATE_0) {
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DRM_ERROR("No rotation support in AFBC, rotation=%d\n",
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state->rotation);
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return -EINVAL;
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}
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}
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return 0;
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}
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@ -846,6 +937,16 @@ static void vop_plane_atomic_update(struct drm_plane *plane,
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spin_lock(&vop->reg_lock);
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if (rockchip_afbc(fb->modifier)) {
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int afbc_format = vop_convert_afbc_format(fb->format->format);
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VOP_AFBC_SET(vop, format, afbc_format | AFBC_TILE_16x16);
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VOP_AFBC_SET(vop, hreg_block_split, 0);
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VOP_AFBC_SET(vop, win_sel, VOP_WIN_TO_INDEX(vop_win));
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VOP_AFBC_SET(vop, hdr_ptr, dma_addr);
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VOP_AFBC_SET(vop, pic_size, act_info);
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}
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VOP_WIN_SET(vop, win, format, format);
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VOP_WIN_SET(vop, win, yrgb_vir, DIV_ROUND_UP(fb->pitches[0], 4));
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VOP_WIN_SET(vop, win, yrgb_mst, dma_addr);
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@ -1001,6 +1102,7 @@ static const struct drm_plane_funcs vop_plane_funcs = {
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.reset = drm_atomic_helper_plane_reset,
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.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
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.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
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.format_mod_supported = rockchip_mod_supported,
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};
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static int vop_crtc_enable_vblank(struct drm_crtc *crtc)
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@ -1310,6 +1412,10 @@ static int vop_crtc_atomic_check(struct drm_crtc *crtc,
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struct drm_crtc_state *crtc_state)
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{
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struct vop *vop = to_vop(crtc);
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struct drm_plane *plane;
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struct drm_plane_state *plane_state;
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struct rockchip_crtc_state *s;
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int afbc_planes = 0;
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if (vop->lut_regs && crtc_state->color_mgmt_changed &&
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crtc_state->gamma_lut) {
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@ -1323,6 +1429,27 @@ static int vop_crtc_atomic_check(struct drm_crtc *crtc,
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}
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}
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drm_atomic_crtc_state_for_each_plane(plane, crtc_state) {
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plane_state =
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drm_atomic_get_plane_state(crtc_state->state, plane);
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if (IS_ERR(plane_state)) {
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DRM_DEBUG_KMS("Cannot get plane state for plane %s\n",
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plane->name);
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return PTR_ERR(plane_state);
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}
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if (drm_is_afbc(plane_state->fb->modifier))
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++afbc_planes;
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}
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if (afbc_planes > 1) {
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DRM_DEBUG_KMS("Invalid number of AFBC planes; got %d, expected at most 1\n", afbc_planes);
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return -EINVAL;
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}
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s = to_rockchip_crtc_state(crtc_state);
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s->enable_afbc = afbc_planes > 0;
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return 0;
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}
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@ -1333,6 +1460,7 @@ static void vop_crtc_atomic_flush(struct drm_crtc *crtc,
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struct drm_plane_state *old_plane_state, *new_plane_state;
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struct vop *vop = to_vop(crtc);
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struct drm_plane *plane;
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struct rockchip_crtc_state *s;
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int i;
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if (WARN_ON(!vop->is_enabled))
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@ -1340,6 +1468,9 @@ static void vop_crtc_atomic_flush(struct drm_crtc *crtc,
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spin_lock(&vop->reg_lock);
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/* Enable AFBC if there is some AFBC window, disable otherwise. */
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s = to_rockchip_crtc_state(crtc->state);
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VOP_AFBC_SET(vop, enable, s->enable_afbc);
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vop_cfg_done(vop);
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spin_unlock(&vop->reg_lock);
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@ -1634,7 +1765,8 @@ static int vop_create_crtc(struct vop *vop)
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0, &vop_plane_funcs,
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win_data->phy->data_formats,
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win_data->phy->nformats,
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NULL, win_data->type, NULL);
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win_data->phy->format_modifiers,
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win_data->type, NULL);
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if (ret) {
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DRM_DEV_ERROR(vop->dev, "failed to init plane %d\n",
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ret);
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@ -1678,7 +1810,8 @@ static int vop_create_crtc(struct vop *vop)
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&vop_plane_funcs,
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win_data->phy->data_formats,
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win_data->phy->nformats,
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NULL, win_data->type, NULL);
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win_data->phy->format_modifiers,
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win_data->type, NULL);
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if (ret) {
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DRM_DEV_ERROR(vop->dev, "failed to init overlay %d\n",
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ret);
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@ -17,6 +17,11 @@
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#define NUM_YUV2YUV_COEFFICIENTS 12
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#define ROCKCHIP_AFBC_MOD \
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DRM_FORMAT_MOD_ARM_AFBC( \
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AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 | AFBC_FORMAT_MOD_SPARSE \
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)
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enum vop_data_format {
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VOP_FMT_ARGB8888 = 0,
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VOP_FMT_RGB888,
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@ -34,6 +39,16 @@ struct vop_reg {
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bool relaxed;
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};
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struct vop_afbc {
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struct vop_reg enable;
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struct vop_reg win_sel;
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struct vop_reg format;
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struct vop_reg hreg_block_split;
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struct vop_reg pic_size;
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struct vop_reg hdr_ptr;
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struct vop_reg rstn;
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};
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struct vop_modeset {
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struct vop_reg htotal_pw;
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struct vop_reg hact_st_end;
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@ -134,6 +149,7 @@ struct vop_win_phy {
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const struct vop_scl_regs *scl;
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const uint32_t *data_formats;
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uint32_t nformats;
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const uint64_t *format_modifiers;
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struct vop_reg enable;
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struct vop_reg gate;
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@ -173,6 +189,7 @@ struct vop_data {
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const struct vop_misc *misc;
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const struct vop_modeset *modeset;
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const struct vop_output *output;
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const struct vop_afbc *afbc;
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const struct vop_win_yuv2yuv_data *win_yuv2yuv;
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const struct vop_win_data *win;
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unsigned int win_size;
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@ -50,6 +50,17 @@ static const uint32_t formats_win_full[] = {
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DRM_FORMAT_NV24,
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};
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static const uint64_t format_modifiers_win_full[] = {
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DRM_FORMAT_MOD_LINEAR,
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DRM_FORMAT_MOD_INVALID,
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};
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static const uint64_t format_modifiers_win_full_afbc[] = {
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ROCKCHIP_AFBC_MOD,
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DRM_FORMAT_MOD_LINEAR,
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DRM_FORMAT_MOD_INVALID,
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};
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static const uint32_t formats_win_lite[] = {
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DRM_FORMAT_XRGB8888,
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DRM_FORMAT_ARGB8888,
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@ -61,6 +72,11 @@ static const uint32_t formats_win_lite[] = {
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DRM_FORMAT_BGR565,
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};
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static const uint64_t format_modifiers_win_lite[] = {
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DRM_FORMAT_MOD_LINEAR,
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DRM_FORMAT_MOD_INVALID,
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};
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static const struct vop_scl_regs rk3036_win_scl = {
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.scale_yrgb_x = VOP_REG(RK3036_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),
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.scale_yrgb_y = VOP_REG(RK3036_WIN0_SCL_FACTOR_YRGB, 0xffff, 16),
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@ -72,6 +88,7 @@ static const struct vop_win_phy rk3036_win0_data = {
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.scl = &rk3036_win_scl,
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.data_formats = formats_win_full,
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.nformats = ARRAY_SIZE(formats_win_full),
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.format_modifiers = format_modifiers_win_full,
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.enable = VOP_REG(RK3036_SYS_CTRL, 0x1, 0),
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.format = VOP_REG(RK3036_SYS_CTRL, 0x7, 3),
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.rb_swap = VOP_REG(RK3036_SYS_CTRL, 0x1, 15),
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@ -87,6 +104,7 @@ static const struct vop_win_phy rk3036_win0_data = {
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static const struct vop_win_phy rk3036_win1_data = {
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.data_formats = formats_win_lite,
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.nformats = ARRAY_SIZE(formats_win_lite),
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.format_modifiers = format_modifiers_win_lite,
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.enable = VOP_REG(RK3036_SYS_CTRL, 0x1, 1),
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.format = VOP_REG(RK3036_SYS_CTRL, 0x7, 6),
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.rb_swap = VOP_REG(RK3036_SYS_CTRL, 0x1, 19),
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@ -153,6 +171,7 @@ static const struct vop_data rk3036_vop = {
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static const struct vop_win_phy rk3126_win1_data = {
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.data_formats = formats_win_lite,
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.nformats = ARRAY_SIZE(formats_win_lite),
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.format_modifiers = format_modifiers_win_lite,
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.enable = VOP_REG(RK3036_SYS_CTRL, 0x1, 1),
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.format = VOP_REG(RK3036_SYS_CTRL, 0x7, 6),
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.rb_swap = VOP_REG(RK3036_SYS_CTRL, 0x1, 19),
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@ -234,6 +253,7 @@ static const struct vop_win_phy px30_win0_data = {
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.scl = &px30_win_scl,
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.data_formats = formats_win_full,
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.nformats = ARRAY_SIZE(formats_win_full),
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.format_modifiers = format_modifiers_win_full,
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.enable = VOP_REG(PX30_WIN0_CTRL0, 0x1, 0),
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.format = VOP_REG(PX30_WIN0_CTRL0, 0x7, 1),
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.rb_swap = VOP_REG(PX30_WIN0_CTRL0, 0x1, 12),
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@ -249,6 +269,7 @@ static const struct vop_win_phy px30_win0_data = {
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static const struct vop_win_phy px30_win1_data = {
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.data_formats = formats_win_lite,
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.nformats = ARRAY_SIZE(formats_win_lite),
|
||||
.format_modifiers = format_modifiers_win_lite,
|
||||
.enable = VOP_REG(PX30_WIN1_CTRL0, 0x1, 0),
|
||||
.format = VOP_REG(PX30_WIN1_CTRL0, 0x7, 4),
|
||||
.rb_swap = VOP_REG(PX30_WIN1_CTRL0, 0x1, 12),
|
||||
|
|
@ -261,6 +282,7 @@ static const struct vop_win_phy px30_win1_data = {
|
|||
static const struct vop_win_phy px30_win2_data = {
|
||||
.data_formats = formats_win_lite,
|
||||
.nformats = ARRAY_SIZE(formats_win_lite),
|
||||
.format_modifiers = format_modifiers_win_lite,
|
||||
.gate = VOP_REG(PX30_WIN2_CTRL0, 0x1, 4),
|
||||
.enable = VOP_REG(PX30_WIN2_CTRL0, 0x1, 0),
|
||||
.format = VOP_REG(PX30_WIN2_CTRL0, 0x3, 5),
|
||||
|
|
@ -316,6 +338,7 @@ static const struct vop_win_phy rk3066_win0_data = {
|
|||
.scl = &rk3066_win_scl,
|
||||
.data_formats = formats_win_full,
|
||||
.nformats = ARRAY_SIZE(formats_win_full),
|
||||
.format_modifiers = format_modifiers_win_full,
|
||||
.enable = VOP_REG(RK3066_SYS_CTRL1, 0x1, 0),
|
||||
.format = VOP_REG(RK3066_SYS_CTRL0, 0x7, 4),
|
||||
.rb_swap = VOP_REG(RK3066_SYS_CTRL0, 0x1, 19),
|
||||
|
|
@ -332,6 +355,7 @@ static const struct vop_win_phy rk3066_win1_data = {
|
|||
.scl = &rk3066_win_scl,
|
||||
.data_formats = formats_win_full,
|
||||
.nformats = ARRAY_SIZE(formats_win_full),
|
||||
.format_modifiers = format_modifiers_win_full,
|
||||
.enable = VOP_REG(RK3066_SYS_CTRL1, 0x1, 1),
|
||||
.format = VOP_REG(RK3066_SYS_CTRL0, 0x7, 7),
|
||||
.rb_swap = VOP_REG(RK3066_SYS_CTRL0, 0x1, 23),
|
||||
|
|
@ -347,6 +371,7 @@ static const struct vop_win_phy rk3066_win1_data = {
|
|||
static const struct vop_win_phy rk3066_win2_data = {
|
||||
.data_formats = formats_win_lite,
|
||||
.nformats = ARRAY_SIZE(formats_win_lite),
|
||||
.format_modifiers = format_modifiers_win_lite,
|
||||
.enable = VOP_REG(RK3066_SYS_CTRL1, 0x1, 2),
|
||||
.format = VOP_REG(RK3066_SYS_CTRL0, 0x7, 10),
|
||||
.rb_swap = VOP_REG(RK3066_SYS_CTRL0, 0x1, 27),
|
||||
|
|
@ -426,6 +451,7 @@ static const struct vop_win_phy rk3188_win0_data = {
|
|||
.scl = &rk3188_win_scl,
|
||||
.data_formats = formats_win_full,
|
||||
.nformats = ARRAY_SIZE(formats_win_full),
|
||||
.format_modifiers = format_modifiers_win_full,
|
||||
.enable = VOP_REG(RK3188_SYS_CTRL, 0x1, 0),
|
||||
.format = VOP_REG(RK3188_SYS_CTRL, 0x7, 3),
|
||||
.rb_swap = VOP_REG(RK3188_SYS_CTRL, 0x1, 15),
|
||||
|
|
@ -440,6 +466,7 @@ static const struct vop_win_phy rk3188_win0_data = {
|
|||
static const struct vop_win_phy rk3188_win1_data = {
|
||||
.data_formats = formats_win_lite,
|
||||
.nformats = ARRAY_SIZE(formats_win_lite),
|
||||
.format_modifiers = format_modifiers_win_lite,
|
||||
.enable = VOP_REG(RK3188_SYS_CTRL, 0x1, 1),
|
||||
.format = VOP_REG(RK3188_SYS_CTRL, 0x7, 6),
|
||||
.rb_swap = VOP_REG(RK3188_SYS_CTRL, 0x1, 19),
|
||||
|
|
@ -545,6 +572,7 @@ static const struct vop_win_phy rk3288_win01_data = {
|
|||
.scl = &rk3288_win_full_scl,
|
||||
.data_formats = formats_win_full,
|
||||
.nformats = ARRAY_SIZE(formats_win_full),
|
||||
.format_modifiers = format_modifiers_win_full,
|
||||
.enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0),
|
||||
.format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1),
|
||||
.rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),
|
||||
|
|
@ -563,6 +591,7 @@ static const struct vop_win_phy rk3288_win01_data = {
|
|||
static const struct vop_win_phy rk3288_win23_data = {
|
||||
.data_formats = formats_win_lite,
|
||||
.nformats = ARRAY_SIZE(formats_win_lite),
|
||||
.format_modifiers = format_modifiers_win_lite,
|
||||
.enable = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 4),
|
||||
.gate = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 0),
|
||||
.format = VOP_REG(RK3288_WIN2_CTRL0, 0x7, 1),
|
||||
|
|
@ -677,6 +706,7 @@ static const struct vop_win_phy rk3368_win01_data = {
|
|||
.scl = &rk3288_win_full_scl,
|
||||
.data_formats = formats_win_full,
|
||||
.nformats = ARRAY_SIZE(formats_win_full),
|
||||
.format_modifiers = format_modifiers_win_full,
|
||||
.enable = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 0),
|
||||
.format = VOP_REG(RK3368_WIN0_CTRL0, 0x7, 1),
|
||||
.rb_swap = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 12),
|
||||
|
|
@ -697,6 +727,7 @@ static const struct vop_win_phy rk3368_win01_data = {
|
|||
static const struct vop_win_phy rk3368_win23_data = {
|
||||
.data_formats = formats_win_lite,
|
||||
.nformats = ARRAY_SIZE(formats_win_lite),
|
||||
.format_modifiers = format_modifiers_win_lite,
|
||||
.gate = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 0),
|
||||
.enable = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 4),
|
||||
.format = VOP_REG(RK3368_WIN2_CTRL0, 0x3, 5),
|
||||
|
|
@ -817,6 +848,53 @@ static const struct vop_win_yuv2yuv_data rk3399_vop_big_win_yuv2yuv_data[] = {
|
|||
.y2r_en = VOP_REG(RK3399_YUV2YUV_WIN, 0x1, 9) },
|
||||
{ .base = 0xC0, .phy = &rk3399_yuv2yuv_win23_data },
|
||||
{ .base = 0x120, .phy = &rk3399_yuv2yuv_win23_data },
|
||||
|
||||
};
|
||||
|
||||
static const struct vop_win_phy rk3399_win01_data = {
|
||||
.scl = &rk3288_win_full_scl,
|
||||
.data_formats = formats_win_full,
|
||||
.nformats = ARRAY_SIZE(formats_win_full),
|
||||
.format_modifiers = format_modifiers_win_full_afbc,
|
||||
.enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0),
|
||||
.format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1),
|
||||
.rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),
|
||||
.y_mir_en = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 22),
|
||||
.act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0),
|
||||
.dsp_info = VOP_REG(RK3288_WIN0_DSP_INFO, 0x0fff0fff, 0),
|
||||
.dsp_st = VOP_REG(RK3288_WIN0_DSP_ST, 0x1fff1fff, 0),
|
||||
.yrgb_mst = VOP_REG(RK3288_WIN0_YRGB_MST, 0xffffffff, 0),
|
||||
.uv_mst = VOP_REG(RK3288_WIN0_CBR_MST, 0xffffffff, 0),
|
||||
.yrgb_vir = VOP_REG(RK3288_WIN0_VIR, 0x3fff, 0),
|
||||
.uv_vir = VOP_REG(RK3288_WIN0_VIR, 0x3fff, 16),
|
||||
.src_alpha_ctl = VOP_REG(RK3288_WIN0_SRC_ALPHA_CTRL, 0xff, 0),
|
||||
.dst_alpha_ctl = VOP_REG(RK3288_WIN0_DST_ALPHA_CTRL, 0xff, 0),
|
||||
};
|
||||
|
||||
/*
|
||||
* rk3399 vop big windows register layout is same as rk3288, but we
|
||||
* have a separate rk3399 win data array here so that we can advertise
|
||||
* AFBC on the primary plane.
|
||||
*/
|
||||
static const struct vop_win_data rk3399_vop_win_data[] = {
|
||||
{ .base = 0x00, .phy = &rk3399_win01_data,
|
||||
.type = DRM_PLANE_TYPE_PRIMARY },
|
||||
{ .base = 0x40, .phy = &rk3288_win01_data,
|
||||
.type = DRM_PLANE_TYPE_OVERLAY },
|
||||
{ .base = 0x00, .phy = &rk3288_win23_data,
|
||||
.type = DRM_PLANE_TYPE_OVERLAY },
|
||||
{ .base = 0x50, .phy = &rk3288_win23_data,
|
||||
.type = DRM_PLANE_TYPE_CURSOR },
|
||||
};
|
||||
|
||||
static const struct vop_afbc rk3399_vop_afbc = {
|
||||
.rstn = VOP_REG(RK3399_AFBCD0_CTRL, 0x1, 3),
|
||||
.enable = VOP_REG(RK3399_AFBCD0_CTRL, 0x1, 0),
|
||||
.win_sel = VOP_REG(RK3399_AFBCD0_CTRL, 0x3, 1),
|
||||
.format = VOP_REG(RK3399_AFBCD0_CTRL, 0x1f, 16),
|
||||
.hreg_block_split = VOP_REG(RK3399_AFBCD0_CTRL, 0x1, 21),
|
||||
.hdr_ptr = VOP_REG(RK3399_AFBCD0_HDR_PTR, 0xffffffff, 0),
|
||||
.pic_size = VOP_REG(RK3399_AFBCD0_PIC_SIZE, 0xffffffff, 0),
|
||||
};
|
||||
|
||||
static const struct vop_data rk3399_vop_big = {
|
||||
|
|
@ -826,9 +904,10 @@ static const struct vop_data rk3399_vop_big = {
|
|||
.common = &rk3288_common,
|
||||
.modeset = &rk3288_modeset,
|
||||
.output = &rk3399_output,
|
||||
.afbc = &rk3399_vop_afbc,
|
||||
.misc = &rk3368_misc,
|
||||
.win = rk3368_vop_win_data,
|
||||
.win_size = ARRAY_SIZE(rk3368_vop_win_data),
|
||||
.win = rk3399_vop_win_data,
|
||||
.win_size = ARRAY_SIZE(rk3399_vop_win_data),
|
||||
.win_yuv2yuv = rk3399_vop_big_win_yuv2yuv_data,
|
||||
};
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue