via: some PCI posting flushes
Signed-off-by: Dave Airlie <airlied@linux.ie>
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21d37bbc65
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76f625511e
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@ -480,6 +480,7 @@ static int via_hook_segment(drm_via_private_t * dev_priv,
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VIA_WRITE(VIA_REG_TRANSET, (HC_ParaType_PreCR << 16));
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VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_hi);
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VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_lo);
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VIA_READ(VIA_REG_TRANSPACE);
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}
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}
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return paused;
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@ -557,8 +558,9 @@ static void via_cmdbuf_start(drm_via_private_t * dev_priv)
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VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_hi);
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VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_lo);
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DRM_WRITEMEMORYBARRIER();
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VIA_WRITE(VIA_REG_TRANSPACE, command | HC_HAGPCMNT_MASK);
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VIA_READ(VIA_REG_TRANSPACE);
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}
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static void via_pad_cache(drm_via_private_t * dev_priv, int qwords)
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@ -218,7 +218,9 @@ via_fire_dmablit(drm_device_t *dev, drm_via_sg_info_t *vsg, int engine)
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VIA_WRITE(VIA_PCI_DMA_MR0 + engine*0x04, VIA_DMA_MR_CM | VIA_DMA_MR_TDIE);
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VIA_WRITE(VIA_PCI_DMA_BCR0 + engine*0x10, 0);
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VIA_WRITE(VIA_PCI_DMA_DPR0 + engine*0x10, vsg->chain_start);
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DRM_WRITEMEMORYBARRIER();
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VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DE | VIA_DMA_CSR_TS);
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VIA_READ(VIA_PCI_DMA_CSR0 + engine*0x04);
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}
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/*
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