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Samsung DTS ARM changes for v5.10, part two 

1. Further cleanup of DTS with dtschema: s5pv210, s3c6410 and s3c24xx.
    This fixes many minor dtschema violations, adds few missing
    functionalities (like clock for RTC) and improves the code
    maintainability in few places. Except the RTC clock, this should not
    have visible impact.
 2. Fix few remaining Exynos dtschema violations.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAl9nebQQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD1zeHD/9ykZ+GLUZkUQQGjFKuCAyJsUPMUBr6+oqM
 Ab8za4YXrWi/Kctp+sDp5yRl3XsgB+VgJHfP+GjQnAVmYGE3gEIpJ4Ig0iSjikWJ
 Hk8tqZqQca6sOI/cfowCDAwWIPU6N1V5IO0rC7MiCdEfAFF22xhzXSp2WiFLsPHQ
 cMa9pUb8KKZEA48annLXUxMjogGFdaCmFpQhugek22zfE99Zl11/PcM1U9LiHfdL
 r+iHMfI5Nya/5sHKrtypdO3y8o90f/ZTDhqp2XmMa7uLgmRDvqtAuglR/Gkrnfxj
 XzNYQgaa/yd6WVvXNZWUsBphSOxDE7loYwmD21yUOSP/PhuoiP4PrzbPk0ewrfZX
 PRHN7NwjkFWDVaKjbsg329j30U+82SRxnJVOVbnog1l5iUQxE9/8+/I1GYt1sfGD
 xNsoRJohALyifaACBNRCusauZXQkZi9LEQlYVVKSL7TLdgx76dzTyc2S39aTDYft
 QQZbNZwhIOaHeFzR4Xlx/fVZUrSymzvYUOBJRs1E486zS8RK+v6J65QU6zenW2xV
 2TUVsMYrzvdwBZm9GIJbhx86r5Il1iPkXzyMblgQseUgPtV5F54DloqW5pQ7V1iZ
 YadW+c3EzUhHmLvvO8GCdsQrWBKZcm3eCaTttdPQD+omb5/I9imNRZ1CUyZwrp/b
 qtI0QQdMzA==
 =yolB
 -----END PGP SIGNATURE-----

Merge tag 'samsung-dt-5.10-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM changes for v5.10, part two

1. Further cleanup of DTS with dtschema: s5pv210, s3c6410 and s3c24xx.
   This fixes many minor dtschema violations, adds few missing
   functionalities (like clock for RTC) and improves the code
   maintainability in few places. Except the RTC clock, this should not
   have visible impact.
2. Fix few remaining Exynos dtschema violations.

* tag 'samsung-dt-5.10-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (36 commits)
  ARM: dts: s5pv210: replace deprecated "gpios" i2c-gpio property in Goni
  ARM: dts: s5pv210: replace deprecated "gpios" i2c-gpio property in Aquila
  ARM: dts: s5pv210: move fixed regulators under root node in Goni
  ARM: dts: s5pv210: move fixed regulators under root node in Aquila
  ARM: dts: exynos: Align OPP table name with dt-schema
  ARM: dts: exynos: move assigned-clock* properties to i2s0 node in Odroid XU4
  ARM: dts: exynos: add input clock to CMU in Exynos4412 Odroid
  ARM: dts: exynos: add input clock to CMU in Exynos3250
  ARM: dts: s3c24xx: move fixed clocks under root node in SMDK2416
  ARM: dts: s3c24xx: add address to CPU node
  ARM: dts: s3c24xx: align PWM/timer node name with dtschema
  ARM: dts: s3c24xx: override nodes by label
  ARM: dts: s3c24xx: fix number of PWM cells
  ARM: dts: s3c6410: remove additional CPU compatible
  ARM: dts: s3c6410: align node SROM bus node name with dtschema in SMDK6410
  ARM: dts: s3c6410: align node SROM bus node name with dtschema in Mini6410
  ARM: dts: s3c6410: move fixed clocks under root node in SMDK6410
  ARM: dts: s3c6410: move fixed clocks under root node in Mini6410
  ARM: dts: s5pv210: correct ethernet unit address in SMDKV210
  ARM: dts: s5pv210: align SPI GPIO node name with dtschema in Aries
  ...

Link: https://lore.kernel.org/r/20200920160705.9651-3-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2020-09-26 10:02:35 -07:00
parent dd59aed76d 6995a4c463
commit 76e5b12c90
21 changed files with 364 additions and 340 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Documentation/devicetree/bindings/arm/samsung/pmu.yaml
View File

@ -24,6 +24,7 @@ select:
- samsung,exynos5420-pmu
- samsung,exynos5433-pmu
- samsung,exynos7-pmu
- samsung-s5pv210-pmu
required:
- compatible
@ -40,6 +41,7 @@ properties:
- samsung,exynos5420-pmu
- samsung,exynos5433-pmu
- samsung,exynos7-pmu
- samsung-s5pv210-pmu
- const: syscon
reg:

4
arch/arm/boot/dts/exynos3250-artik5.dtsi
View File

@ -55,6 +55,10 @@
assigned-clock-rates = <6000000>;
};
&cmu {
clocks = <&xusbxti>;
};
&cpu0 {
cpu0-supply = <&buck2_reg>;
};

4
arch/arm/boot/dts/exynos3250-monk.dts
View File

@ -164,6 +164,10 @@
status = "okay";
};
&cmu {
clocks = <&xusbxti>;
};
&cpu0 {
cpu0-supply = <&buck2_reg>;
};

4
arch/arm/boot/dts/exynos3250-rinato.dts
View File

@ -205,6 +205,10 @@
status = "okay";
};
&cmu {
clocks = <&xusbxti>;
};
&cpu0 {
cpu0-supply = <&buck2_reg>;
};

1
arch/arm/boot/dts/exynos4412-odroid-common.dtsi
View File

@ -122,6 +122,7 @@
};
&clock {
clocks = <&clock CLK_XUSBXTI>;
assigned-clocks = <&clock CLK_FOUT_EPLL>;
assigned-clock-rates = <45158401>;
};

16
arch/arm/boot/dts/exynos4412.dtsi
View File

@ -76,7 +76,7 @@
};
};
cpu0_opp_table: opp_table0 {
cpu0_opp_table: opp-table0 {
compatible = "operating-points-v2";
opp-shared;
@ -402,7 +402,7 @@
status = "disabled";
};
bus_dmc_opp_table: opp_table1 {
bus_dmc_opp_table: opp-table1 {
compatible = "operating-points-v2";
opp-shared;
@ -429,7 +429,7 @@
};
};
bus_acp_opp_table: opp_table2 {
bus_acp_opp_table: opp-table2 {
compatible = "operating-points-v2";
opp-shared;
@ -495,7 +495,7 @@
status = "disabled";
};
bus_leftbus_opp_table: opp_table3 {
bus_leftbus_opp_table: opp-table3 {
compatible = "operating-points-v2";
opp-shared;
@ -518,7 +518,7 @@
};
};
bus_display_opp_table: opp_table4 {
bus_display_opp_table: opp-table4 {
compatible = "operating-points-v2";
opp-shared;
@ -530,7 +530,7 @@
};
};
bus_fsys_opp_table: opp_table5 {
bus_fsys_opp_table: opp-table5 {
compatible = "operating-points-v2";
opp-shared;
@ -542,7 +542,7 @@
};
};
bus_peri_opp_table: opp_table6 {
bus_peri_opp_table: opp-table6 {
compatible = "operating-points-v2";
opp-shared;
@ -734,7 +734,7 @@
"pmu";
operating-points-v2 = <&gpu_opp_table>;
gpu_opp_table: opp_table {
gpu_opp_table: opp-table {
compatible = "operating-points-v2";
opp-160000000 {

2
arch/arm/boot/dts/exynos5250.dtsi
View File

@ -330,7 +330,7 @@
power-domains = <&pd_g3d>;
status = "disabled";
gpu_opp_table: gpu-opp-table {
gpu_opp_table: opp-table {
compatible = "operating-points-v2";
opp-100000000 {

60
arch/arm/boot/dts/exynos5422-odroidxu4.dts
View File

@ -35,30 +35,6 @@
samsung,audio-routing = "I2S Playback", "Mixer DAI TX";
assigned-clocks = <&clock CLK_MOUT_EPLL>,
<&clock CLK_MOUT_MAU_EPLL>,
<&clock CLK_MOUT_USER_MAU_EPLL>,
<&clock_audss EXYNOS_MOUT_AUDSS>,
<&clock_audss EXYNOS_MOUT_I2S>,
<&clock_audss EXYNOS_DOUT_SRP>,
<&clock_audss EXYNOS_DOUT_AUD_BUS>,
<&clock_audss EXYNOS_DOUT_I2S>;
assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
<&clock CLK_MOUT_EPLL>,
<&clock CLK_MOUT_MAU_EPLL>,
<&clock CLK_MAU_EPLL>,
<&clock_audss EXYNOS_MOUT_AUDSS>;
assigned-clock-rates = <0>,
<0>,
<0>,
<0>,
<0>,
<196608001>,
<(196608002 / 2)>,
<196608000>;
cpu {
sound-dai = <&i2s0 0>, <&i2s0 1>;
};
@ -69,17 +45,35 @@
};
};
&clock_audss {
assigned-clocks = <&clock_audss EXYNOS_DOUT_SRP>,
<&clock CLK_FOUT_EPLL>;
assigned-clock-rates = <(196608000 / 256)>,
<196608000>;
};
&i2s0 {
status = "okay";
assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>;
assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>;
assigned-clocks = <&clock CLK_MOUT_EPLL>,
<&clock CLK_MOUT_MAU_EPLL>,
<&clock CLK_MOUT_USER_MAU_EPLL>,
<&clock_audss EXYNOS_MOUT_AUDSS>,
<&clock_audss EXYNOS_MOUT_I2S>,
<&i2s0 CLK_I2S_RCLK_SRC>,
<&clock_audss EXYNOS_DOUT_SRP>,
<&clock_audss EXYNOS_DOUT_AUD_BUS>,
<&clock_audss EXYNOS_DOUT_I2S>;
assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
<&clock CLK_MOUT_EPLL>,
<&clock CLK_MOUT_MAU_EPLL>,
<&clock CLK_MAU_EPLL>,
<&clock_audss EXYNOS_MOUT_AUDSS>,
<&clock_audss EXYNOS_SCLK_I2S>;
assigned-clock-rates = <0>,
<0>,
<0>,
<0>,
<0>,
<0>,
<196608001>,
<(196608002 / 2)>,
<196608000>;
};
&pwm {

17
arch/arm/boot/dts/s3c2416-smdk2416.dts
View File

@ -17,18 +17,11 @@
reg = <0x30000000 0x4000000>;
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
xti: xti@0 {
compatible = "fixed-clock";
reg = <0>;
clock-frequency = <12000000>;
clock-output-names = "xti";
#clock-cells = <0>;
};
xti: clock-0 {
compatible = "fixed-clock";
clock-frequency = <12000000>;
clock-output-names = "xti";
#clock-cells = <0>;
};
};

119
arch/arm/boot/dts/s3c2416.dtsi
View File

@ -18,13 +18,14 @@
};
cpus {
cpu {
compatible = "arm,arm926ej-s";
};
};
#address-cells = <1>;
#size-cells = <0>;
interrupt-controller@4a000000 {
compatible = "samsung,s3c2416-irq";
cpu@0 {
device_type = "cpu";
compatible = "arm,arm926ej-s";
reg = <0x0>;
};
};
clocks: clock-controller@4c000000 {
@ -33,39 +34,6 @@
#clock-cells = <1>;
};
pinctrl@56000000 {
compatible = "samsung,s3c2416-pinctrl";
};
timer@51000000 {
clocks = <&clocks PCLK_PWM>;
clock-names = "timers";
};
uart_0: serial@50000000 {
compatible = "samsung,s3c2440-uart";
clock-names = "uart", "clk_uart_baud2",
"clk_uart_baud3";
clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,
<&clocks SCLK_UART>;
};
uart_1: serial@50004000 {
compatible = "samsung,s3c2440-uart";
clock-names = "uart", "clk_uart_baud2",
"clk_uart_baud3";
clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>,
<&clocks SCLK_UART>;
};
uart_2: serial@50008000 {
compatible = "samsung,s3c2440-uart";
clock-names = "uart", "clk_uart_baud2",
"clk_uart_baud3";
clocks = <&clocks PCLK_UART2>, <&clocks PCLK_UART2>,
<&clocks SCLK_UART>;
};
uart_3: serial@5000c000 {
compatible = "samsung,s3c2440-uart";
reg = <0x5000C000 0x4000>;
@ -98,22 +66,59 @@
<&clocks MUX_HSMMC1>;
status = "disabled";
};
watchdog: watchdog@53000000 {
interrupts = <1 9 27 3>;
clocks = <&clocks PCLK_WDT>;
clock-names = "watchdog";
};
rtc: rtc@57000000 {
compatible = "samsung,s3c2416-rtc";
clocks = <&clocks PCLK_RTC>;
clock-names = "rtc";
};
i2c@54000000 {
compatible = "samsung,s3c2440-i2c";
clocks = <&clocks PCLK_I2C0>;
clock-names = "i2c";
};
};
&i2c {
compatible = "samsung,s3c2440-i2c";
clocks = <&clocks PCLK_I2C0>;
clock-names = "i2c";
};
&intc {
compatible = "samsung,s3c2416-irq";
};
&pinctrl_0 {
compatible = "samsung,s3c2416-pinctrl";
};
&rtc {
compatible = "samsung,s3c2416-rtc";
clocks = <&clocks PCLK_RTC>;
clock-names = "rtc";
};
&timer {
clocks = <&clocks PCLK_PWM>;
clock-names = "timers";
};
&uart_0 {
compatible = "samsung,s3c2440-uart";
clock-names = "uart", "clk_uart_baud2",
"clk_uart_baud3";
clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,
<&clocks SCLK_UART>;
};
&uart_1 {
compatible = "samsung,s3c2440-uart";
clock-names = "uart", "clk_uart_baud2",
"clk_uart_baud3";
clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>,
<&clocks SCLK_UART>;
};
&uart_2 {
compatible = "samsung,s3c2440-uart";
clock-names = "uart", "clk_uart_baud2",
"clk_uart_baud3";
clocks = <&clocks PCLK_UART2>, <&clocks PCLK_UART2>,
<&clocks SCLK_UART>;
};
&watchdog {
interrupts = <1 9 27 3>;
clocks = <&clocks PCLK_WDT>;
clock-names = "watchdog";
};

24
arch/arm/boot/dts/s3c24xx.dtsi
View File

@ -13,12 +13,12 @@
aliases {
pinctrl0 = &pinctrl_0;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
serial0 = &uart_0;
serial1 = &uart_1;
serial2 = &uart_2;
};
intc:interrupt-controller@4a000000 {
intc: interrupt-controller@4a000000 {
compatible = "samsung,s3c2410-irq";
reg = <0x4a000000 0x100>;
interrupt-controller;
@ -39,49 +39,49 @@
};
};
timer@51000000 {
timer: pwm@51000000 {
compatible = "samsung,s3c2410-pwm";
reg = <0x51000000 0x1000>;
interrupts = <0 0 10 3>, <0 0 11 3>, <0 0 12 3>, <0 0 13 3>, <0 0 14 3>;
#pwm-cells = <4>;
#pwm-cells = <3>;
};
uart0: serial@50000000 {
uart_0: serial@50000000 {
compatible = "samsung,s3c2410-uart";
reg = <0x50000000 0x4000>;
interrupts = <1 28 0 4>, <1 28 1 4>;
status = "disabled";
};
uart1: serial@50004000 {
uart_1: serial@50004000 {
compatible = "samsung,s3c2410-uart";
reg = <0x50004000 0x4000>;
interrupts = <1 23 3 4>, <1 23 4 4>;
status = "disabled";
};
uart2: serial@50008000 {
uart_2: serial@50008000 {
compatible = "samsung,s3c2410-uart";
reg = <0x50008000 0x4000>;
interrupts = <1 15 6 4>, <1 15 7 4>;
status = "disabled";
};
watchdog@53000000 {
watchdog: watchdog@53000000 {
compatible = "samsung,s3c2410-wdt";
reg = <0x53000000 0x100>;
interrupts = <0 0 9 3>;
status = "disabled";
};
rtc@57000000 {
rtc: rtc@57000000 {
compatible = "samsung,s3c2410-rtc";
reg = <0x57000000 0x100>;
interrupts = <0 0 30 3>, <0 0 8 3>;
status = "disabled";
};
i2c@54000000 {
i2c: i2c@54000000 {
compatible = "samsung,s3c2410-i2c";
reg = <0x54000000 0x100>;
interrupts = <0 0 27 3>;

34
arch/arm/boot/dts/s3c6410-mini6410.dts
View File

@ -28,29 +28,21 @@
bootargs = "console=ttySAC0,115200n8 earlyprintk rootwait root=/dev/mmcblk0p1";
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
fin_pll: oscillator@0 {
compatible = "fixed-clock";
reg = <0>;
clock-frequency = <12000000>;
clock-output-names = "fin_pll";
#clock-cells = <0>;
};
xusbxti: oscillator@1 {
compatible = "fixed-clock";
reg = <1>;
clock-output-names = "xusbxti";
clock-frequency = <48000000>;
#clock-cells = <0>;
};
fin_pll: oscillator-0 {
compatible = "fixed-clock";
clock-frequency = <12000000>;
clock-output-names = "fin_pll";
#clock-cells = <0>;
};
srom-cs1@18000000 {
xusbxti: oscillator-1 {
compatible = "fixed-clock";
clock-output-names = "xusbxti";
clock-frequency = <48000000>;
#clock-cells = <0>;
};
srom-cs1-bus@18000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;

34
arch/arm/boot/dts/s3c6410-smdk6410.dts
View File

@ -28,29 +28,21 @@
bootargs = "console=ttySAC0,115200n8 earlyprintk rootwait root=/dev/mmcblk0p1";
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
fin_pll: oscillator@0 {
compatible = "fixed-clock";
reg = <0>;
clock-frequency = <12000000>;
clock-output-names = "fin_pll";
#clock-cells = <0>;
};
xusbxti: oscillator@1 {
compatible = "fixed-clock";
reg = <1>;
clock-output-names = "xusbxti";
clock-frequency = <48000000>;
#clock-cells = <0>;
};
fin_pll: oscillator-0 {
compatible = "fixed-clock";
clock-frequency = <12000000>;
clock-output-names = "fin_pll";
#clock-cells = <0>;
};
srom-cs1@18000000 {
xusbxti: oscillator-1 {
compatible = "fixed-clock";
clock-output-names = "xusbxti";
clock-frequency = <48000000>;
#clock-cells = <0>;
};
srom-cs1-bus@18000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;

2
arch/arm/boot/dts/s3c64xx.dtsi
View File

@ -34,7 +34,7 @@
cpu@0 {
device_type = "cpu";
compatible = "arm,arm1176jzf-s", "arm,arm1176";
compatible = "arm,arm1176jzf-s";
reg = <0x0>;
};
};

73
arch/arm/boot/dts/s5pv210-aquila.dts
View File

@ -11,6 +11,7 @@
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "s5pv210.dtsi"
@ -32,42 +33,40 @@
0x40000000 0x18000000>;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
pmic_ap_clk: clock-0 {
/* Workaround for missing clock on PMIC */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
vtf_reg: fixed-regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "V_TF_2.8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&mp05 4 0>;
enable-active-high;
};
vtf_reg: regulator-0 {
compatible = "regulator-fixed";
regulator-name = "V_TF_2.8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&mp05 4 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
pda_reg: fixed-regulator@1 {
compatible = "regulator-fixed";
regulator-name = "VCC_1.8V_PDA";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
reg = <1>;
};
pda_reg: regulator-1 {
compatible = "regulator-fixed";
regulator-name = "VCC_1.8V_PDA";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
bat_reg: fixed-regulator@2 {
compatible = "regulator-fixed";
regulator-name = "V_BAT";
regulator-min-microvolt = <3700000>;
regulator-max-microvolt = <3700000>;
reg = <2>;
};
bat_reg: regulator-2 {
compatible = "regulator-fixed";
regulator-name = "V_BAT";
regulator-min-microvolt = <3700000>;
regulator-max-microvolt = <3700000>;
};
i2c_pmic: i2c-pmic {
compatible = "i2c-gpio";
gpios = <&gpj4 0 0>, /* sda */
<&gpj4 3 0>; /* scl */
sda-gpios = <&gpj4 0 GPIO_ACTIVE_HIGH>;
scl-gpios = <&gpj4 3 GPIO_ACTIVE_HIGH>;
i2c-gpio,delay-us = <2>; /* ~100 kHz */
#address-cells = <1>;
#size-cells = <0>;
@ -77,13 +76,13 @@
reg = <0x66>;
max8998,pmic-buck1-default-dvs-idx = <0>;
max8998,pmic-buck1-dvs-gpios = <&gph0 3 0>,
<&gph0 4 0>;
max8998,pmic-buck1-dvs-gpios = <&gph0 3 GPIO_ACTIVE_HIGH>,
<&gph0 4 GPIO_ACTIVE_HIGH>;
max8998,pmic-buck1-dvs-voltage = <1200000>, <1200000>,
<1200000>, <1200000>;
max8998,pmic-buck2-default-dvs-idx = <0>;
max8998,pmic-buck2-dvs-gpio = <&gph0 5 0>;
max8998,pmic-buck2-dvs-gpio = <&gph0 5 GPIO_ACTIVE_HIGH>;
max8998,pmic-buck2-dvs-voltage = <1200000>, <1200000>;
regulators {
@ -228,6 +227,11 @@
regulator-always-on;
};
ap32khz_reg: EN32KHz-AP {
regulator-name = "32KHz AP";
regulator-always-on;
};
vichg_reg: ENVICHG {
regulator-name = "VICHG";
};
@ -326,6 +330,11 @@
status = "okay";
};
&rtc {
clocks = <&clocks CLK_RTC>, <&pmic_ap_clk>;
clock-names = "rtc", "rtc_src";
};
&sdhci0 {
bus-width = <4>;
non-removable;

16
arch/arm/boot/dts/s5pv210-aries.dtsi
View File

@ -47,6 +47,13 @@
};
};
pmic_ap_clk: clock-0 {
/* Workaround for missing clock on PMIC */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
bt_codec: bt_sco {
compatible = "linux,bt-sco";
#sound-dai-cells = <0>;
@ -59,7 +66,7 @@
gpio = <&gpj1 1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctr-0 = <&vibrator_ena>;
pinctrl-0 = <&vibrator_ena>;
};
touchkey_vdd: regulator-fixed-1 {
@ -538,7 +545,7 @@
value = <0x5200>;
};
spi_lcd: spi-gpio-0 {
spi_lcd: spi-2 {
compatible = "spi-gpio";
#address-cells = <1>;
#size-cells = <0>;
@ -825,6 +832,11 @@
samsung,pwm-outputs = <1>;
};
&rtc {
clocks = <&clocks CLK_RTC>, <&pmic_ap_clk>;
clock-names = "rtc", "rtc_src";
};
&sdhci1 {
#address-cells = <1>;
#size-cells = <0>;

97
arch/arm/boot/dts/s5pv210-goni.dts
View File

@ -11,6 +11,8 @@
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/input/input.h>
#include "s5pv210.dtsi"
@ -33,52 +35,49 @@
0x50000000 0x08000000>;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
pmic_ap_clk: clock-0 {
/* Workaround for missing clock on PMIC */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
vtf_reg: fixed-regulator@0 {
compatible = "regulator-fixed";
regulator-name = "V_TF_2.8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
reg = <0>;
gpio = <&mp05 4 0>;
enable-active-high;
};
vtf_reg: regulator-0 {
compatible = "regulator-fixed";
regulator-name = "V_TF_2.8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&mp05 4 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
pda_reg: fixed-regulator@1 {
compatible = "regulator-fixed";
regulator-name = "VCC_1.8V_PDA";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
reg = <1>;
};
pda_reg: regulator-1 {
compatible = "regulator-fixed";
regulator-name = "VCC_1.8V_PDA";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
bat_reg: fixed-regulator@2 {
compatible = "regulator-fixed";
regulator-name = "V_BAT";
regulator-min-microvolt = <3700000>;
regulator-max-microvolt = <3700000>;
reg = <2>;
};
bat_reg: regulator-2 {
compatible = "regulator-fixed";
regulator-name = "V_BAT";
regulator-min-microvolt = <3700000>;
regulator-max-microvolt = <3700000>;
};
tsp_reg: fixed-regulator@3 {
compatible = "regulator-fixed";
regulator-name = "TSP_VDD";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
reg = <3>;
gpio = <&gpj1 3 0>;
enable-active-high;
};
tsp_reg: regulator-3 {
compatible = "regulator-fixed";
regulator-name = "TSP_VDD";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpj1 3 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
i2c_pmic: i2c-pmic {
compatible = "i2c-gpio";
gpios = <&gpj4 0 0>, /* sda */
<&gpj4 3 0>; /* scl */
sda-gpios = <&gpj4 0 GPIO_ACTIVE_HIGH>;
scl-gpios = <&gpj4 3 GPIO_ACTIVE_HIGH>;
i2c-gpio,delay-us = <2>; /* ~100 kHz */
#address-cells = <1>;
#size-cells = <0>;
@ -88,13 +87,13 @@
reg = <0x66>;
max8998,pmic-buck1-default-dvs-idx = <0>;
max8998,pmic-buck1-dvs-gpios = <&gph0 3 0>,
<&gph0 4 0>;
max8998,pmic-buck1-dvs-gpios = <&gph0 3 GPIO_ACTIVE_HIGH>,
<&gph0 4 GPIO_ACTIVE_HIGH>;
max8998,pmic-buck1-dvs-voltage = <1200000>, <1200000>,
<1200000>, <1200000>;
max8998,pmic-buck2-default-dvs-idx = <0>;
max8998,pmic-buck2-dvs-gpio = <&gph0 5 0>;
max8998,pmic-buck2-dvs-gpio = <&gph0 5 GPIO_ACTIVE_HIGH>;
max8998,pmic-buck2-dvs-voltage = <1200000>, <1200000>;
regulators {
@ -224,6 +223,11 @@
regulator-max-microvolt = <1200000>;
regulator-always-on;
};
ap32khz_reg: EN32KHz-AP {
regulator-name = "32KHz AP";
regulator-always-on;
};
};
};
};
@ -308,6 +312,11 @@
status = "okay";
};
&rtc {
clocks = <&clocks CLK_RTC>, <&pmic_ap_clk>;
clock-names = "rtc", "rtc_src";
};
&sdhci0 {
bus-width = <4>;
non-removable;
@ -348,7 +357,7 @@
compatible = "atmel,maxtouch";
reg = <0x4a>;
interrupt-parent = <&gpj0>;
interrupts = <5 2>;
interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
atmel,x-line = <17>;
atmel,y-line = <11>;
@ -378,8 +387,8 @@
clock-frequency = <16000000>;
clocks = <&camera 0>;
clock-names = "mclk";
nreset-gpios = <&gpb 2 0>;
nstby-gpios = <&gpb 0 0>;
nreset-gpios = <&gpb 2 GPIO_ACTIVE_HIGH>;
nstby-gpios = <&gpb 0 GPIO_ACTIVE_HIGH>;
port {
noon010pc30_ep: endpoint {

9
arch/arm/boot/dts/s5pv210-smdkc110.dts
View File

@ -30,6 +30,13 @@
device_type = "memory";
reg = <0x20000000 0x20000000>;
};
pmic_ap_clk: clock-0 {
/* Workaround for missing PMIC and its clock */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
};
&xusbxti {
@ -54,6 +61,8 @@
&rtc {
status = "okay";
clocks = <&clocks CLK_RTC>, <&pmic_ap_clk>;
clock-names = "rtc", "rtc_src";
};
&i2c0 {

14
arch/arm/boot/dts/s5pv210-smdkv210.dts
View File

@ -15,6 +15,7 @@
*/
/dts-v1/;
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/input/input.h>
#include "s5pv210.dtsi"
@ -31,11 +32,18 @@
reg = <0x20000000 0x40000000>;
};
ethernet@18000000 {
pmic_ap_clk: clock-0 {
/* Workaround for missing PMIC and its clock */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
ethernet@a8000000 {
compatible = "davicom,dm9000";
reg = <0xA8000000 0x2 0xA8000002 0x2>;
interrupt-parent = <&gph1>;
interrupts = <1 4>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
local-mac-address = [00 00 de ad be ef];
davicom,no-eeprom;
};
@ -147,6 +155,8 @@
&rtc {
status = "okay";
clocks = <&clocks CLK_RTC>, <&pmic_ap_clk>;
clock-names = "rtc", "rtc_src";
};
&sdhci0 {

9
arch/arm/boot/dts/s5pv210-torbreck.dts
View File

@ -30,6 +30,13 @@
device_type = "memory";
reg = <0x20000000 0x20000000>;
};
pmic_ap_clk: clock-0 {
/* Workaround for missing PMIC and its clock */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
};
&xusbxti {
@ -54,6 +61,8 @@
&rtc {
status = "okay";
clocks = <&clocks CLK_RTC>, <&pmic_ap_clk>;
clock-names = "rtc", "rtc_src";
};
&sdhci0 {

163
arch/arm/boot/dts/s5pv210.dtsi
View File

@ -52,34 +52,26 @@
};
};
xxti: oscillator-0 {
compatible = "fixed-clock";
clock-frequency = <0>;
clock-output-names = "xxti";
#clock-cells = <0>;
};
xusbxti: oscillator-1 {
compatible = "fixed-clock";
clock-frequency = <0>;
clock-output-names = "xusbxti";
#clock-cells = <0>;
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
external-clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
xxti: oscillator@0 {
compatible = "fixed-clock";
reg = <0>;
clock-frequency = <0>;
clock-output-names = "xxti";
#clock-cells = <0>;
};
xusbxti: oscillator@1 {
compatible = "fixed-clock";
reg = <1>;
clock-frequency = <0>;
clock-output-names = "xusbxti";
#clock-cells = <0>;
};
};
onenand: onenand@b0600000 {
compatible = "samsung,s5pv210-onenand";
reg = <0xb0600000 0x2000>,
@ -100,19 +92,16 @@
};
clocks: clock-controller@e0100000 {
compatible = "samsung,s5pv210-clock", "simple-bus";
compatible = "samsung,s5pv210-clock";
reg = <0xe0100000 0x10000>;
clock-names = "xxti", "xusbxti";
clocks = <&xxti>, <&xusbxti>;
#clock-cells = <1>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
};
pmu_syscon: syscon@e0108000 {
compatible = "samsung-s5pv210-pmu", "syscon";
reg = <0xe0108000 0x8000>;
};
pmu_syscon: syscon@e0108000 {
compatible = "samsung-s5pv210-pmu", "syscon";
reg = <0xe0108000 0x8000>;
};
pinctrl0: pinctrl@e0200000 {
@ -128,35 +117,28 @@
};
};
amba {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
ranges;
pdma0: dma@e0900000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0xe0900000 0x1000>;
interrupt-parent = <&vic0>;
interrupts = <19>;
clocks = <&clocks CLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
pdma0: dma@e0900000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0xe0900000 0x1000>;
interrupt-parent = <&vic0>;
interrupts = <19>;
clocks = <&clocks CLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
pdma1: dma@e0a00000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0xe0a00000 0x1000>;
interrupt-parent = <&vic0>;
interrupts = <20>;
clocks = <&clocks CLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
pdma1: dma@e0a00000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0xe0a00000 0x1000>;
interrupt-parent = <&vic0>;
interrupts = <20>;
clocks = <&clocks CLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
adc: adc@e1700000 {
@ -241,43 +223,36 @@
status = "disabled";
};
audio-subsystem {
compatible = "samsung,s5pv210-audss", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
clk_audss: clock-controller@eee10000 {
compatible = "samsung,s5pv210-audss-clock";
reg = <0xeee10000 0x1000>;
clock-names = "hclk", "xxti",
"fout_epll",
"sclk_audio0";
clocks = <&clocks DOUT_HCLKP>, <&xxti>,
<&clocks FOUT_EPLL>,
<&clocks SCLK_AUDIO0>;
#clock-cells = <1>;
};
clk_audss: clock-controller@eee10000 {
compatible = "samsung,s5pv210-audss-clock";
reg = <0xeee10000 0x1000>;
clock-names = "hclk", "xxti",
"fout_epll",
"sclk_audio0";
clocks = <&clocks DOUT_HCLKP>, <&xxti>,
<&clocks FOUT_EPLL>,
<&clocks SCLK_AUDIO0>;
#clock-cells = <1>;
};
i2s0: i2s@eee30000 {
compatible = "samsung,s5pv210-i2s";
reg = <0xeee30000 0x1000>;
interrupt-parent = <&vic2>;
interrupts = <16>;
dma-names = "rx", "tx", "tx-sec";
dmas = <&pdma1 9>, <&pdma1 10>, <&pdma1 11>;
clock-names = "iis",
"i2s_opclk0",
"i2s_opclk1";
clocks = <&clk_audss CLK_I2S>,
<&clk_audss CLK_I2S>,
<&clk_audss CLK_DOUT_AUD_BUS>;
samsung,idma-addr = <0xc0010000>;
pinctrl-names = "default";
pinctrl-0 = <&i2s0_bus>;
#sound-dai-cells = <0>;
status = "disabled";
};
i2s0: i2s@eee30000 {
compatible = "samsung,s5pv210-i2s";
reg = <0xeee30000 0x1000>;
interrupt-parent = <&vic2>;
interrupts = <16>;
dma-names = "rx", "tx", "tx-sec";
dmas = <&pdma1 9>, <&pdma1 10>, <&pdma1 11>;
clock-names = "iis",
"i2s_opclk0",
"i2s_opclk1";
clocks = <&clk_audss CLK_I2S>,
<&clk_audss CLK_I2S>,
<&clk_audss CLK_DOUT_AUD_BUS>;
samsung,idma-addr = <0xc0010000>;
pinctrl-names = "default";
pinctrl-0 = <&i2s0_bus>;
#sound-dai-cells = <0>;
status = "disabled";
};
i2s1: i2s@e2100000 {