Pin control fixes for the v3.11 series:
- Driver fixes for AM33xx, SIRF and PFC pin controllers. - Fix a compile warning from the pinctrl single-register driver. - Fix a little nasty memory leak. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.13 (GNU/Linux) iQIcBAABAgAGBQJR9YhoAAoJEEEQszewGV1zfl8P/jk2VjlRE0P4LRLSRn3Rt7yj Wz7IyZTol+mFnaY0yKQS9rToK+GqtJQHA1zuNP8iQnJbQh+UromAZwBd58dP7cnu mYSi2QS4osYT5RjvVtB2yYy9sRrc4iTb+qJFekanA4IcHt0zKDZysyN8moU5JxmN TVr+cauFm7qimkjps2Dns94UhVGpgB7A6Y8yC3SYtPv1GPdWQgSaDabWqMYq0bn1 ARUaz3XcbjMAGbPi8kDEFsP/SkM2OcMXpjX23G6ifgO9pyEKeum5+FWtllVeeAzb LmymMJYVcTPLFw0yj+9lkRBew2K9JKmPp8rAUBvbDn53vbguMkDJTczM3IUZ279h lRvR+w9F2M1rqIfwSa0/ZqTYKXbsF/IASYMXL/awNywnss+caPUxiN4EWRuKDssS Wh6veS9l4roMupaez6GU7gQ8UgNnFTQg2BYzeFYbAg1jJ1b/U+E0MK/9yUzewXQw phlcFFibYce+1qhJhQ3lIYb6O512vw+2Xk+G6JBZVuwzMVvUUJwJqfGRKCoobxZz DRBIQJ9U4DRMethjfp5mP0H6nH7/fwKqvftKlsnOb9SXZregpcLV+ymrkkmW/Ey2 XuEHQqUbmD0zoPHvFgoUmAYlzmhxtmHK5uJDSH1aZ4b9IOzr2mV1RSt0xwo3BpTS gwtDvmutV/JQ8RZMLLvw =URtB -----END PGP SIGNATURE----- Merge tag 'pinctrl-for-v3.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control fixes from Linus Walleij: - Driver fixes for AM33xx, SIRF and PFC pin controllers - Fix a compile warning from the pinctrl single-register driver - Fix a little nasty memory leak * tag 'pinctrl-for-v3.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinctrl: fix a memleak when freeing maps pinctrl: pinctrl-single: fix compile warning when no CONFIG_PM pinctrl: sh-pfc: fix SDHI0 VccQ regulator on sh73a0 with DT arm/dts: sirf: fix the pingroup name mismatch between drivers and dts pinctrl: sirf: add usp0_uart_nostreamctrl pin group for usp-uart without flowctrl pinctrl: sirf: fix the pin number and mux bit for usp0 pinctrl: am33xx dt binding: correct include path
This commit is contained in:
Linus Torvalds
commit
76d25a5f2f
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@ -485,6 +485,12 @@
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sirf,function = "usp0";
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};
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};
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usp0_uart_nostreamctrl_pins_a: usp0@1 {
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usp0 {
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sirf,pins = "usp0_uart_nostreamctrl_grp";
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sirf,function = "usp0_uart_nostreamctrl";
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};
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};
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usp1_pins_a: usp1@0 {
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usp1 {
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sirf,pins = "usp1grp";
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@ -515,16 +521,16 @@
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sirf,function = "pulse_count";
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};
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};
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cko0_rst_pins_a: cko0_rst@0 {
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cko0_rst {
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sirf,pins = "cko0_rstgrp";
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sirf,function = "cko0_rst";
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cko0_pins_a: cko0@0 {
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cko0 {
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sirf,pins = "cko0grp";
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sirf,function = "cko0";
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};
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};
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cko1_rst_pins_a: cko1_rst@0 {
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cko1_rst {
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sirf,pins = "cko1_rstgrp";
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sirf,function = "cko1_rst";
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cko1_pins_a: cko1@0 {
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cko1 {
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sirf,pins = "cko1grp";
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sirf,function = "cko1";
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};
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};
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};
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@ -515,16 +515,16 @@
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sirf,function = "pulse_count";
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};
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};
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cko0_rst_pins_a: cko0_rst@0 {
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cko0_rst {
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sirf,pins = "cko0_rstgrp";
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sirf,function = "cko0_rst";
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cko0_pins_a: cko0@0 {
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cko0 {
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sirf,pins = "cko0grp";
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sirf,function = "cko0";
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};
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};
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cko1_rst_pins_a: cko1_rst@0 {
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cko1_rst {
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sirf,pins = "cko1_rstgrp";
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sirf,function = "cko1_rst";
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cko1_pins_a: cko1@0 {
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cko1 {
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sirf,pins = "cko1grp";
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sirf,function = "cko1";
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};
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};
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};
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@ -1193,6 +1193,7 @@ void pinctrl_unregister_map(struct pinctrl_map const *map)
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list_for_each_entry(maps_node, &pinctrl_maps, node) {
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if (maps_node->maps == map) {
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list_del(&maps_node->node);
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kfree(maps_node);
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mutex_unlock(&pinctrl_maps_mutex);
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return;
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}
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@ -1483,6 +1483,7 @@ static int pcs_add_gpio_func(struct device_node *node, struct pcs_device *pcs)
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return ret;
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}
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#ifdef CONFIG_PM
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static int pinctrl_single_suspend(struct platform_device *pdev,
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pm_message_t state)
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{
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@ -1505,6 +1506,7 @@ static int pinctrl_single_resume(struct platform_device *pdev)
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return pinctrl_force_default(pcs->pctl);
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}
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#endif
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static int pcs_probe(struct platform_device *pdev)
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{
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@ -3785,6 +3785,7 @@ static const struct regulator_desc sh73a0_vccq_mc0_desc = {
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static struct regulator_consumer_supply sh73a0_vccq_mc0_consumers[] = {
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REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
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REGULATOR_SUPPLY("vqmmc", "ee100000.sdhi"),
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};
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static const struct regulator_init_data sh73a0_vccq_mc0_init_data = {
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@ -496,7 +496,7 @@ static const unsigned sdmmc5_pins[] = { 24, 25, 26 };
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static const struct sirfsoc_muxmask usp0_muxmask[] = {
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{
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.group = 1,
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.mask = BIT(19) | BIT(20) | BIT(21) | BIT(22),
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.mask = BIT(19) | BIT(20) | BIT(21) | BIT(22) | BIT(23),
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},
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};
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@ -507,8 +507,21 @@ static const struct sirfsoc_padmux usp0_padmux = {
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.funcval = 0,
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};
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static const unsigned usp0_pins[] = { 51, 52, 53, 54 };
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static const unsigned usp0_pins[] = { 51, 52, 53, 54, 55 };
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static const struct sirfsoc_muxmask usp0_uart_nostreamctrl_muxmask[] = {
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{
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.group = 1,
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.mask = BIT(20) | BIT(21),
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},
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};
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static const struct sirfsoc_padmux usp0_uart_nostreamctrl_padmux = {
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.muxmask_counts = ARRAY_SIZE(usp0_uart_nostreamctrl_muxmask),
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.muxmask = usp0_uart_nostreamctrl_muxmask,
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};
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static const unsigned usp0_uart_nostreamctrl_pins[] = { 52, 53 };
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static const struct sirfsoc_muxmask usp1_muxmask[] = {
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{
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.group = 0,
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@ -822,6 +835,8 @@ static const struct sirfsoc_pin_group sirfsoc_pin_groups[] = {
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SIRFSOC_PIN_GROUP("uart2grp", uart2_pins),
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SIRFSOC_PIN_GROUP("uart2_nostreamctrlgrp", uart2_nostreamctrl_pins),
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SIRFSOC_PIN_GROUP("usp0grp", usp0_pins),
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SIRFSOC_PIN_GROUP("usp0_uart_nostreamctrl_grp",
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usp0_uart_nostreamctrl_pins),
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SIRFSOC_PIN_GROUP("usp1grp", usp1_pins),
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SIRFSOC_PIN_GROUP("i2c0grp", i2c0_pins),
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SIRFSOC_PIN_GROUP("i2c1grp", i2c1_pins),
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@ -862,6 +877,8 @@ static const char * const uart0grp[] = { "uart0grp" };
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static const char * const uart1grp[] = { "uart1grp" };
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static const char * const uart2grp[] = { "uart2grp" };
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static const char * const uart2_nostreamctrlgrp[] = { "uart2_nostreamctrlgrp" };
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static const char * const usp0_uart_nostreamctrl_grp[] = {
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"usp0_uart_nostreamctrl_grp" };
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static const char * const usp0grp[] = { "usp0grp" };
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static const char * const usp1grp[] = { "usp1grp" };
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static const char * const i2c0grp[] = { "i2c0grp" };
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@ -904,6 +921,9 @@ static const struct sirfsoc_pmx_func sirfsoc_pmx_functions[] = {
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SIRFSOC_PMX_FUNCTION("uart2", uart2grp, uart2_padmux),
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SIRFSOC_PMX_FUNCTION("uart2_nostreamctrl", uart2_nostreamctrlgrp, uart2_nostreamctrl_padmux),
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SIRFSOC_PMX_FUNCTION("usp0", usp0grp, usp0_padmux),
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SIRFSOC_PMX_FUNCTION("usp0_uart_nostreamctrl",
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usp0_uart_nostreamctrl_grp,
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usp0_uart_nostreamctrl_padmux),
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SIRFSOC_PMX_FUNCTION("usp1", usp1grp, usp1_padmux),
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SIRFSOC_PMX_FUNCTION("i2c0", i2c0grp, i2c0_padmux),
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SIRFSOC_PMX_FUNCTION("i2c1", i2c1grp, i2c1_padmux),
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@ -5,7 +5,7 @@
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#ifndef _DT_BINDINGS_PINCTRL_AM33XX_H
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#define _DT_BINDINGS_PINCTRL_AM33XX_H
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#include <include/dt-bindings/pinctrl/omap.h>
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#include <dt-bindings/pinctrl/omap.h>
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/* am33xx specific mux bit defines */
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#undef PULL_ENA
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