ARM: dts: imx6: add anatop phandle for usbphy
Add anatop phandle for usbphy Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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4c2620e731
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76a3885506
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@ -576,6 +576,7 @@
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reg = <0x020c9000 0x1000>;
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reg = <0x020c9000 0x1000>;
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interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks 182>;
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clocks = <&clks 182>;
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fsl,anatop = <&anatop>;
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};
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};
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usbphy2: usbphy@020ca000 {
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usbphy2: usbphy@020ca000 {
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@ -583,6 +584,7 @@
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reg = <0x020ca000 0x1000>;
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reg = <0x020ca000 0x1000>;
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interrupts = <0 45 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <0 45 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks 183>;
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clocks = <&clks 183>;
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fsl,anatop = <&anatop>;
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};
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};
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snvs@020cc000 {
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snvs@020cc000 {
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@ -519,6 +519,7 @@
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reg = <0x020c9000 0x1000>;
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reg = <0x020c9000 0x1000>;
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interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks IMX6SL_CLK_USBPHY1>;
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clocks = <&clks IMX6SL_CLK_USBPHY1>;
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fsl,anatop = <&anatop>;
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};
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};
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usbphy2: usbphy@020ca000 {
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usbphy2: usbphy@020ca000 {
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@ -526,6 +527,7 @@
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reg = <0x020ca000 0x1000>;
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reg = <0x020ca000 0x1000>;
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interrupts = <0 45 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <0 45 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks IMX6SL_CLK_USBPHY2>;
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clocks = <&clks IMX6SL_CLK_USBPHY2>;
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fsl,anatop = <&anatop>;
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};
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};
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snvs@020cc000 {
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snvs@020cc000 {
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