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Samsung DTS ARM changes for v5.18 

1. Minor improvements and dtschema fixes (node names, properties).
 2. Fix issues pointed out by DT schema checks:
  - Add necessary clock controller inputs on Exynos5260.
  - Drop unsupported regulators on Odroid XU.
  - Add USB DWC3 supplies.
  - Drop old thermal properties from Exynos4210.
 3. Add support for Samsung Chagall WiFi (Exynos5420, Samsung Galaxy Tab
    S 10.5", SM-T800 ) and a similar Samsung Klimt WiFi (Samsung Galaxy
    Tab S 8.4").
 4. Add battery to Samsung P4Nnote (Exynos4412, Samsung Galaxy Note
    10.1).
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Merge tag 'samsung-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM changes for v5.18

1. Minor improvements and dtschema fixes (node names, properties).
2. Fix issues pointed out by DT schema checks:
 - Add necessary clock controller inputs on Exynos5260.
 - Drop unsupported regulators on Odroid XU.
 - Add USB DWC3 supplies.
 - Drop old thermal properties from Exynos4210.
3. Add support for Samsung Chagall WiFi (Exynos5420, Samsung Galaxy Tab
   S 10.5", SM-T800 ) and a similar Samsung Klimt WiFi (Samsung Galaxy
   Tab S 8.4").
4. Add battery to Samsung P4Nnote (Exynos4412, Samsung Galaxy Note
   10.1).

* tag 'samsung-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (22 commits)
  ARM: dts: exynos: use generic node name for LPDDR3 timings in Odroid
  ARM: dts: exynos: add charger and battery to p4note
  ARM: dts: exynos: update dma node name with dtschema
  ARM: dts: exynos: use define for TMU clock on Exynos4412
  ARM: dts: exynos: drop old thermal properties from Exynos4210
  ARM: dts: exynos: add fake USB DWC3 supplies to SMDK5410
  ARM: dts: exynos: add USB DWC3 supplies to SMDK5420
  ARM: dts: exynos: add USB DWC3 supplies to Chromebook Peach Pi
  ARM: dts: exynos: add USB DWC3 supplies to Chromebook Peach Pit
  ARM: dts: exynos: add USB DWC3 supplies to ArndaleOcta
  ARM: dts: exynos: add USB DWC3 supplies to Chromebook Spring
  ARM: dts: exynos: add USB DWC3 supplies to Chromebook Snow
  ARM: dts: exynos: add USB DWC3 supplies to SMDK5250
  ARM: dts: exynos: add USB DWC3 supplies to Arndale
  ARM: dts: exynos: Add support for Samsung Klimt WiFi
  dt-bindings: arm: samsung: document Klimt WiFi board binding
  ARM: dts: exynos: Add support for Samsung Chagall WiFi
  dt-bindings: arm: samsung: document Chagall WiFi board binding
  ARM: dts: exynos: drop unsupported MAX77802 regulators on Odroid XU
  ARM: dts: exynos: add necessary clock controller inputs in Exynos5260
  ...

Link: https://lore.kernel.org/r/20220209145226.184375-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2022-02-25 15:13:51 +01:00
parent 9d28fe1bec f5b721d2c9
commit 76990b47e8
29 changed files with 1136 additions and 42 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml
View File

@ -140,6 +140,8 @@ properties:
items:
- enum:
- insignal,arndale-octa # Insignal Arndale Octa
- samsung,chagall-wifi # Samsung SM-T800
- samsung,klimt-wifi # Samsung SM-T700
- samsung,smdk5420 # Samsung SMDK5420 eval
- const: samsung,exynos5420
- const: samsung,exynos5

2
arch/arm/boot/dts/Makefile
View File

@ -221,6 +221,8 @@ dtb-$(CONFIG_ARCH_EXYNOS5) += \
exynos5420-arndale-octa.dtb \
exynos5420-peach-pit.dtb \
exynos5420-smdk5420.dtb \
exynos5420-chagall-wifi.dtb \
exynos5420-klimt-wifi.dtb \
exynos5422-odroidhc1.dtb \
exynos5422-odroidxu3.dtb \
exynos5422-odroidxu3-lite.dtb \

2
arch/arm/boot/dts/exynos3250-monk.dts
View File

@ -69,7 +69,7 @@
reg = <0x25>;
wakeup-source;
muic: max77836-muic {
extcon {
compatible = "maxim,max77836-muic";
};

2
arch/arm/boot/dts/exynos3250-rinato.dts
View File

@ -70,7 +70,7 @@
reg = <0x25>;
wakeup-source;
muic: max77836-muic {
extcon {
compatible = "maxim,max77836-muic";
};

4
arch/arm/boot/dts/exynos3250.dtsi
View File

@ -421,7 +421,7 @@
status = "disabled";
};
pdma0: pdma@12680000 {
pdma0: dma-controller@12680000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12680000 0x1000>;
interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
@ -432,7 +432,7 @@
#dma-requests = <32>;
};
pdma1: pdma@12690000 {
pdma1: dma-controller@12690000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12690000 0x1000>;
interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;

6
arch/arm/boot/dts/exynos4.dtsi
View File

@ -669,7 +669,7 @@
status = "disabled";
};
pdma0: pdma@12680000 {
pdma0: dma-controller@12680000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12680000 0x1000>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
@ -680,7 +680,7 @@
#dma-requests = <32>;
};
pdma1: pdma@12690000 {
pdma1: dma-controller@12690000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12690000 0x1000>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
@ -691,7 +691,7 @@
#dma-requests = <32>;
};
mdma1: mdma@12850000 {
mdma1: dma-controller@12850000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12850000 0x1000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;

2
arch/arm/boot/dts/exynos4210-universal_c210.dts
View File

@ -659,7 +659,7 @@
};
&soc {
mdma0: mdma@12840000 {
mdma0: dma-controller@12840000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12840000 0x1000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;

2
arch/arm/boot/dts/exynos4210.dtsi
View File

@ -527,8 +527,6 @@
compatible = "samsung,exynos4210-tmu";
clocks = <&clock CLK_TMU_APBIF>;
clock-names = "tmu_apbif";
samsung,tmu_gain = <15>;
samsung,tmu_reference_voltage = <7>;
};
#include "exynos4210-pinctrl.dtsi"

34
arch/arm/boot/dts/exynos4412-p4note.dtsi
View File

@ -16,6 +16,7 @@
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/samsung.h>
#include <dt-bindings/power/summit,smb347-charger.h>
/ {
compatible = "samsung,p4note", "samsung,exynos4412", "samsung,exynos4";
@ -114,6 +115,17 @@
clock-names = "ext_clock";
};
battery_cell: battery-cell {
compatible = "simple-battery";
device-chemistry = "lithium-ion";
constant-charge-current-max-microamp = <2200000>;
precharge-current-microamp = <250000>;
charge-term-current-microamp = <250000>;
constant-charge-voltage-max-microvolt = <4200000>;
power-supplies = <&power_supply>;
};
i2c-gpio-1 {
compatible = "i2c-gpio";
sda-gpios = <&gpy2 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
@ -182,6 +194,28 @@
};
};
};
i2c-gpio-4 {
compatible = "i2c-gpio";
sda-gpios = <&gpm2 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpm2 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
power_supply: charger@6 {
compatible = "summit,smb347";
reg = <0x6>;
summit,enable-usb-charging;
summit,enable-charge-control = <SMB3XX_CHG_ENABLE_SW>;
summit,fast-voltage-threshold-microvolt = <2600000>;
summit,chip-temperature-threshold-celsius = <130>;
summit,usb-current-limit-microamp = <1800000>;
monitored-battery = <&battery_cell>;
};
};
};
&adc {

2
arch/arm/boot/dts/exynos4412.dtsi
View File

@ -813,7 +813,7 @@
interrupt-parent = <&combiner>;
interrupts = <2 4>;
reg = <0x100C0000 0x100>;
clocks = <&clock 383>;
clocks = <&clock CLK_TMU_APBIF>;
clock-names = "tmu_apbif";
status = "disabled";
};

5
arch/arm/boot/dts/exynos5250-arndale.dts
View File

@ -632,3 +632,8 @@
#size-cells = <0>;
};
};
&usbdrd {
vdd10-supply = <&ldo15_reg>;
vdd33-supply = <&ldo12_reg>;
};

5
arch/arm/boot/dts/exynos5250-smdk5250.dts
View File

@ -417,3 +417,8 @@
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
};
&usbdrd {
vdd10-supply = <&ldo15_reg>;
vdd33-supply = <&ldo12_reg>;
};

5
arch/arm/boot/dts/exynos5250-snow-common.dtsi
View File

@ -698,6 +698,11 @@
cs-gpios = <&gpa2 5 GPIO_ACTIVE_HIGH>;
};
&usbdrd {
vdd10-supply = <&ldo15_reg>;
vdd33-supply = <&ldo12_reg>;
};
&usbdrd_dwc3 {
dr_mode = "host";
};

5
arch/arm/boot/dts/exynos5250-spring.dts
View File

@ -553,4 +553,9 @@
num-cs = <1>;
};
&usbdrd {
vdd10-supply = <&ldo15_reg>;
vdd33-supply = <&ldo12_reg>;
};
#include "cros-ec-keyboard.dtsi"

19
arch/arm/boot/dts/exynos5250.dtsi
View File

@ -496,8 +496,7 @@
status = "disabled";
reg = <0x12d20000 0x100>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&pdma0 5
&pdma0 4>;
dmas = <&pdma0 5>, <&pdma0 4>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
@ -512,8 +511,7 @@
status = "disabled";
reg = <0x12d30000 0x100>;
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&pdma1 5
&pdma1 4>;
dmas = <&pdma1 5>, <&pdma1 4>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
@ -528,8 +526,7 @@
status = "disabled";
reg = <0x12d40000 0x100>;
interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&pdma0 7
&pdma0 6>;
dmas = <&pdma0 7>, <&pdma0 6>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
@ -637,7 +634,7 @@
#sound-dai-cells = <1>;
};
usb_dwc3 {
usbdrd: usb3 {
compatible = "samsung,exynos5250-dwusb3";
clocks = <&clock CLK_USB3>;
clock-names = "usbdrd30";
@ -695,7 +692,7 @@
samsung,pmureg-phandle = <&pmu_system_controller>;
};
pdma0: pdma@121a0000 {
pdma0: dma-controller@121a0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121A0000 0x1000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
@ -706,7 +703,7 @@
#dma-requests = <32>;
};
pdma1: pdma@121b0000 {
pdma1: dma-controller@121b0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121B0000 0x1000>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
@ -717,7 +714,7 @@
#dma-requests = <32>;
};
mdma0: mdma@10800000 {
mdma0: dma-controller@10800000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x10800000 0x1000>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
@ -728,7 +725,7 @@
#dma-requests = <1>;
};
mdma1: mdma@11c10000 {
mdma1: dma-controller@11c10000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x11C10000 0x1000>;
interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;

21
arch/arm/boot/dts/exynos5260-xyref5260.dts
View File

@ -29,6 +29,27 @@
#clock-cells = <0>;
};
ioclk_pcm: clock-pcm-ext {
compatible = "fixed-clock";
clock-frequency = <2048000>;
clock-output-names = "ioclk_pcm_extclk";
#clock-cells = <0>;
};
ioclk_i2s: clock-i2s-cd {
compatible = "fixed-clock";
clock-frequency = <147456000>;
clock-output-names = "ioclk_i2s_cdclk";
#clock-cells = <0>;
};
ioclk_spdif: clock-spdif-ext {
compatible = "fixed-clock";
clock-frequency = <49152000>;
clock-output-names = "ioclk_spdif_extclk";
#clock-cells = <0>;
};
xrtcxti: xrtcxti {
compatible = "fixed-clock";
clock-frequency = <32768>;

128
arch/arm/boot/dts/exynos5260.dtsi
View File

@ -113,78 +113,206 @@
compatible = "samsung,exynos5260-clock-top";
reg = <0x10010000 0x10000>;
#clock-cells = <1>;
clocks = <&fin_pll>,
<&clock_mif MIF_DOUT_MEM_PLL>,
<&clock_mif MIF_DOUT_BUS_PLL>,
<&clock_mif MIF_DOUT_MEDIA_PLL>;
clock-names = "fin_pll",
"dout_mem_pll",
"dout_bus_pll",
"dout_media_pll";
};
clock_peri: clock-controller@10200000 {
compatible = "samsung,exynos5260-clock-peri";
reg = <0x10200000 0x10000>;
#clock-cells = <1>;
clocks = <&fin_pll>,
<&ioclk_pcm>,
<&ioclk_i2s>,
<&ioclk_spdif>,
<&fin_pll>,
<&clock_top TOP_DOUT_ACLK_PERI_66>,
<&clock_top TOP_DOUT_SCLK_PERI_UART0>,
<&clock_top TOP_DOUT_SCLK_PERI_UART1>,
<&clock_top TOP_DOUT_SCLK_PERI_UART2>,
<&clock_top TOP_DOUT_SCLK_PERI_SPI0_B>,
<&clock_top TOP_DOUT_SCLK_PERI_SPI1_B>,
<&clock_top TOP_DOUT_SCLK_PERI_SPI2_B>,
<&clock_top TOP_DOUT_ACLK_PERI_AUD>;
clock-names = "fin_pll",
"ioclk_pcm_extclk",
"ioclk_i2s_cdclk",
"ioclk_spdif_extclk",
"phyclk_hdmi_phy_ref_cko",
"dout_aclk_peri_66",
"dout_sclk_peri_uart0",
"dout_sclk_peri_uart1",
"dout_sclk_peri_uart2",
"dout_sclk_peri_spi0_b",
"dout_sclk_peri_spi1_b",
"dout_sclk_peri_spi2_b",
"dout_aclk_peri_aud";
};
clock_egl: clock-controller@10600000 {
compatible = "samsung,exynos5260-clock-egl";
reg = <0x10600000 0x10000>;
#clock-cells = <1>;
clocks = <&fin_pll>,
<&clock_mif MIF_DOUT_BUS_PLL>;
clock-names = "fin_pll",
"dout_bus_pll";
};
clock_kfc: clock-controller@10700000 {
compatible = "samsung,exynos5260-clock-kfc";
reg = <0x10700000 0x10000>;
#clock-cells = <1>;
clocks = <&fin_pll>,
<&clock_mif MIF_DOUT_MEDIA_PLL>;
clock-names = "fin_pll",
"dout_media_pll";
};
clock_g2d: clock-controller@10a00000 {
compatible = "samsung,exynos5260-clock-g2d";
reg = <0x10A00000 0x10000>;
#clock-cells = <1>;
clocks = <&fin_pll>,
<&clock_top TOP_DOUT_ACLK_G2D_333>;
clock-names = "fin_pll",
"dout_aclk_g2d_333";
};
clock_mif: clock-controller@10ce0000 {
compatible = "samsung,exynos5260-clock-mif";
reg = <0x10CE0000 0x10000>;
#clock-cells = <1>;
clocks = <&fin_pll>;
clock-names = "fin_pll";
};
clock_mfc: clock-controller@11090000 {
compatible = "samsung,exynos5260-clock-mfc";
reg = <0x11090000 0x10000>;
#clock-cells = <1>;
clocks = <&fin_pll>,
<&clock_top TOP_DOUT_ACLK_MFC_333>;
clock-names = "fin_pll",
"dout_aclk_mfc_333";
};
clock_g3d: clock-controller@11830000 {
compatible = "samsung,exynos5260-clock-g3d";
reg = <0x11830000 0x10000>;
#clock-cells = <1>;
clocks = <&fin_pll>;
clock-names = "fin_pll";
};
clock_fsys: clock-controller@122e0000 {
compatible = "samsung,exynos5260-clock-fsys";
reg = <0x122E0000 0x10000>;
#clock-cells = <1>;
clocks = <&fin_pll>,
<&fin_pll>,
<&fin_pll>,
<&fin_pll>,
<&fin_pll>,
<&fin_pll>,
<&clock_top TOP_DOUT_ACLK_FSYS_200>;
clock-names = "fin_pll",
"phyclk_usbhost20_phy_phyclock",
"phyclk_usbhost20_phy_freeclk",
"phyclk_usbhost20_phy_clk48mohci",
"phyclk_usbdrd30_udrd30_pipe_pclk",
"phyclk_usbdrd30_udrd30_phyclock",
"dout_aclk_fsys_200";
};
clock_aud: clock-controller@128c0000 {
compatible = "samsung,exynos5260-clock-aud";
reg = <0x128C0000 0x10000>;
#clock-cells = <1>;
clocks = <&fin_pll>,
<&clock_top TOP_FOUT_AUD_PLL>,
<&ioclk_i2s>,
<&ioclk_pcm>;
clock-names = "fin_pll",
"fout_aud_pll",
"ioclk_i2s_cdclk",
"ioclk_pcm_extclk";
};
clock_isp: clock-controller@133c0000 {
compatible = "samsung,exynos5260-clock-isp";
reg = <0x133C0000 0x10000>;
#clock-cells = <1>;
clocks = <&fin_pll>,
<&clock_top TOP_DOUT_ACLK_ISP1_266>,
<&clock_top TOP_DOUT_ACLK_ISP1_400>,
<&clock_top TOP_MOUT_ACLK_ISP1_266>;
clock-names = "fin_pll",
"dout_aclk_isp1_266",
"dout_aclk_isp1_400",
"mout_aclk_isp1_266";
};
clock_gscl: clock-controller@13f00000 {
compatible = "samsung,exynos5260-clock-gscl";
reg = <0x13F00000 0x10000>;
#clock-cells = <1>;
clocks = <&fin_pll>,
<&clock_top TOP_DOUT_ACLK_GSCL_400>,
<&clock_top TOP_DOUT_ACLK_GSCL_333>;
clock-names = "fin_pll",
"dout_aclk_gscl_400",
"dout_aclk_gscl_333";
};
clock_disp: clock-controller@14550000 {
compatible = "samsung,exynos5260-clock-disp";
reg = <0x14550000 0x10000>;
#clock-cells = <1>;
clocks = <&fin_pll>,
<&fin_pll>,
<&fin_pll>,
<&fin_pll>,
<&fin_pll>,
<&fin_pll>,
<&fin_pll>,
<&fin_pll>,
<&fin_pll>,
<&fin_pll>,
<&fin_pll>,
<&fin_pll>,
<&fin_pll>,
<&fin_pll>,
<&ioclk_spdif>,
<&clock_top TOP_DOUT_ACLK_PERI_AUD>,
<&clock_top TOP_DOUT_ACLK_DISP_222>,
<&clock_top TOP_DOUT_SCLK_DISP_PIXEL>,
<&clock_top TOP_DOUT_ACLK_DISP_333>;
clock-names = "fin_pll",
"phyclk_dptx_phy_ch3_txd_clk",
"phyclk_dptx_phy_ch2_txd_clk",
"phyclk_dptx_phy_ch1_txd_clk",
"phyclk_dptx_phy_ch0_txd_clk",
"phyclk_hdmi_phy_tmds_clko",
"phyclk_hdmi_phy_ref_clko",
"phyclk_hdmi_phy_pixel_clko",
"phyclk_hdmi_link_o_tmds_clkhi",
"phyclk_mipi_dphy_4l_m_txbyte_clkhs",
"phyclk_dptx_phy_o_ref_clk_24m",
"phyclk_dptx_phy_clk_div2",
"phyclk_mipi_dphy_4l_m_rxclkesc0",
"phyclk_hdmi_phy_ref_cko",
"ioclk_spdif_extclk",
"dout_aclk_peri_aud",
"dout_aclk_disp_222",
"dout_sclk_disp_pixel",
"dout_aclk_disp_333";
};
gic: interrupt-controller@10481000 {

12
arch/arm/boot/dts/exynos5410-odroidxu.dts
View File

@ -394,10 +394,6 @@
regulator-always-on;
};
ldo16_reg: LDO16 {
regulator-name = "ldo16";
};
ldo17_reg: LDO17 {
regulator-name = "cam_sensor_core";
regulator-min-microvolt = <1200000>;
@ -427,10 +423,6 @@
regulator-max-microvolt = <2850000>;
};
ldo22_reg: LDO22 {
regulator-name = "ldo22";
};
ldo23_reg: LDO23 {
regulator-name = "dp_p3v3";
regulator-min-microvolt = <3300000>;
@ -477,10 +469,6 @@
regulator-always-on;
};
ldo31_reg: LDO31 {
regulator-name = "ldo31";
};
/* On revisions with ti,ina231 this is sensor VS */
ldo32_reg: LDO32 {
regulator-name = "vs_power_meter";

23
arch/arm/boot/dts/exynos5410-smdk5410.dts
View File

@ -41,6 +41,19 @@
reg = <0x02037000 0x1000>;
};
vdd10_usb3: voltage-regulator-0 {
compatible = "regulator-fixed";
regulator-name = "VDD10_USB3";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
};
vdd33_usb3: voltage-regulator-0 {
compatible = "regulator-fixed";
regulator-name = "VDD33_USB3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
};
&mmc_0 {
@ -121,3 +134,13 @@
&serial_2 {
status = "okay";
};
&usbdrd3_0 {
vdd10-supply = <&vdd10_usb3>;
vdd33-supply = <&vdd33_usb3>;
};
&usbdrd3_1 {
vdd10-supply = <&vdd10_usb3>;
vdd33-supply = <&vdd33_usb3>;
};

4
arch/arm/boot/dts/exynos5410.dtsi
View File

@ -189,7 +189,7 @@
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
};
pdma0: pdma@121a0000 {
pdma0: dma-controller@121a0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121a0000 0x1000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
@ -200,7 +200,7 @@
#dma-requests = <32>;
};
pdma1: pdma@121b0000 {
pdma1: dma-controller@121b0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121b0000 0x1000>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;

10
arch/arm/boot/dts/exynos5420-arndale-octa.dts
View File

@ -825,3 +825,13 @@
&usbdrd_dwc3_1 {
dr_mode = "host";
};
&usbdrd3_0 {
vdd10-supply = <&ldo11_reg>;
vdd33-supply = <&ldo9_reg>;
};
&usbdrd3_1 {
vdd10-supply = <&ldo11_reg>;
vdd33-supply = <&ldo9_reg>;
};

75
arch/arm/boot/dts/exynos5420-chagall-wifi.dts Normal file
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@ -0,0 +1,75 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Samsung's Exynos5420 Chagall WiFi board device tree source
*
* Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
* http://www.samsung.com
* Copyright (c) 2022 Henrik Grimler
*/
/dts-v1/;
#include "exynos5420-galaxy-tab-common.dtsi"
/ {
model = "Samsung Chagall WiFi based on Exynos5420";
compatible = "samsung,chagall-wifi", "samsung,exynos5420", \
"samsung,exynos5";
};
&ldo15_reg {
/* Unused */
regulator-name = "VDD_LDO15";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
&ldo17_reg {
regulator-name = "VDD_IRLED_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3350000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
&ldo28_reg {
/* Unused */
regulator-name = "VDD_LDO28";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
&ldo29_reg {
regulator-name = "VDD_TCON_1V8";
regulator-min-microvolt = <1900000>;
regulator-max-microvolt = <1900000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
&ldo31_reg {
regulator-name = "VDD_GRIP_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
&ldo32_reg {
regulator-name = "VDD_TSP_1V8";
regulator-min-microvolt = <1900000>;
regulator-max-microvolt = <1900000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};

691
arch/arm/boot/dts/exynos5420-galaxy-tab-common.dtsi Normal file
View File

@ -0,0 +1,691 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Base DT for Samsung's family of tablets based on Exynos5420.
*
* Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
* http://www.samsung.com
* Copyright (c) 2022 Henrik Grimler
*/
/dts-v1/;
#include "exynos5420.dtsi"
#include "exynos5420-cpus.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/samsung,s2mps11.h>
/ {
chassis-type = "tablet";
/*
* To successfully boot the mainline kernel with the stock
* bootloader (SBOOT), the tlb needs to be flushed after the
* page table pointer has been updated in __common_mmu_cache_on.
* The same hack is also needed to boot exynos4412-i9300 with
* stock bootloader, and probably other Samsung devices of
* similar age. See
* https://lore.kernel.org/all/1355276466-18295-1-git-send-email-arve@android.com
* for more details.
*/
chosen {
stdout-path = "serial2:115200n8";
};
memory@20000000 {
device_type = "memory";
reg = <0x20000000 0xc0000000>;
};
firmware@2073000 {
compatible = "samsung,secure-firmware";
reg = <0x02073000 0x1000>;
};
fixed-rate-clocks {
oscclk {
compatible = "samsung,exynos5420-oscclk";
clock-frequency = <24000000>;
};
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
key-power {
debounce-interval = <10>;
gpios = <&gpx2 2 GPIO_ACTIVE_LOW>;
label = "Power";
linux,code = <KEY_POWER>;
wakeup-source;
};
key-home {
debounce-interval = <10>;
gpios = <&gpx0 5 GPIO_ACTIVE_LOW>;
label = "Home";
linux,code = <KEY_HOME>;
wakeup-source;
};
key-volume-up {
debounce-interval = <10>;
gpios = <&gpx0 2 GPIO_ACTIVE_LOW>;
label = "Volume Up";
linux,code = <KEY_VOLUMEUP>;
};
key-volume-down {
debounce-interval = <10>;
gpios = <&gpx0 3 GPIO_ACTIVE_LOW>;
label = "Volume Down";
linux,code = <KEY_VOLUMEDOWN>;
};
};
};
&cci {
/* CCI is disabled in hardware */
status = "disabled";
};
&cpu0 {
cpu-supply = <&buck2_reg>;
};
&cpu4 {
cpu-supply = <&buck6_reg>;
};
&gpu {
status = "okay";
mali-supply = <&buck4_reg>;
};
&hsi2c_7 {
status = "okay";
pmic@66 {
compatible = "samsung,s2mps11-pmic";
reg = <0x66>;
interrupt-parent = <&gpx3>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&s2mps11_irq>;
s2mps11_osc: clocks {
compatible = "samsung,s2mps11-clk";
#clock-cells = <1>;
clock-output-names = "s2mps11_ap", "s2mps11_cp",
"s2mps11_bt";
};
regulators {
buck1_reg: BUCK1 {
regulator-name = "VDD_MIF_1V1";
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1300000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
buck2_reg: BUCK2 {
regulator-name = "VDD_ARM_1V0";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
buck3_reg: BUCK3 {
regulator-name = "VDD_INT_1V0";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1400000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
buck4_reg: BUCK4 {
regulator-name = "VDD_G3D_1V0";
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1400000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
buck5_reg: BUCK5 {
regulator-name = "VDD_MEM_1V2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
buck6_reg: BUCK6 {
regulator-name = "VDD_KFC_1V0";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
buck7_reg: BUCK7 {
regulator-name = "VIN_LLDO_1V4";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
};
buck8_reg: BUCK8 {
regulator-name = "VIN_MLDO_2V0";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2100000>;
regulator-always-on;
};
buck9_reg: BUCK9 {
regulator-name = "VIN_HLDO_3V5";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3500000>;
regulator-always-on;
};
buck10_reg: BUCK10 {
regulator-name = "VDD_CAM_ISP_1V0";
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <3550000>;
};
ldo1_reg: LDO1 {
regulator-name = "VDD_ALIVE_1.0V";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
};
ldo2_reg: LDO2 {
regulator-name = "VDD_APIO_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
ldo3_reg: LDO3 {
regulator-name = "VDD_APIO_MMC01_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo4_reg: LDO4 {
regulator-name = "VDD_ADC_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
ldo5_reg: LDO5 {
/* Unused */
regulator-name = "VDD_LDO5";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ldo6_reg: LDO6 {
regulator-name = "VDD_MIPI_1V0";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo7_reg: LDO7 {
regulator-name = "VDD_MIPI_PLL_ABB1_18V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo8_reg: LDO8 {
/* Unused */
regulator-name = "VDD_LDO8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ldo9_reg: LDO9 {
regulator-name = "VDD_UOTG_3V0";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
ldo10_reg: LDO10 {
regulator-name = "VDDQ_PRE_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
ldo11_reg: LDO11 {
regulator-name = "VDD_HSIC_1V0";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
ldo12_reg: LDO12 {
regulator-name = "VDD_HSIC_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
ldo13_reg: LDO13 {
regulator-name = "VDD_APIO_MMC2_2V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2800000>;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo14_reg: LDO14 {
regulator-name = "VDD_MOTOR_3V0";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo15_reg: LDO15 {
regulator-name = "VDD_LDO15";
/*
* LDO15 varies between devices and is
* specified in the device dts
*/
};
ldo16_reg: LDO16 {
regulator-name = "VDD_AP_2V8";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
ldo17_reg: LDO17 {
regulator-name = "VDD_LDO17";
/*
* LDO17 varies between devices and is
* specified in the device dts
*/
};
ldo18_reg: LDO18 {
/* Unused */
regulator-name = "VDD_LDO18";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ldo19_reg: LDO19 {
regulator-name = "VDD_VTF_2V8";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo20_reg: LDO20 {
regulator-name = "VDD_CAM1_CAM_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo21_reg: LDO21 {
regulator-name = "VDD_CAM_IO_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo22_reg: LDO22 {
regulator-name = "VDD_CAM0_S_CORE_1V1";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1200000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo23_reg: LDO23 {
regulator-name = "VDD_MIFS_1V1";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
ldo24_reg: LDO24 {
regulator-name = "VDD_TSP_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo25_reg: LDO25 {
/* Unused */
regulator-name = "VDD_LDO25";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3950000>;
};
ldo26_reg: LDO26 {
regulator-name = "VDD_CAM0_AF_2V8";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo27_reg: LDO27 {
regulator-name = "VDD_G3DS_1V0";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
ldo28_reg: LDO28 {
regulator-name = "VDD_LDO28";
/*
* LDO28 varies between devices and is
* specified in the device dts
*/
};
ldo29_reg: LDO29 {
regulator-name = "VDD_LDO29";
/*
* LDO29 varies between devices and is
* specified in the device dts
*/
};
ldo30_reg: LDO30 {
regulator-name = "VDD_TOUCH_1V8";
regulator-min-microvolt = <1900000>;
regulator-max-microvolt = <1900000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo31_reg: LDO31 {
regulator-name = "VDD_LDO31";
/*
* LDO31 varies between devices and is
* specified in the device dts
*/
};
ldo32_reg: LDO32 {
regulator-name = "VDD_LDO32";
/*
* LDO32 varies between devices and is
* specified in the device dts
*/
};
ldo33_reg: LDO33 {
regulator-name = "VDD_MHL_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo34_reg: LDO34 {
regulator-name = "VDD_MHL_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo35_reg: LDO35 {
regulator-name = "VDD_SIL_1V2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo36_reg: LDO36 {
/* Unused */
regulator-name = "VDD_LDO36";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3950000>;
};
ldo37_reg: LDO37 {
/* Unused */
regulator-name = "VDD_LDO37";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3950000>;
};
ldo38_reg: LDO38 {
regulator-name = "VDD_KEY_LED_3V3";
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
};
};
&mixer {
status = "okay";
};
/* Internal storage */
&mmc_0 {
status = "okay";
bus-width = <8>;
cap-mmc-highspeed;
card-detect-delay = <200>;
mmc-hs200-1_8v;
non-removable;
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>;
pinctrl-names = "default";
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-ddr-timing = <0 2>;
samsung,dw-mshc-sdr-timing = <0 4>;
vqmmc-supply = <&ldo3_reg>;
};
/* External sdcard */
&mmc_2 {
status = "okay";
bus-width = <4>;
cap-sd-highspeed;
card-detect-delay = <200>;
cd-gpios = <&gpx2 4 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&sd2_clk &sd2_cmd &mmc2_cd &sd2_bus1 &sd2_bus4>;
pinctrl-names = "default";
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-ddr-timing = <0 2>;
samsung,dw-mshc-sdr-timing = <0 4>;
sd-uhs-sdr50;
vmmc-supply = <&ldo19_reg>;
vqmmc-supply = <&ldo13_reg>;
};
&pinctrl_0 {
mmc2_cd: mmc2-cd-pins {
samsung,pins = "gpx2-4";
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
s2mps11_irq: s2mps11-irq-pins {
samsung,pins = "gpx3-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
};
};
&rtc {
status = "okay";
clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;
clock-names = "rtc", "rtc_src";
};
&tmu_cpu0 {
vtmu-supply = <&ldo10_reg>;
};
&tmu_cpu1 {
vtmu-supply = <&ldo10_reg>;
};
&tmu_cpu2 {
vtmu-supply = <&ldo10_reg>;
};
&tmu_cpu3 {
vtmu-supply = <&ldo10_reg>;
};
&tmu_gpu {
vtmu-supply = <&ldo10_reg>;
};
&usbdrd_dwc3_0 {
dr_mode = "peripheral";
};
&usbdrd_dwc3_1 {
dr_mode = "peripheral";
};
&usbdrd3_0 {
vdd33-supply = <&ldo9_reg>;
vdd10-supply = <&ldo11_reg>;
};
&usbdrd3_1 {
vdd33-supply = <&ldo9_reg>;
vdd10-supply = <&ldo11_reg>;
};

75
arch/arm/boot/dts/exynos5420-klimt-wifi.dts Normal file
View File

@ -0,0 +1,75 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Samsung's Exynos5420 Klimt WiFi board device tree source
*
* Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
* http://www.samsung.com
* Copyright (c) 2022 Henrik Grimler
*/
/dts-v1/;
#include "exynos5420-galaxy-tab-common.dtsi"
/ {
model = "Samsung Klimt WiFi based on Exynos5420";
compatible = "samsung,klimt-wifi", "samsung,exynos5420", \
"samsung,exynos5";
};
&ldo15_reg {
/* Unused */
regulator-name = "VDD_LDO15";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
&ldo17_reg {
regulator-name = "VDD_VCI_3V0";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
&ldo28_reg {
regulator-name = "VDD3_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
&ldo29_reg {
regulator-name = "VDDR_1V6";
regulator-min-microvolt = <1600000>;
regulator-max-microvolt = <1600000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
&ldo31_reg {
/* Unused */
regulator-name = "VDD_LDO31";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
&ldo32_reg {
regulator-name = "VDD_TSP_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
&mmc_2 {
sd-uhs-sdr104;
};

10
arch/arm/boot/dts/exynos5420-peach-pit.dts
View File

@ -1090,6 +1090,16 @@
vtmu-supply = <&ldo10_reg>;
};
&usbdrd3_0 {
vdd10-supply = <&ldo15_reg>;
vdd33-supply = <&ldo12_reg>;
};
&usbdrd3_1 {
vdd10-supply = <&ldo15_reg>;
vdd33-supply = <&ldo12_reg>;
};
&usbdrd_dwc3_0 {
dr_mode = "host";
};

10
arch/arm/boot/dts/exynos5420-smdk5420.dts
View File

@ -407,6 +407,16 @@
clock-names = "rtc", "rtc_src";
};
&usbdrd3_0 {
vdd10-supply = <&ldo11_reg>;
vdd33-supply = <&ldo9_reg>;
};
&usbdrd3_1 {
vdd10-supply = <&ldo11_reg>;
vdd33-supply = <&ldo9_reg>;
};
&usbdrd_phy0 {
vbus-supply = <&usb300_vbus_reg>;
};

10
arch/arm/boot/dts/exynos5420.dtsi
View File

@ -430,7 +430,7 @@
power-domains = <&mau_pd>;
};
adma: adma@3880000 {
adma: dma-controller@3880000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x03880000 0x1000>;
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
@ -442,7 +442,7 @@
power-domains = <&mau_pd>;
};
pdma0: pdma@121a0000 {
pdma0: dma-controller@121a0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121A0000 0x1000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
@ -453,7 +453,7 @@
#dma-requests = <32>;
};
pdma1: pdma@121b0000 {
pdma1: dma-controller@121b0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121B0000 0x1000>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
@ -464,7 +464,7 @@
#dma-requests = <32>;
};
mdma0: mdma@10800000 {
mdma0: dma-controller@10800000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x10800000 0x1000>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
@ -475,7 +475,7 @@
#dma-requests = <1>;
};
mdma1: mdma@11c10000 {
mdma1: dma-controller@11c10000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x11C10000 0x1000>;
interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;

2
arch/arm/boot/dts/exynos5422-odroid-core.dtsi
View File

@ -358,7 +358,7 @@
tCKESR-min-tck = <2>;
tMRD-min-tck = <5>;
timings_samsung_K3QF2F20DB_800mhz: lpddr3-timings@800000000 {
timings_samsung_K3QF2F20DB_800mhz: timings@800000000 {
compatible = "jedec,lpddr3-timings";
/* workaround: 'reg' shows max-freq */
reg = <800000000>;

10
arch/arm/boot/dts/exynos5800-peach-pi.dts
View File

@ -1072,6 +1072,16 @@
vtmu-supply = <&ldo10_reg>;
};
&usbdrd3_0 {
vdd10-supply = <&ldo15_reg>;
vdd33-supply = <&ldo12_reg>;
};
&usbdrd3_1 {
vdd10-supply = <&ldo15_reg>;
vdd33-supply = <&ldo12_reg>;
};
&usbdrd_dwc3_0 {
dr_mode = "host";
};