KVM: selftests: Introduce x2APIC register manipulation functions
Standardize reads and writes of the x2APIC MSRs. Signed-off-by: Jim Mattson <jmattson@google.com> Reviewed-by: Oliver Upton <oupton@google.com> Message-Id: <20210604172611.281819-11-jmattson@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -78,4 +78,14 @@ static inline void xapic_write_reg(unsigned int reg, uint32_t val)
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((volatile uint32_t *)APIC_DEFAULT_GPA)[reg >> 2] = val;
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}
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static inline uint64_t x2apic_read_reg(unsigned int reg)
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{
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return rdmsr(APIC_BASE_MSR + (reg >> 4));
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}
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static inline void x2apic_write_reg(unsigned int reg, uint64_t value)
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{
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wrmsr(APIC_BASE_MSR + (reg >> 4), value);
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}
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#endif /* SELFTEST_KVM_APIC_H */
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@ -38,9 +38,8 @@ void xapic_enable(void)
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void x2apic_enable(void)
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{
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uint32_t spiv_reg = APIC_BASE_MSR + (APIC_SPIV >> 4);
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wrmsr(MSR_IA32_APICBASE, rdmsr(MSR_IA32_APICBASE) |
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MSR_IA32_APICBASE_ENABLE | MSR_IA32_APICBASE_EXTD);
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wrmsr(spiv_reg, rdmsr(spiv_reg) | APIC_SPIV_APIC_ENABLED);
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x2apic_write_reg(APIC_SPIV,
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x2apic_read_reg(APIC_SPIV) | APIC_SPIV_APIC_ENABLED);
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}
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@ -55,8 +55,8 @@ static inline void sync_with_host(uint64_t phase)
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void self_smi(void)
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{
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wrmsr(APIC_BASE_MSR + (APIC_ICR >> 4),
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APIC_DEST_SELF | APIC_INT_ASSERT | APIC_DM_SMI);
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x2apic_write_reg(APIC_ICR,
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APIC_DEST_SELF | APIC_INT_ASSERT | APIC_DM_SMI);
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}
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void guest_code(void *arg)
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