ALSA: firewire-lib: cache next data_block_counter after probing tracepoints event for IR context
For debugging purpose, ALSA IEC 61883-1/6 engine has tracepoints event. In current implementation, next data block counter is stored as current data block counter before probing the event for IR isoc context. It's not good to check current packet parameter. This commit changes to assign the next data block counter after probing the event. Besides, Fireworks devices has a quirk to transfer isoc packet with data block counter for the last data block. For this quirk, the assignment is done before calling data block processing layer. Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Signed-off-by: Takashi Iwai <tiwai@suse.de>
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3fc4147653
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@ -519,13 +519,13 @@ static void build_it_pkt_header(struct amdtp_stream *s, unsigned int cycle,
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static int check_cip_header(struct amdtp_stream *s, const __be32 *buf,
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unsigned int payload_length,
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unsigned int *data_blocks, unsigned int *syt)
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unsigned int *data_blocks, unsigned int *dbc,
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unsigned int *syt)
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{
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u32 cip_header[2];
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unsigned int sph;
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unsigned int fmt;
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unsigned int fdf;
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unsigned int data_block_counter;
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bool lost;
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cip_header[0] = be32_to_cpu(buf[0]);
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@ -577,17 +577,17 @@ static int check_cip_header(struct amdtp_stream *s, const __be32 *buf,
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}
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/* Check data block counter continuity */
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data_block_counter = cip_header[0] & CIP_DBC_MASK;
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*dbc = cip_header[0] & CIP_DBC_MASK;
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if (*data_blocks == 0 && (s->flags & CIP_EMPTY_HAS_WRONG_DBC) &&
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s->data_block_counter != UINT_MAX)
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data_block_counter = s->data_block_counter;
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*dbc = s->data_block_counter;
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if (((s->flags & CIP_SKIP_DBC_ZERO_CHECK) &&
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data_block_counter == s->ctx_data.tx.first_dbc) ||
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*dbc == s->ctx_data.tx.first_dbc) ||
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s->data_block_counter == UINT_MAX) {
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lost = false;
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} else if (!(s->flags & CIP_DBC_IS_END_EVENT)) {
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lost = data_block_counter != s->data_block_counter;
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lost = *dbc != s->data_block_counter;
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} else {
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unsigned int dbc_interval;
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@ -596,26 +596,18 @@ static int check_cip_header(struct amdtp_stream *s, const __be32 *buf,
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else
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dbc_interval = *data_blocks;
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lost = data_block_counter !=
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((s->data_block_counter + dbc_interval) & 0xff);
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lost = *dbc != ((s->data_block_counter + dbc_interval) & 0xff);
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}
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if (lost) {
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dev_err(&s->unit->device,
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"Detect discontinuity of CIP: %02X %02X\n",
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s->data_block_counter, data_block_counter);
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s->data_block_counter, *dbc);
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return -EIO;
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}
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*syt = cip_header[1] & CIP_SYT_MASK;
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if (s->flags & CIP_DBC_IS_END_EVENT) {
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s->data_block_counter = data_block_counter;
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} else {
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s->data_block_counter =
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(data_block_counter + *data_blocks) & 0xff;
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}
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return 0;
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}
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@ -626,6 +618,7 @@ static int parse_ir_ctx_header(struct amdtp_stream *s, unsigned int cycle,
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unsigned int *syt, unsigned int index)
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{
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const __be32 *cip_header;
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unsigned int dbc;
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int err;
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*payload_length = be32_to_cpu(ctx_header[0]) >> ISO_DATA_LENGTH_SHIFT;
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@ -640,22 +633,33 @@ static int parse_ir_ctx_header(struct amdtp_stream *s, unsigned int cycle,
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if (!(s->flags & CIP_NO_HEADER)) {
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cip_header = ctx_header + 2;
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err = check_cip_header(s, cip_header, *payload_length,
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data_blocks, syt);
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if (err < 0)
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return err;
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data_blocks, &dbc, syt);
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if (err < 0) {
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if (err != -EAGAIN)
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return err;
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*data_blocks = 0;
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dbc = s->data_block_counter;
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}
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} else {
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cip_header = NULL;
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err = 0;
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*data_blocks = *payload_length / sizeof(__be32) /
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s->data_block_quadlets;
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dbc = s->data_block_counter;
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*syt = 0;
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s->data_block_counter =
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(s->data_block_counter + *data_blocks) & 0xff;
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}
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if (err >= 0 && s->flags & CIP_DBC_IS_END_EVENT)
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s->data_block_counter = dbc;
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trace_amdtp_packet(s, cycle, cip_header, *payload_length, *data_blocks,
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index);
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return 0;
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if (err >= 0 && !(s->flags & CIP_DBC_IS_END_EVENT))
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s->data_block_counter = (dbc + *data_blocks) & 0xff;
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return err;
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}
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// In CYCLE_TIMER register of IEEE 1394, 7 bits are used to represent second. On
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