liquidio CN23XX: code cleanup
Cleaned up unnecessary comments and added some minor macros. Signed-off-by: Raghu Vatsavayi <raghu.vatsavayi@caviumnetworks.com> Signed-off-by: Derek Chickles <derek.chickles@caviumnetworks.com> Signed-off-by: Satanand Burla <satananda.burla@caviumnetworks.com> Signed-off-by: Felix Manlunas <felix.manlunas@caviumnetworks.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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763185a38b
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@ -275,7 +275,6 @@ void lio_cn6xxx_setup_iq_regs(struct octeon_device *oct, u32 iq_no)
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{
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struct octeon_instr_queue *iq = oct->instr_queue[iq_no];
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/* Disable Packet-by-Packet mode; No Parse Mode or Skip length */
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octeon_write_csr64(oct, CN6XXX_SLI_IQ_PKT_INSTR_HDR64(iq_no), 0);
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/* Write the start of the input queue's ring and its size */
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@ -378,7 +377,7 @@ void lio_cn6xxx_disable_io_queues(struct octeon_device *oct)
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/* Reset the doorbell register for each Input queue. */
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for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) {
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if (!(oct->io_qmask.iq & (1ULL << i)))
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if (!(oct->io_qmask.iq & BIT_ULL(i)))
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continue;
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octeon_write_csr(oct, CN6XXX_SLI_IQ_DOORBELL(i), 0xFFFFFFFF);
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d32 = octeon_read_csr(oct, CN6XXX_SLI_IQ_DOORBELL(i));
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@ -400,9 +399,8 @@ void lio_cn6xxx_disable_io_queues(struct octeon_device *oct)
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;
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/* Reset the doorbell register for each Output queue. */
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/* for (i = 0; i < oct->num_oqs; i++) { */
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for (i = 0; i < MAX_OCTEON_OUTPUT_QUEUES(oct); i++) {
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if (!(oct->io_qmask.oq & (1ULL << i)))
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if (!(oct->io_qmask.oq & BIT_ULL(i)))
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continue;
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octeon_write_csr(oct, CN6XXX_SLI_OQ_PKTS_CREDIT(i), 0xFFFFFFFF);
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d32 = octeon_read_csr(oct, CN6XXX_SLI_OQ_PKTS_CREDIT(i));
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@ -537,15 +535,14 @@ static int lio_cn6xxx_process_droq_intr_regs(struct octeon_device *oct)
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oct->droq_intr = 0;
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/* for (oq_no = 0; oq_no < oct->num_oqs; oq_no++) { */
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for (oq_no = 0; oq_no < MAX_OCTEON_OUTPUT_QUEUES(oct); oq_no++) {
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if (!(droq_mask & (1ULL << oq_no)))
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if (!(droq_mask & BIT_ULL(oq_no)))
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continue;
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droq = oct->droq[oq_no];
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pkt_count = octeon_droq_check_hw_for_pkts(droq);
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if (pkt_count) {
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oct->droq_intr |= (1ULL << oq_no);
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oct->droq_intr |= BIT_ULL(oq_no);
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if (droq->ops.poll_mode) {
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u32 value;
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u32 reg;
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@ -721,8 +718,6 @@ int lio_setup_cn66xx_octeon_device(struct octeon_device *oct)
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int lio_validate_cn6xxx_config_info(struct octeon_device *oct,
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struct octeon_config *conf6xxx)
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{
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/* int total_instrs = 0; */
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if (CFG_GET_IQ_MAX_Q(conf6xxx) > CN6XXX_MAX_INPUT_QUEUES) {
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dev_err(&oct->pci_dev->dev, "%s: Num IQ (%d) exceeds Max (%d)\n",
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__func__, CFG_GET_IQ_MAX_Q(conf6xxx),
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@ -96,8 +96,8 @@ void lio_cn6xxx_setup_reg_address(struct octeon_device *oct, void *chip,
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struct octeon_reg_list *reg_list);
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u32 lio_cn6xxx_coprocessor_clock(struct octeon_device *oct);
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u32 lio_cn6xxx_get_oq_ticks(struct octeon_device *oct, u32 time_intr_in_us);
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int lio_setup_cn66xx_octeon_device(struct octeon_device *);
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int lio_setup_cn66xx_octeon_device(struct octeon_device *oct);
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int lio_validate_cn6xxx_config_info(struct octeon_device *oct,
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struct octeon_config *);
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struct octeon_config *conf6xxx);
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#endif
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@ -757,9 +757,6 @@ lio_get_ethtool_stats(struct net_device *netdev,
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/*sum of oct->instr_queue[iq_no]->stats.tx_dropped */
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data[i++] = CVM_CAST64(netstats->tx_dropped);
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/*data[i++] = CVM_CAST64(stats->multicast); */
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/*data[i++] = CVM_CAST64(stats->collisions); */
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/* firmware tx stats */
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/*per_core_stats[cvmx_get_core_num()].link_stats[mdata->from_ifidx].
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*fromhost.fw_total_sent
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@ -910,9 +907,8 @@ lio_get_ethtool_stats(struct net_device *netdev,
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/*lio->link_changes*/
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data[i++] = CVM_CAST64(lio->link_changes);
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/* TX -- lio_update_stats(lio); */
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for (j = 0; j < MAX_OCTEON_INSTR_QUEUES(oct_dev); j++) {
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if (!(oct_dev->io_qmask.iq & (1ULL << j)))
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if (!(oct_dev->io_qmask.iq & BIT_ULL(j)))
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continue;
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/*packets to network port*/
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/*# of packets tx to network */
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@ -954,9 +950,8 @@ lio_get_ethtool_stats(struct net_device *netdev,
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}
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/* RX */
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/* for (j = 0; j < oct_dev->num_oqs; j++) { */
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for (j = 0; j < MAX_OCTEON_OUTPUT_QUEUES(oct_dev); j++) {
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if (!(oct_dev->io_qmask.oq & (1ULL << j)))
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if (!(oct_dev->io_qmask.oq & BIT_ULL(j)))
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continue;
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/*packets send to TCP/IP network stack */
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@ -1030,7 +1025,7 @@ static void lio_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
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num_iq_stats = ARRAY_SIZE(oct_iq_stats_strings);
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for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct_dev); i++) {
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if (!(oct_dev->io_qmask.iq & (1ULL << i)))
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if (!(oct_dev->io_qmask.iq & BIT_ULL(i)))
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continue;
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for (j = 0; j < num_iq_stats; j++) {
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sprintf(data, "tx-%d-%s", i,
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@ -1040,9 +1035,8 @@ static void lio_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
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}
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num_oq_stats = ARRAY_SIZE(oct_droq_stats_strings);
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/* for (i = 0; i < oct_dev->num_oqs; i++) { */
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for (i = 0; i < MAX_OCTEON_OUTPUT_QUEUES(oct_dev); i++) {
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if (!(oct_dev->io_qmask.oq & (1ULL << i)))
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if (!(oct_dev->io_qmask.oq & BIT_ULL(i)))
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continue;
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for (j = 0; j < num_oq_stats; j++) {
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sprintf(data, "rx-%d-%s", i,
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@ -19,10 +19,8 @@
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* This file may also be available under a different license from Cavium.
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* Contact Cavium, Inc. for more information
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**********************************************************************/
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#include <linux/version.h>
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#include <linux/pci.h>
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#include <linux/firmware.h>
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#include <linux/ptp_clock_kernel.h>
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#include <net/vxlan.h>
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#include <linux/kthread.h>
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#include "liquidio_common.h"
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@ -201,9 +199,8 @@ static void octeon_droq_bh(unsigned long pdev)
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struct octeon_device_priv *oct_priv =
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(struct octeon_device_priv *)oct->priv;
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/* for (q_no = 0; q_no < oct->num_oqs; q_no++) { */
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for (q_no = 0; q_no < MAX_OCTEON_OUTPUT_QUEUES(oct); q_no++) {
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if (!(oct->io_qmask.oq & (1ULL << q_no)))
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if (!(oct->io_qmask.oq & BIT_ULL(q_no)))
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continue;
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reschedule |= octeon_droq_process_packets(oct, oct->droq[q_no],
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MAX_PACKET_BUDGET);
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@ -238,7 +235,7 @@ static int lio_wait_for_oq_pkts(struct octeon_device *oct)
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pending_pkts = 0;
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for (i = 0; i < MAX_OCTEON_OUTPUT_QUEUES(oct); i++) {
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if (!(oct->io_qmask.oq & (1ULL << i)))
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if (!(oct->io_qmask.oq & BIT_ULL(i)))
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continue;
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pkt_cnt += octeon_droq_check_hw_for_pkts(oct->droq[i]);
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}
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@ -320,7 +317,7 @@ static inline void pcierror_quiesce_device(struct octeon_device *oct)
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for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) {
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struct octeon_instr_queue *iq;
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if (!(oct->io_qmask.iq & (1ULL << i)))
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if (!(oct->io_qmask.iq & BIT_ULL(i)))
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continue;
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iq = oct->instr_queue[i];
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@ -386,7 +383,6 @@ static void stop_pci_io(struct octeon_device *oct)
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dev_dbg(&oct->pci_dev->dev, "Device state is now %s\n",
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lio_get_state_string(&oct->status));
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/* cn63xx_cleanup_aer_uncorrect_error_status(oct->pci_dev); */
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/* making it a common function for all OCTEON models */
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cleanup_aer_uncorrect_error_status(oct->pci_dev);
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}
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@ -941,7 +937,6 @@ static inline void update_link_status(struct net_device *netdev,
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if (lio->linfo.link.s.link_up) {
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netif_carrier_on(netdev);
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/* start_txq(netdev); */
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txqs_wake(netdev);
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} else {
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netif_carrier_off(netdev);
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@ -1019,7 +1014,7 @@ static void liquidio_schedule_droq_pkt_handlers(struct octeon_device *oct)
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if (oct->int_status & OCT_DEV_INTR_PKT_DATA) {
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for (oq_no = 0; oq_no < MAX_OCTEON_OUTPUT_QUEUES(oct);
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oq_no++) {
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if (!(oct->droq_intr & (1ULL << oq_no)))
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if (!(oct->droq_intr & BIT_ULL(oq_no)))
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continue;
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droq = oct->droq[oq_no];
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@ -1468,7 +1463,7 @@ static void octeon_destroy_resources(struct octeon_device *oct)
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/* fallthrough */
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case OCT_DEV_IN_RESET:
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case OCT_DEV_DROQ_INIT_DONE:
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/*atomic_set(&oct->status, OCT_DEV_DROQ_INIT_DONE);*/
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/* Wait for any pending operations */
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mdelay(100);
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for (i = 0; i < MAX_OCTEON_OUTPUT_QUEUES(oct); i++) {
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if (!(oct->io_qmask.oq & BIT_ULL(i)))
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@ -2461,7 +2456,6 @@ static int liquidio_napi_poll(struct napi_struct *napi, int budget)
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* Return back if tx_done is false.
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*/
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update_txq_status(oct, iq_no);
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/*tx_done = (iq->flush_index == iq->octeon_read_index);*/
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} else {
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dev_err(&oct->pci_dev->dev, "%s: iq (%d) num invalid\n",
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__func__, iq_no);
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@ -68,8 +68,6 @@ enum octeon_tag_type {
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*/
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#define OPCODE_CORE 0 /* used for generic core operations */
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#define OPCODE_NIC 1 /* used for NIC operations */
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#define OPCODE_LAST OPCODE_NIC
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/* Subcodes are used by host driver/apps to identify the sub-operation
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* for the core. They only need to by unique for a given subsystem.
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*/
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@ -649,12 +649,12 @@ void octeon_free_device_mem(struct octeon_device *oct)
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int i;
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for (i = 0; i < MAX_OCTEON_OUTPUT_QUEUES(oct); i++) {
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if (oct->io_qmask.oq & (1ULL << i))
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if (oct->io_qmask.oq & BIT_ULL(i))
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vfree(oct->droq[i]);
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}
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for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) {
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if (oct->io_qmask.iq & (1ULL << i))
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if (oct->io_qmask.iq & BIT_ULL(i))
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vfree(oct->instr_queue[i]);
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}
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@ -1148,7 +1148,7 @@ int octeon_get_tx_qsize(struct octeon_device *oct, u32 q_no)
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{
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if (oct && (q_no < MAX_OCTEON_INSTR_QUEUES(oct)) &&
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(oct->io_qmask.iq & (1ULL << q_no)))
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(oct->io_qmask.iq & BIT_ULL(q_no)))
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return oct->instr_queue[q_no]->max_count;
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return -1;
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@ -1157,7 +1157,7 @@ int octeon_get_tx_qsize(struct octeon_device *oct, u32 q_no)
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int octeon_get_rx_qsize(struct octeon_device *oct, u32 q_no)
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{
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if (oct && (q_no < MAX_OCTEON_OUTPUT_QUEUES(oct)) &&
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(oct->io_qmask.oq & (1ULL << q_no)))
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(oct->io_qmask.oq & BIT_ULL(q_no)))
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return oct->droq[q_no]->max_count;
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return -1;
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}
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@ -337,7 +337,7 @@ int octeon_init_droq(struct octeon_device *oct,
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/* For 56xx Pass1, this function won't be called, so no checks. */
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oct->fn_list.setup_oq_regs(oct, q_no);
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oct->io_qmask.oq |= (1ULL << q_no);
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oct->io_qmask.oq |= BIT_ULL(q_no);
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return 0;
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@ -121,7 +121,6 @@ struct oct_droq_stats {
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/** Num of Packets dropped due to receive path failures. */
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u64 rx_dropped;
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/** Num of vxlan packets received; */
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u64 rx_vxlan;
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/** Num of failures of recv_buffer_alloc() */
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@ -69,7 +69,6 @@ struct oct_iq_stats {
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u64 tx_vxlan; /* tunnel */
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u64 tx_dmamap_fail;
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u64 tx_restart;
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/*u64 tx_timeout_count;*/
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};
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#define OCT_IQ_STATS_SIZE (sizeof(struct oct_iq_stats))
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@ -207,24 +207,6 @@ out:
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return errno;
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}
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static inline void
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sleep_atomic_cond(wait_queue_head_t *waitq, atomic_t *pcond)
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{
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wait_queue_t we;
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init_waitqueue_entry(&we, current);
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add_wait_queue(waitq, &we);
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while (!atomic_read(pcond)) {
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set_current_state(TASK_INTERRUPTIBLE);
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if (signal_pending(current))
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goto out;
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schedule();
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}
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out:
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set_current_state(TASK_RUNNING);
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remove_wait_queue(waitq, &we);
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}
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/* Gives up the CPU for a timeout period.
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* Check that the condition is not true before we go to sleep for a
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* timeout period.
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@ -145,7 +145,7 @@ int octeon_init_instr_queue(struct octeon_device *oct,
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spin_lock_init(&iq->iq_flush_running_lock);
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oct->io_qmask.iq |= (1ULL << iq_no);
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oct->io_qmask.iq |= BIT_ULL(iq_no);
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/* Set the 32B/64B mode for each input queue */
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oct->io_qmask.iq64B |= ((conf->instr_type == 64) << iq_no);
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@ -252,9 +252,8 @@ int lio_wait_for_instr_fetch(struct octeon_device *oct)
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do {
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instr_cnt = 0;
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/*for (i = 0; i < oct->num_iqs; i++) {*/
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for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) {
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if (!(oct->io_qmask.iq & (1ULL << i)))
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if (!(oct->io_qmask.iq & BIT_ULL(i)))
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continue;
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pending =
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atomic_read(&oct->
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@ -579,8 +578,6 @@ octeon_send_command(struct octeon_device *oct, u32 iq_no,
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/* This is only done here to expedite packets being flushed
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* for cases where there are no IQ completion interrupts.
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*/
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/*if (iq->do_auto_flush)*/
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/* octeon_flush_iq(oct, iq, 2, 0);*/
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return st.status;
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}
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@ -81,11 +81,7 @@ int lio_process_ordered_list(struct octeon_device *octeon_dev,
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spin_lock_bh(&ordered_sc_list->lock);
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if (ordered_sc_list->head.next == &ordered_sc_list->head) {
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/* ordered_sc_list is empty; there is
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* nothing to process
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*/
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spin_unlock_bh
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(&ordered_sc_list->lock);
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spin_unlock_bh(&ordered_sc_list->lock);
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return 1;
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}
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@ -85,7 +85,6 @@ enum {
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/** A value of 0x00000000 indicates no error i.e. success */
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#define DRIVER_ERROR_NONE 0x00000000
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/** (Major number: 0x0000; Minor Number: 0x0001) */
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#define DRIVER_ERROR_REQ_PENDING 0x00000001
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#define DRIVER_ERROR_REQ_TIMEOUT 0x00000003
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#define DRIVER_ERROR_REQ_EINTR 0x00000004
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