ARM: GIC: private a standard get_irqnr_preamble assembler macro
Provide a standard get_irqnr_preamble assembler macro for platforms to use, which retrieves the base address of the GIC CPU interface from gic_cpu_base_addr. Allow platforms to override this by defining HAVE_GET_IRQNR_PREAMBLE. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -10,6 +10,13 @@
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#include <asm/hardware/gic.h>
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#ifndef HAVE_GET_IRQNR_PREAMBLE
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.macro get_irqnr_preamble, base, tmp
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ldr \base, =gic_cpu_base_addr
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ldr \base, [\base]
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.endm
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#endif
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/*
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* The interrupt numbering scheme is defined in the
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* interrupt controller spec. To wit:
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@ -14,10 +14,5 @@
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.macro disable_fiq
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.endm
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.macro get_irqnr_preamble, base, tmp
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ldr \base, =gic_cpu_base_addr
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ldr \base, [\base]
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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@ -170,6 +170,7 @@ omap_irq_base: .word 0
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#ifdef CONFIG_ARCH_OMAP4
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#define HAVE_GET_IRQNR_PREAMBLE
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#include <asm/hardware/entry-macro-gic.S>
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.macro get_irqnr_preamble, base, tmp
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@ -13,11 +13,6 @@
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.macro disable_fiq
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.endm
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.macro get_irqnr_preamble, base, tmp
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ldr \base, =gic_cpu_base_addr
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ldr \base, [\base]
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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@ -16,7 +16,7 @@
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#include <mach/io.h>
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#if defined(CONFIG_ARM_GIC)
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#define HAVE_GET_IRQNR_PREAMBLE
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#include <asm/hardware/entry-macro-gic.S>
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/* Uses the GIC interrupt controller built into the cpu */
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@ -11,6 +11,7 @@
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* warranty of any kind, whether express or implied.
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*/
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#include <mach/hardware.h>
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#define HAVE_GET_IRQNR_PREAMBLE
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#include <asm/hardware/entry-macro-gic.S>
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.macro disable_fiq
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@ -3,10 +3,5 @@
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.macro disable_fiq
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.endm
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.macro get_irqnr_preamble, base, tmp
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ldr \base, =gic_cpu_base_addr
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ldr \base, [\base]
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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