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perf: CXL: fix mismatched number of counters mask 

The number of Count Units field is described as 6 bits long
in the CXL 3.0 specification. However, its mask value was
only declared as 5 bits long.

Signed-off-by: Jeongtae Park <jtp.park@samsung.com>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20230905123309.775854-1-jtp.park@samsung.com
Signed-off-by: Will Deacon <will@kernel.org>
This commit is contained in:
Jeongtae Park 2023-09-05 21:33:09 +09:00 committed by Will Deacon
parent e1df272139
commit 7625df9f4b
1 changed files with 1 additions and 1 deletions
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2
drivers/perf/cxl_pmu.c
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@ -25,7 +25,7 @@
#include "../cxl/pmu.h"
#define CXL_PMU_CAP_REG 0x0
#define CXL_PMU_CAP_NUM_COUNTERS_MSK GENMASK_ULL(4, 0)
#define CXL_PMU_CAP_NUM_COUNTERS_MSK GENMASK_ULL(5, 0)
#define CXL_PMU_CAP_COUNTER_WIDTH_MSK GENMASK_ULL(15, 8)
#define CXL_PMU_CAP_NUM_EVN_CAP_REG_SUP_MSK GENMASK_ULL(24, 20)
#define CXL_PMU_CAP_FILTERS_SUP_MSK GENMASK_ULL(39, 32)