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qed: Enable automatic recovery on error condition. 

This patch enables automatic recovery by default in case of various
error condition like fw assert , hardware error etc.
This also ensure driver can handle multiple iteration of assertion
conditions.

Signed-off-by: Ariel Elior <aelior@marvell.com>
Signed-off-by: Shai Malin <smalin@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: Alok Prasad <palok@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Alok Prasad 2021-08-24 04:02:46 +00:00 committed by David S. Miller
parent 406f42fa0d
commit 755f905340
4 changed files with 39 additions and 2 deletions
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2
drivers/net/ethernet/qlogic/qed/qed_devlink.c
View File

@ -93,7 +93,7 @@ static const struct devlink_health_reporter_ops qed_fw_fatal_reporter_ops = {
.dump = qed_fw_fatal_reporter_dump,
};
#define QED_REPORTER_FW_GRACEFUL_PERIOD 1200000
#define QED_REPORTER_FW_GRACEFUL_PERIOD 0
void qed_fw_reporters_create(struct devlink *devlink)
{

10
drivers/net/ethernet/qlogic/qed/qed_int.c
View File

@ -351,6 +351,9 @@ static int qed_fw_assertion(struct qed_hwfn *p_hwfn)
qed_hw_err_notify(p_hwfn, p_hwfn->p_dpc_ptt, QED_HW_ERR_FW_ASSERT,
"FW assertion!\n");
/* Clear assert indications */
qed_wr(p_hwfn, p_hwfn->p_dpc_ptt, MISC_REG_AEU_GENERAL_ATTN_32, 0);
return -EINVAL;
}
@ -953,6 +956,13 @@ qed_int_deassertion_aeu_bit(struct qed_hwfn *p_hwfn,
DP_INFO(p_hwfn, "`%s' - Disabled future attentions\n",
p_bit_name);
/* Re-enable FW aassertion (Gen 32) interrupts */
val = qed_rd(p_hwfn, p_hwfn->p_dpc_ptt,
MISC_REG_AEU_ENABLE4_IGU_OUT_0);
val |= MISC_REG_AEU_ENABLE4_IGU_OUT_0_GENERAL_ATTN32;
qed_wr(p_hwfn, p_hwfn->p_dpc_ptt,
MISC_REG_AEU_ENABLE4_IGU_OUT_0, val);
out:
return rc;
}

8
drivers/net/ethernet/qlogic/qed/qed_reg_addr.h
View File

@ -504,6 +504,8 @@
0x180824UL
#define MISC_REG_AEU_GENERAL_ATTN_0 \
0x008400UL
#define MISC_REG_AEU_GENERAL_ATTN_32 \
0x008480UL
#define MISC_REG_AEU_GENERAL_ATTN_35 \
0x00848cUL
#define CAU_REG_SB_ADDR_MEMORY \
@ -518,6 +520,12 @@
0x180804UL
#define MISC_REG_AEU_ENABLE1_IGU_OUT_0 \
0x00849cUL
#define MISC_REG_AEU_ENABLE4_IGU_OUT_0 \
0x0084a8UL
#define MISC_REG_AEU_ENABLE4_IGU_OUT_0_GENERAL_ATTN32 \
(0x1UL << 0)
#define MISC_REG_AEU_ENABLE4_IGU_OUT_0_GENERAL_ATTN32_SHIFT \
0
#define MISC_REG_AEU_AFTER_INVERT_1_IGU \
0x0087b4UL
#define MISC_REG_AEU_MASK_ATTN_IGU \

21
drivers/net/ethernet/qlogic/qede/qede_main.c
View File

@ -1898,6 +1898,12 @@ static int qede_req_msix_irqs(struct qede_dev *edev)
&edev->fp_array[i]);
if (rc) {
DP_ERR(edev, "Request fp %d irq failed\n", i);
#ifdef CONFIG_RFS_ACCEL
if (edev->ndev->rx_cpu_rmap)
free_irq_cpu_rmap(edev->ndev->rx_cpu_rmap);
edev->ndev->rx_cpu_rmap = NULL;
#endif
qede_sync_free_irqs(edev);
return rc;
}
@ -2290,6 +2296,15 @@ static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode,
rc = qede_stop_queues(edev);
if (rc) {
#ifdef CONFIG_RFS_ACCEL
if (edev->dev_info.common.b_arfs_capable) {
qede_poll_for_freeing_arfs_filters(edev);
if (edev->ndev->rx_cpu_rmap)
free_irq_cpu_rmap(edev->ndev->rx_cpu_rmap);
edev->ndev->rx_cpu_rmap = NULL;
}
#endif
qede_sync_free_irqs(edev);
goto out;
}
@ -2620,8 +2635,10 @@ static void qede_generic_hw_err_handler(struct qede_dev *edev)
"Generic sleepable HW error handling started - err_flags 0x%lx\n",
edev->err_flags);
if (edev->devlink)
if (edev->devlink) {
DP_NOTICE(edev, "Reporting fatal error to devlink\n");
edev->ops->common->report_fatal_error(edev->devlink, edev->last_err_type);
}
clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags);
@ -2643,6 +2660,8 @@ static void qede_set_hw_err_flags(struct qede_dev *edev,
case QED_HW_ERR_FW_ASSERT:
set_bit(QEDE_ERR_ATTN_CLR_EN, &err_flags);
set_bit(QEDE_ERR_GET_DBG_INFO, &err_flags);
/* make this error as recoverable and start recovery*/
set_bit(QEDE_ERR_IS_RECOVERABLE, &err_flags);
break;
default: