drm/amd/display: To update backlight restore mechanism
[Why] Cached backlight is never being updated since panel_cntl specific registers were moved from abm to panel_cntl. [How] Update cached backlight in set_abm_immediate_disable as what we used to do. Also, update the priority of backlight restore mechanism so that cached backlight has the highest priority since it is always correct. Signed-off-by: Camille Cho <Camille.Cho@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -108,25 +108,17 @@ static uint32_t dce_panel_cntl_hw_init(struct panel_cntl *panel_cntl)
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*/
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*/
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REG_GET(BL_PWM_CNTL, BL_ACTIVE_INT_FRAC_CNT, &value);
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REG_GET(BL_PWM_CNTL, BL_ACTIVE_INT_FRAC_CNT, &value);
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if (value == 0 || value == 1) {
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if (panel_cntl->stored_backlight_registers.BL_PWM_CNTL != 0) {
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if (panel_cntl->stored_backlight_registers.BL_PWM_CNTL != 0) {
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REG_WRITE(BL_PWM_CNTL,
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REG_WRITE(BL_PWM_CNTL,
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panel_cntl->stored_backlight_registers.BL_PWM_CNTL);
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panel_cntl->stored_backlight_registers.BL_PWM_CNTL);
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REG_WRITE(BL_PWM_CNTL2,
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REG_WRITE(BL_PWM_CNTL2,
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panel_cntl->stored_backlight_registers.BL_PWM_CNTL2);
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panel_cntl->stored_backlight_registers.BL_PWM_CNTL2);
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REG_WRITE(BL_PWM_PERIOD_CNTL,
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REG_WRITE(BL_PWM_PERIOD_CNTL,
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panel_cntl->stored_backlight_registers.BL_PWM_PERIOD_CNTL);
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panel_cntl->stored_backlight_registers.BL_PWM_PERIOD_CNTL);
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REG_UPDATE(PWRSEQ_REF_DIV,
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REG_UPDATE(PWRSEQ_REF_DIV,
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BL_PWM_REF_DIV,
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BL_PWM_REF_DIV,
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panel_cntl->stored_backlight_registers.LVTMA_PWRSEQ_REF_DIV_BL_PWM_REF_DIV);
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panel_cntl->stored_backlight_registers.LVTMA_PWRSEQ_REF_DIV_BL_PWM_REF_DIV);
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} else if ((value != 0) && (value != 1)) {
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} else {
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/* TODO: Note: This should not really happen since VBIOS
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* should have initialized PWM registers on boot.
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*/
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REG_WRITE(BL_PWM_CNTL, 0xC000FA00);
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REG_WRITE(BL_PWM_PERIOD_CNTL, 0x000C0FA0);
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}
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} else {
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panel_cntl->stored_backlight_registers.BL_PWM_CNTL =
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panel_cntl->stored_backlight_registers.BL_PWM_CNTL =
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REG_READ(BL_PWM_CNTL);
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REG_READ(BL_PWM_CNTL);
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panel_cntl->stored_backlight_registers.BL_PWM_CNTL2 =
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panel_cntl->stored_backlight_registers.BL_PWM_CNTL2 =
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@ -136,6 +128,12 @@ static uint32_t dce_panel_cntl_hw_init(struct panel_cntl *panel_cntl)
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REG_GET(PWRSEQ_REF_DIV, BL_PWM_REF_DIV,
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REG_GET(PWRSEQ_REF_DIV, BL_PWM_REF_DIV,
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&panel_cntl->stored_backlight_registers.LVTMA_PWRSEQ_REF_DIV_BL_PWM_REF_DIV);
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&panel_cntl->stored_backlight_registers.LVTMA_PWRSEQ_REF_DIV_BL_PWM_REF_DIV);
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} else {
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/* TODO: Note: This should not really happen since VBIOS
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* should have initialized PWM registers on boot.
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*/
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REG_WRITE(BL_PWM_CNTL, 0x8000FA00);
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REG_WRITE(BL_PWM_PERIOD_CNTL, 0x000C0FA0);
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}
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}
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// Have driver take backlight control
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// Have driver take backlight control
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@ -171,9 +171,11 @@ void dcn21_set_abm_immediate_disable(struct pipe_ctx *pipe_ctx)
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return;
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return;
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}
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}
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if (abm && panel_cntl)
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if (abm && panel_cntl) {
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dmub_abm_set_pipe(abm, otg_inst, SET_ABM_PIPE_IMMEDIATELY_DISABLE,
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dmub_abm_set_pipe(abm, otg_inst, SET_ABM_PIPE_IMMEDIATELY_DISABLE,
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panel_cntl->inst);
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panel_cntl->inst);
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panel_cntl->funcs->store_backlight_level(panel_cntl);
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}
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}
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}
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void dcn21_set_pipe(struct pipe_ctx *pipe_ctx)
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void dcn21_set_pipe(struct pipe_ctx *pipe_ctx)
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