[media] v4l: omap3isp: Fix data lane shift configuration

The data-shift DT property speficies the number of bits to be shifted,
but the driver still interprets the value as a multiple of two bits as
used by now removed platform data support. Fix it.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
This commit is contained in:
Laurent Pinchart 2015-12-29 12:03:19 -02:00 committed by Mauro Carvalho Chehab
parent 61d5b9d46d
commit 74d1e7c09c
3 changed files with 6 additions and 6 deletions

View File

@ -449,7 +449,7 @@ void omap3isp_configure_bridge(struct isp_device *isp,
case CCDC_INPUT_PARALLEL: case CCDC_INPUT_PARALLEL:
ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL; ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
ispctrl_val |= parcfg->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT; ispctrl_val |= parcfg->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
shift += parcfg->data_lane_shift * 2; shift += parcfg->data_lane_shift;
break; break;
case CCDC_INPUT_CSI2A: case CCDC_INPUT_CSI2A:

View File

@ -2421,7 +2421,7 @@ static int ccdc_link_validate(struct v4l2_subdev *sd,
&((struct isp_bus_cfg *) &((struct isp_bus_cfg *)
media_entity_to_v4l2_subdev(link->source->entity) media_entity_to_v4l2_subdev(link->source->entity)
->host_priv)->bus.parallel; ->host_priv)->bus.parallel;
parallel_shift = parcfg->data_lane_shift * 2; parallel_shift = parcfg->data_lane_shift;
} else { } else {
parallel_shift = 0; parallel_shift = 0;
} }

View File

@ -33,9 +33,9 @@ enum isp_interface_type {
* struct isp_parallel_cfg - Parallel interface configuration * struct isp_parallel_cfg - Parallel interface configuration
* @data_lane_shift: Data lane shifter * @data_lane_shift: Data lane shifter
* 0 - CAMEXT[13:0] -> CAM[13:0] * 0 - CAMEXT[13:0] -> CAM[13:0]
* 1 - CAMEXT[13:2] -> CAM[11:0] * 2 - CAMEXT[13:2] -> CAM[11:0]
* 2 - CAMEXT[13:4] -> CAM[9:0] * 4 - CAMEXT[13:4] -> CAM[9:0]
* 3 - CAMEXT[13:6] -> CAM[7:0] * 6 - CAMEXT[13:6] -> CAM[7:0]
* @clk_pol: Pixel clock polarity * @clk_pol: Pixel clock polarity
* 0 - Sample on rising edge, 1 - Sample on falling edge * 0 - Sample on rising edge, 1 - Sample on falling edge
* @hs_pol: Horizontal synchronization polarity * @hs_pol: Horizontal synchronization polarity
@ -48,7 +48,7 @@ enum isp_interface_type {
* 0 - Normal, 1 - One's complement * 0 - Normal, 1 - One's complement
*/ */
struct isp_parallel_cfg { struct isp_parallel_cfg {
unsigned int data_lane_shift:2; unsigned int data_lane_shift:3;
unsigned int clk_pol:1; unsigned int clk_pol:1;
unsigned int hs_pol:1; unsigned int hs_pol:1;
unsigned int vs_pol:1; unsigned int vs_pol:1;