irqchip: omap-intc: correct maximum number or MIR registers
maximum number of MIR register is 4, rather than 3. Fix that. Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -49,7 +49,7 @@
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#define ACTIVEIRQ_MASK 0x7f /* omap2/3 active interrupt bits */
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#define INTCPS_NR_ILR_REGS 128
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#define INTCPS_NR_MIR_REGS 3
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#define INTCPS_NR_MIR_REGS 4
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#define INTC_IDLE_FUNCIDLE (1 << 0)
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#define INTC_IDLE_TURBO (1 << 1)
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