drm/amd/display: Make stream commits call into DC only once
[Why] dc_commit_updates_for_stream is called twice per stream: once with the flip data and once will all other data. This causes problems when these DC calls have different numbers of planes For example, a commit with a pageflip on plane A and a non-pageflip change on plane B will first call into DC with just plane A, causing plane B to be disabled. Then it will call into DC with both planes, re-enabling plane B [How] Merge flip and full into a single bundle Apart from the single DC call, the logic should not be changed by this patch Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
David Francis
Alex Deucher
parent
8628d02f60
commit
74aa7bd4c6
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@ -4666,32 +4666,27 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
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struct dm_crtc_state *acrtc_state = to_dm_crtc_state(new_pcrtc_state);
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struct dm_crtc_state *dm_old_crtc_state =
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to_dm_crtc_state(drm_atomic_get_old_crtc_state(state, pcrtc));
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int flip_count = 0, planes_count = 0, vpos, hpos;
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int planes_count = 0, vpos, hpos;
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unsigned long flags;
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struct amdgpu_bo *abo;
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uint64_t tiling_flags, dcc_address;
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uint32_t target, target_vblank;
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uint64_t last_flip_vblank;
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bool vrr_active = acrtc_state->freesync_config.state == VRR_STATE_ACTIVE_VARIABLE;
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struct {
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struct dc_surface_update surface_updates[MAX_SURFACES];
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struct dc_flip_addrs flip_addrs[MAX_SURFACES];
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struct dc_stream_update stream_update;
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} *flip;
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bool pflip_present = false;
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struct {
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struct dc_surface_update surface_updates[MAX_SURFACES];
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struct dc_plane_info plane_infos[MAX_SURFACES];
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struct dc_scaling_info scaling_infos[MAX_SURFACES];
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struct dc_flip_addrs flip_addrs[MAX_SURFACES];
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struct dc_stream_update stream_update;
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} *full;
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} *bundle;
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flip = kzalloc(sizeof(*flip), GFP_KERNEL);
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full = kzalloc(sizeof(*full), GFP_KERNEL);
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bundle = kzalloc(sizeof(*bundle), GFP_KERNEL);
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if (!flip || !full) {
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dm_error("Failed to allocate update bundles\n");
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if (!bundle) {
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dm_error("Failed to allocate update bundle\n");
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goto cleanup;
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}
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@ -4701,7 +4696,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
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struct drm_crtc_state *new_crtc_state;
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struct drm_framebuffer *fb = new_plane_state->fb;
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struct amdgpu_framebuffer *afb = to_amdgpu_framebuffer(fb);
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bool pflip_needed;
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bool framebuffer_changed;
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struct dc_plane_state *dc_plane;
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struct dm_plane_state *dm_new_plane_state = to_dm_plane_state(new_plane_state);
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@ -4716,12 +4711,14 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
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if (!new_crtc_state->active)
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continue;
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pflip_needed = old_plane_state->fb &&
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old_plane_state->fb != new_plane_state->fb;
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dc_plane = dm_new_plane_state->dc_state;
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if (pflip_needed) {
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framebuffer_changed = old_plane_state->fb &&
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old_plane_state->fb != new_plane_state->fb;
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pflip_present = pflip_present || framebuffer_changed;
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if (framebuffer_changed) {
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/*
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* TODO This might fail and hence better not used, wait
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* explicitly on fences instead
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@ -4750,22 +4747,22 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
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amdgpu_bo_unreserve(abo);
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flip->flip_addrs[flip_count].address.grph.addr.low_part = lower_32_bits(afb->address);
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flip->flip_addrs[flip_count].address.grph.addr.high_part = upper_32_bits(afb->address);
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bundle->flip_addrs[planes_count].address.grph.addr.low_part = lower_32_bits(afb->address);
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bundle->flip_addrs[planes_count].address.grph.addr.high_part = upper_32_bits(afb->address);
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dcc_address = get_dcc_address(afb->address, tiling_flags);
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flip->flip_addrs[flip_count].address.grph.meta_addr.low_part = lower_32_bits(dcc_address);
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flip->flip_addrs[flip_count].address.grph.meta_addr.high_part = upper_32_bits(dcc_address);
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bundle->flip_addrs[planes_count].address.grph.meta_addr.low_part = lower_32_bits(dcc_address);
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bundle->flip_addrs[planes_count].address.grph.meta_addr.high_part = upper_32_bits(dcc_address);
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flip->flip_addrs[flip_count].flip_immediate =
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bundle->flip_addrs[planes_count].flip_immediate =
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(crtc->state->pageflip_flags & DRM_MODE_PAGE_FLIP_ASYNC) != 0;
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timestamp_ns = ktime_get_ns();
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flip->flip_addrs[flip_count].flip_timestamp_in_us = div_u64(timestamp_ns, 1000);
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flip->surface_updates[flip_count].flip_addr = &flip->flip_addrs[flip_count];
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flip->surface_updates[flip_count].surface = dc_plane;
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bundle->flip_addrs[planes_count].flip_timestamp_in_us = div_u64(timestamp_ns, 1000);
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bundle->surface_updates[planes_count].flip_addr = &bundle->flip_addrs[planes_count];
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bundle->surface_updates[planes_count].surface = dc_plane;
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if (!flip->surface_updates[flip_count].surface) {
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if (!bundle->surface_updates[planes_count].surface) {
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DRM_ERROR("No surface for CRTC: id=%d\n",
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acrtc_attach->crtc_id);
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continue;
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@ -4777,53 +4774,45 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
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acrtc_state,
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acrtc_state->stream,
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dc_plane,
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flip->flip_addrs[flip_count].flip_timestamp_in_us);
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bundle->flip_addrs[planes_count].flip_timestamp_in_us);
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DRM_DEBUG_DRIVER("%s Flipping to hi: 0x%x, low: 0x%x\n",
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__func__,
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flip->flip_addrs[flip_count].address.grph.addr.high_part,
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flip->flip_addrs[flip_count].address.grph.addr.low_part);
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flip_count += 1;
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bundle->flip_addrs[planes_count].address.grph.addr.high_part,
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bundle->flip_addrs[planes_count].address.grph.addr.low_part);
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}
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full->surface_updates[planes_count].surface = dc_plane;
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bundle->surface_updates[planes_count].surface = dc_plane;
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if (new_pcrtc_state->color_mgmt_changed) {
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full->surface_updates[planes_count].gamma = dc_plane->gamma_correction;
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full->surface_updates[planes_count].in_transfer_func = dc_plane->in_transfer_func;
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bundle->surface_updates[planes_count].gamma = dc_plane->gamma_correction;
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bundle->surface_updates[planes_count].in_transfer_func = dc_plane->in_transfer_func;
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}
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full->scaling_infos[planes_count].scaling_quality = dc_plane->scaling_quality;
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full->scaling_infos[planes_count].src_rect = dc_plane->src_rect;
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full->scaling_infos[planes_count].dst_rect = dc_plane->dst_rect;
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full->scaling_infos[planes_count].clip_rect = dc_plane->clip_rect;
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full->surface_updates[planes_count].scaling_info = &full->scaling_infos[planes_count];
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bundle->scaling_infos[planes_count].scaling_quality = dc_plane->scaling_quality;
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bundle->scaling_infos[planes_count].src_rect = dc_plane->src_rect;
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bundle->scaling_infos[planes_count].dst_rect = dc_plane->dst_rect;
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bundle->scaling_infos[planes_count].clip_rect = dc_plane->clip_rect;
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bundle->surface_updates[planes_count].scaling_info = &bundle->scaling_infos[planes_count];
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full->plane_infos[planes_count].color_space = dc_plane->color_space;
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full->plane_infos[planes_count].format = dc_plane->format;
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full->plane_infos[planes_count].plane_size = dc_plane->plane_size;
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full->plane_infos[planes_count].rotation = dc_plane->rotation;
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full->plane_infos[planes_count].horizontal_mirror = dc_plane->horizontal_mirror;
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full->plane_infos[planes_count].stereo_format = dc_plane->stereo_format;
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full->plane_infos[planes_count].tiling_info = dc_plane->tiling_info;
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full->plane_infos[planes_count].visible = dc_plane->visible;
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full->plane_infos[planes_count].per_pixel_alpha = dc_plane->per_pixel_alpha;
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full->plane_infos[planes_count].dcc = dc_plane->dcc;
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full->surface_updates[planes_count].plane_info = &full->plane_infos[planes_count];
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bundle->plane_infos[planes_count].color_space = dc_plane->color_space;
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bundle->plane_infos[planes_count].format = dc_plane->format;
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bundle->plane_infos[planes_count].plane_size = dc_plane->plane_size;
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bundle->plane_infos[planes_count].rotation = dc_plane->rotation;
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bundle->plane_infos[planes_count].horizontal_mirror = dc_plane->horizontal_mirror;
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bundle->plane_infos[planes_count].stereo_format = dc_plane->stereo_format;
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bundle->plane_infos[planes_count].tiling_info = dc_plane->tiling_info;
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bundle->plane_infos[planes_count].visible = dc_plane->visible;
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bundle->plane_infos[planes_count].per_pixel_alpha = dc_plane->per_pixel_alpha;
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bundle->plane_infos[planes_count].dcc = dc_plane->dcc;
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bundle->surface_updates[planes_count].plane_info = &bundle->plane_infos[planes_count];
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planes_count += 1;
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}
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/*
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* TODO: For proper atomic behaviour, we should be calling into DC once with
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* all the changes. However, DC refuses to do pageflips and non-pageflip
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* changes in the same call. Change DC to respect atomic behaviour,
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* hopefully eliminating dc_*_update structs in their entirety.
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*/
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if (flip_count) {
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if (pflip_present) {
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if (!vrr_active) {
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/* Use old throttling in non-vrr fixed refresh rate mode
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* to keep flip scheduling based on target vblank counts
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@ -4882,43 +4871,34 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
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if (acrtc_state->stream) {
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if (acrtc_state->freesync_timing_changed)
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flip->stream_update.adjust =
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bundle->stream_update.adjust =
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&acrtc_state->stream->adjust;
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if (acrtc_state->freesync_vrr_info_changed)
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flip->stream_update.vrr_infopacket =
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bundle->stream_update.vrr_infopacket =
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&acrtc_state->stream->vrr_infopacket;
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}
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mutex_lock(&dm->dc_lock);
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dc_commit_updates_for_stream(dm->dc,
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flip->surface_updates,
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flip_count,
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acrtc_state->stream,
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&flip->stream_update,
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dc_state);
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mutex_unlock(&dm->dc_lock);
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}
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if (planes_count) {
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if (new_pcrtc_state->mode_changed) {
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full->stream_update.src = acrtc_state->stream->src;
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full->stream_update.dst = acrtc_state->stream->dst;
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bundle->stream_update.src = acrtc_state->stream->src;
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bundle->stream_update.dst = acrtc_state->stream->dst;
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}
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if (new_pcrtc_state->color_mgmt_changed)
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full->stream_update.out_transfer_func = acrtc_state->stream->out_transfer_func;
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bundle->stream_update.out_transfer_func = acrtc_state->stream->out_transfer_func;
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acrtc_state->stream->abm_level = acrtc_state->abm_level;
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if (acrtc_state->abm_level != dm_old_crtc_state->abm_level)
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full->stream_update.abm_level = &acrtc_state->abm_level;
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bundle->stream_update.abm_level = &acrtc_state->abm_level;
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mutex_lock(&dm->dc_lock);
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dc_commit_updates_for_stream(dm->dc,
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full->surface_updates,
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bundle->surface_updates,
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planes_count,
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acrtc_state->stream,
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&full->stream_update,
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&bundle->stream_update,
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dc_state);
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mutex_unlock(&dm->dc_lock);
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}
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@ -4928,8 +4908,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
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handle_cursor_update(plane, old_plane_state);
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cleanup:
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kfree(flip);
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kfree(full);
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kfree(bundle);
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}
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/*
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