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ARM: 7280/1: mmc: mmci: Cache MMCICLOCK and MMCIPOWER register 

Instead of reading a register value everytime we need to
apply a new value for it, maintain a cached copy for it.
This also means we are able to skip writes that are not
needed.

Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Ulf Hansson 2012-01-18 09:17:27 +01:00 committed by Russell King
parent 393e5e2416
commit 7437cfa532
2 changed files with 31 additions and 13 deletions
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41
drivers/mmc/host/mmci.c
View File

@ -118,6 +118,28 @@ static struct variant_data variant_ux500v2 = {
.signal_direction = true, .signal_direction = true,
}; };
/*
* This must be called with host->lock held
*/
static void mmci_write_clkreg(struct mmci_host *host, u32 clk)
{
if (host->clk_reg != clk) {
host->clk_reg = clk;
writel(clk, host->base + MMCICLOCK);
}
}
/*
* This must be called with host->lock held
*/
static void mmci_write_pwrreg(struct mmci_host *host, u32 pwr)
{
if (host->pwr_reg != pwr) {
host->pwr_reg = pwr;
writel(pwr, host->base + MMCIPOWER);
}
}
/* /*
* This must be called with host->lock held * This must be called with host->lock held
*/ */
@ -165,7 +187,7 @@ static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired)
if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_8)
clk |= MCI_ST_8BIT_BUS; clk |= MCI_ST_8BIT_BUS;
writel(clk, host->base + MMCICLOCK); mmci_write_clkreg(host, clk);
} }
static void static void
@ -846,14 +868,13 @@ static int mmci_pio_write(struct mmci_host *host, char *buffer, unsigned int rem
*/ */
if (variant->sdio && if (variant->sdio &&
mmc_card_sdio(host->mmc->card)) { mmc_card_sdio(host->mmc->card)) {
u32 clk;
if (count < 8) if (count < 8)
writel(readl(host->base + MMCICLOCK) & clk = host->clk_reg & ~variant->clkreg_enable;
~variant->clkreg_enable,
host->base + MMCICLOCK);
else else
writel(readl(host->base + MMCICLOCK) | clk = host->clk_reg | variant->clkreg_enable;
variant->clkreg_enable,
host->base + MMCICLOCK); mmci_write_clkreg(host, clk);
} }
/* /*
@ -1114,11 +1135,7 @@ static void mmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
spin_lock_irqsave(&host->lock, flags); spin_lock_irqsave(&host->lock, flags);
mmci_set_clkreg(host, ios->clock); mmci_set_clkreg(host, ios->clock);
mmci_write_pwrreg(host, pwr);
if (host->pwr != pwr) {
host->pwr = pwr;
writel(pwr, host->base + MMCIPOWER);
}
spin_unlock_irqrestore(&host->lock, flags); spin_unlock_irqrestore(&host->lock, flags);

3
drivers/mmc/host/mmci.h
View File

@ -179,7 +179,8 @@ struct mmci_host {
unsigned int mclk; unsigned int mclk;
unsigned int cclk; unsigned int cclk;
u32 pwr; u32 pwr_reg;
u32 clk_reg;
struct mmci_platform_data *plat; struct mmci_platform_data *plat;
struct variant_data *variant; struct variant_data *variant;